Linux 4.1.16
[linux/fpc-iii.git] / drivers / mtd / chips / cfi_probe.c
blobe8d0164498b097be6dabe24241e24528712ab3ff
1 /*
2 Common Flash Interface probe code.
3 (C) 2000 Red Hat. GPL'd.
4 */
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <asm/io.h>
11 #include <asm/byteorder.h>
12 #include <linux/errno.h>
13 #include <linux/slab.h>
14 #include <linux/interrupt.h>
16 #include <linux/mtd/xip.h>
17 #include <linux/mtd/map.h>
18 #include <linux/mtd/cfi.h>
19 #include <linux/mtd/gen_probe.h>
21 //#define DEBUG_CFI
23 #ifdef DEBUG_CFI
24 static void print_cfi_ident(struct cfi_ident *);
25 #endif
27 static int cfi_probe_chip(struct map_info *map, __u32 base,
28 unsigned long *chip_map, struct cfi_private *cfi);
29 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
31 struct mtd_info *cfi_probe(struct map_info *map);
33 #ifdef CONFIG_MTD_XIP
35 /* only needed for short periods, so this is rather simple */
36 #define xip_disable() local_irq_disable()
38 #define xip_allowed(base, map) \
39 do { \
40 (void) map_read(map, base); \
41 xip_iprefetch(); \
42 local_irq_enable(); \
43 } while (0)
45 #define xip_enable(base, map, cfi) \
46 do { \
47 cfi_qry_mode_off(base, map, cfi); \
48 xip_allowed(base, map); \
49 } while (0)
51 #define xip_disable_qry(base, map, cfi) \
52 do { \
53 xip_disable(); \
54 cfi_qry_mode_on(base, map, cfi); \
55 } while (0)
57 #else
59 #define xip_disable() do { } while (0)
60 #define xip_allowed(base, map) do { } while (0)
61 #define xip_enable(base, map, cfi) do { } while (0)
62 #define xip_disable_qry(base, map, cfi) do { } while (0)
64 #endif
66 /* check for QRY.
67 in: interleave,type,mode
68 ret: table index, <0 for error
71 static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
72 unsigned long *chip_map, struct cfi_private *cfi)
74 int i;
76 if ((base + 0) >= map->size) {
77 printk(KERN_NOTICE
78 "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
79 (unsigned long)base, map->size -1);
80 return 0;
82 if ((base + 0xff) >= map->size) {
83 printk(KERN_NOTICE
84 "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
85 (unsigned long)base + 0x55, map->size -1);
86 return 0;
89 xip_disable();
90 if (!cfi_qry_mode_on(base, map, cfi)) {
91 xip_enable(base, map, cfi);
92 return 0;
95 if (!cfi->numchips) {
96 /* This is the first time we're called. Set up the CFI
97 stuff accordingly and return */
98 return cfi_chip_setup(map, cfi);
101 /* Check each previous chip to see if it's an alias */
102 for (i=0; i < (base >> cfi->chipshift); i++) {
103 unsigned long start;
104 if(!test_bit(i, chip_map)) {
105 /* Skip location; no valid chip at this address */
106 continue;
108 start = i << cfi->chipshift;
109 /* This chip should be in read mode if it's one
110 we've already touched. */
111 if (cfi_qry_present(map, start, cfi)) {
112 /* Eep. This chip also had the QRY marker.
113 * Is it an alias for the new one? */
114 cfi_qry_mode_off(start, map, cfi);
116 /* If the QRY marker goes away, it's an alias */
117 if (!cfi_qry_present(map, start, cfi)) {
118 xip_allowed(base, map);
119 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
120 map->name, base, start);
121 return 0;
123 /* Yes, it's actually got QRY for data. Most
124 * unfortunate. Stick the new chip in read mode
125 * too and if it's the same, assume it's an alias. */
126 /* FIXME: Use other modes to do a proper check */
127 cfi_qry_mode_off(base, map, cfi);
129 if (cfi_qry_present(map, base, cfi)) {
130 xip_allowed(base, map);
131 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
132 map->name, base, start);
133 return 0;
138 /* OK, if we got to here, then none of the previous chips appear to
139 be aliases for the current one. */
140 set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
141 cfi->numchips++;
143 /* Put it back into Read Mode */
144 cfi_qry_mode_off(base, map, cfi);
145 xip_allowed(base, map);
147 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
148 map->name, cfi->interleave, cfi->device_type*8, base,
149 map->bankwidth*8);
151 return 1;
154 static int __xipram cfi_chip_setup(struct map_info *map,
155 struct cfi_private *cfi)
157 int ofs_factor = cfi->interleave*cfi->device_type;
158 __u32 base = 0;
159 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
160 int i;
161 int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
163 xip_enable(base, map, cfi);
164 #ifdef DEBUG_CFI
165 printk("Number of erase regions: %d\n", num_erase_regions);
166 #endif
167 if (!num_erase_regions)
168 return 0;
170 cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
171 if (!cfi->cfiq)
172 return 0;
174 memset(cfi->cfiq,0,sizeof(struct cfi_ident));
176 cfi->cfi_mode = CFI_MODE_CFI;
178 cfi->sector_erase_cmd = CMD(0x30);
180 /* Read the CFI info structure */
181 xip_disable_qry(base, map, cfi);
182 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
183 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
185 /* Do any necessary byteswapping */
186 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
188 cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
189 cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
190 cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
191 cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
192 cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
194 #ifdef DEBUG_CFI
195 /* Dump the information therein */
196 print_cfi_ident(cfi->cfiq);
197 #endif
199 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
200 cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
202 #ifdef DEBUG_CFI
203 printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
204 i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
205 (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
206 #endif
209 if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
210 addr_unlock1 = 0x5555;
211 addr_unlock2 = 0x2AAA;
215 * Note we put the device back into Read Mode BEFORE going into Auto
216 * Select Mode, as some devices support nesting of modes, others
217 * don't. This way should always work.
218 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
219 * so should be treated as nops or illegal (and so put the device
220 * back into Read Mode, which is a nop in this case).
222 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
223 cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
224 cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
225 cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
226 cfi->mfr = cfi_read_query16(map, base);
227 cfi->id = cfi_read_query16(map, base + ofs_factor);
229 /* Get AMD/Spansion extended JEDEC ID */
230 if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
231 cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
232 cfi_read_query(map, base + 0xf * ofs_factor);
234 /* Put it back into Read Mode */
235 cfi_qry_mode_off(base, map, cfi);
236 xip_allowed(base, map);
238 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
239 map->name, cfi->interleave, cfi->device_type*8, base,
240 map->bankwidth*8, cfi->mfr, cfi->id);
242 return 1;
245 #ifdef DEBUG_CFI
246 static char *vendorname(__u16 vendor)
248 switch (vendor) {
249 case P_ID_NONE:
250 return "None";
252 case P_ID_INTEL_EXT:
253 return "Intel/Sharp Extended";
255 case P_ID_AMD_STD:
256 return "AMD/Fujitsu Standard";
258 case P_ID_INTEL_STD:
259 return "Intel/Sharp Standard";
261 case P_ID_AMD_EXT:
262 return "AMD/Fujitsu Extended";
264 case P_ID_WINBOND:
265 return "Winbond Standard";
267 case P_ID_ST_ADV:
268 return "ST Advanced";
270 case P_ID_MITSUBISHI_STD:
271 return "Mitsubishi Standard";
273 case P_ID_MITSUBISHI_EXT:
274 return "Mitsubishi Extended";
276 case P_ID_SST_PAGE:
277 return "SST Page Write";
279 case P_ID_SST_OLD:
280 return "SST 39VF160x/39VF320x";
282 case P_ID_INTEL_PERFORMANCE:
283 return "Intel Performance Code";
285 case P_ID_INTEL_DATA:
286 return "Intel Data";
288 case P_ID_RESERVED:
289 return "Not Allowed / Reserved for Future Use";
291 default:
292 return "Unknown";
297 static void print_cfi_ident(struct cfi_ident *cfip)
299 #if 0
300 if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
301 printk("Invalid CFI ident structure.\n");
302 return;
304 #endif
305 printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
306 if (cfip->P_ADR)
307 printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
308 else
309 printk("No Primary Algorithm Table\n");
311 printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
312 if (cfip->A_ADR)
313 printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
314 else
315 printk("No Alternate Algorithm Table\n");
318 printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
319 printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
320 if (cfip->VppMin) {
321 printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
322 printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
324 else
325 printk("No Vpp line\n");
327 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
328 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
330 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
331 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
332 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
334 else
335 printk("Full buffer write not supported\n");
337 printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
338 printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
339 if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
340 printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
341 printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
343 else
344 printk("Chip erase not supported\n");
346 printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
347 printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
348 switch(cfip->InterfaceDesc) {
349 case CFI_INTERFACE_X8_ASYNC:
350 printk(" - x8-only asynchronous interface\n");
351 break;
353 case CFI_INTERFACE_X16_ASYNC:
354 printk(" - x16-only asynchronous interface\n");
355 break;
357 case CFI_INTERFACE_X8_BY_X16_ASYNC:
358 printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
359 break;
361 case CFI_INTERFACE_X32_ASYNC:
362 printk(" - x32-only asynchronous interface\n");
363 break;
365 case CFI_INTERFACE_X16_BY_X32_ASYNC:
366 printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
367 break;
369 case CFI_INTERFACE_NOT_ALLOWED:
370 printk(" - Not Allowed / Reserved\n");
371 break;
373 default:
374 printk(" - Unknown\n");
375 break;
378 printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
379 printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
382 #endif /* DEBUG_CFI */
384 static struct chip_probe cfi_chip_probe = {
385 .name = "CFI",
386 .probe_chip = cfi_probe_chip
389 struct mtd_info *cfi_probe(struct map_info *map)
392 * Just use the generic probe stuff to call our CFI-specific
393 * chip_probe routine in all the possible permutations, etc.
395 return mtd_do_chip_probe(map, &cfi_chip_probe);
398 static struct mtd_chip_driver cfi_chipdrv = {
399 .probe = cfi_probe,
400 .name = "cfi_probe",
401 .module = THIS_MODULE
404 static int __init cfi_probe_init(void)
406 register_mtd_chip_driver(&cfi_chipdrv);
407 return 0;
410 static void __exit cfi_probe_exit(void)
412 unregister_mtd_chip_driver(&cfi_chipdrv);
415 module_init(cfi_probe_init);
416 module_exit(cfi_probe_exit);
418 MODULE_LICENSE("GPL");
419 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
420 MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");