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Linux 4.1.16
[linux/fpc-iii.git] / drivers / regulator / s5m8767.c
blob58f5d3b8e9818a224c58e1299fdb769f94fd4f98
1 /*
2 * s5m8767.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14 #include <linux/err.h>
15 #include <linux/of_gpio.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/driver.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/mfd/samsung/core.h>
21 #include <linux/mfd/samsung/s5m8767.h>
22 #include <linux/regulator/of_regulator.h>
23 #include <linux/regmap.h>
24
25 #define S5M8767_OPMODE_NORMAL_MODE 0x1
26
27 struct s5m8767_info {
28 struct device *dev;
29 struct sec_pmic_dev *iodev;
30 int num_regulators;
31 struct sec_opmode_data *opmode;
32
33 int ramp_delay;
34 bool buck2_ramp;
35 bool buck3_ramp;
36 bool buck4_ramp;
37
38 bool buck2_gpiodvs;
39 bool buck3_gpiodvs;
40 bool buck4_gpiodvs;
41 u8 buck2_vol[8];
42 u8 buck3_vol[8];
43 u8 buck4_vol[8];
44 int buck_gpios[3];
45 int buck_ds[3];
46 int buck_gpioindex;
47 };
48
49 struct sec_voltage_desc {
50 int max;
51 int min;
52 int step;
53 };
54
55 static const struct sec_voltage_desc buck_voltage_val1 = {
56 .max = 2225000,
57 .min = 650000,
58 .step = 6250,
59 };
60
61 static const struct sec_voltage_desc buck_voltage_val2 = {
62 .max = 1600000,
63 .min = 600000,
64 .step = 6250,
65 };
66
67 static const struct sec_voltage_desc buck_voltage_val3 = {
68 .max = 3000000,
69 .min = 750000,
70 .step = 12500,
71 };
72
73 static const struct sec_voltage_desc ldo_voltage_val1 = {
74 .max = 3950000,
75 .min = 800000,
76 .step = 50000,
77 };
78
79 static const struct sec_voltage_desc ldo_voltage_val2 = {
80 .max = 2375000,
81 .min = 800000,
82 .step = 25000,
83 };
84
85 static const struct sec_voltage_desc *reg_voltage_map[] = {
86 [S5M8767_LDO1] = &ldo_voltage_val2,
87 [S5M8767_LDO2] = &ldo_voltage_val2,
88 [S5M8767_LDO3] = &ldo_voltage_val1,
89 [S5M8767_LDO4] = &ldo_voltage_val1,
90 [S5M8767_LDO5] = &ldo_voltage_val1,
91 [S5M8767_LDO6] = &ldo_voltage_val2,
92 [S5M8767_LDO7] = &ldo_voltage_val2,
93 [S5M8767_LDO8] = &ldo_voltage_val2,
94 [S5M8767_LDO9] = &ldo_voltage_val1,
95 [S5M8767_LDO10] = &ldo_voltage_val1,
96 [S5M8767_LDO11] = &ldo_voltage_val1,
97 [S5M8767_LDO12] = &ldo_voltage_val1,
98 [S5M8767_LDO13] = &ldo_voltage_val1,
99 [S5M8767_LDO14] = &ldo_voltage_val1,
100 [S5M8767_LDO15] = &ldo_voltage_val2,
101 [S5M8767_LDO16] = &ldo_voltage_val1,
102 [S5M8767_LDO17] = &ldo_voltage_val1,
103 [S5M8767_LDO18] = &ldo_voltage_val1,
104 [S5M8767_LDO19] = &ldo_voltage_val1,
105 [S5M8767_LDO20] = &ldo_voltage_val1,
106 [S5M8767_LDO21] = &ldo_voltage_val1,
107 [S5M8767_LDO22] = &ldo_voltage_val1,
108 [S5M8767_LDO23] = &ldo_voltage_val1,
109 [S5M8767_LDO24] = &ldo_voltage_val1,
110 [S5M8767_LDO25] = &ldo_voltage_val1,
111 [S5M8767_LDO26] = &ldo_voltage_val1,
112 [S5M8767_LDO27] = &ldo_voltage_val1,
113 [S5M8767_LDO28] = &ldo_voltage_val1,
114 [S5M8767_BUCK1] = &buck_voltage_val1,
115 [S5M8767_BUCK2] = &buck_voltage_val2,
116 [S5M8767_BUCK3] = &buck_voltage_val2,
117 [S5M8767_BUCK4] = &buck_voltage_val2,
118 [S5M8767_BUCK5] = &buck_voltage_val1,
119 [S5M8767_BUCK6] = &buck_voltage_val1,
120 [S5M8767_BUCK7] = &buck_voltage_val3,
121 [S5M8767_BUCK8] = &buck_voltage_val3,
122 [S5M8767_BUCK9] = &buck_voltage_val3,
123 };
124
125 static unsigned int s5m8767_opmode_reg[][4] = {
126 /* {OFF, ON, LOWPOWER, SUSPEND} */
127 /* LDO1 ... LDO28 */
128 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
129 {0x0, 0x3, 0x2, 0x1},
130 {0x0, 0x3, 0x2, 0x1},
131 {0x0, 0x0, 0x0, 0x0},
132 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
133 {0x0, 0x3, 0x2, 0x1},
134 {0x0, 0x3, 0x2, 0x1},
135 {0x0, 0x3, 0x2, 0x1},
136 {0x0, 0x3, 0x2, 0x1},
137 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
138 {0x0, 0x3, 0x2, 0x1},
139 {0x0, 0x3, 0x2, 0x1},
140 {0x0, 0x3, 0x2, 0x1},
141 {0x0, 0x3, 0x2, 0x1},
142 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
143 {0x0, 0x3, 0x2, 0x1},
144 {0x0, 0x3, 0x2, 0x1},
145 {0x0, 0x0, 0x0, 0x0},
146 {0x0, 0x3, 0x2, 0x1},
147 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
148 {0x0, 0x3, 0x2, 0x1},
149 {0x0, 0x3, 0x2, 0x1},
150 {0x0, 0x0, 0x0, 0x0},
151 {0x0, 0x3, 0x2, 0x1},
152 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
153 {0x0, 0x3, 0x2, 0x1},
154 {0x0, 0x3, 0x2, 0x1},
155 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
156
157 /* BUCK1 ... BUCK9 */
158 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
159 {0x0, 0x3, 0x1, 0x1},
160 {0x0, 0x3, 0x1, 0x1},
161 {0x0, 0x3, 0x1, 0x1},
162 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
163 {0x0, 0x3, 0x1, 0x1},
164 {0x0, 0x3, 0x1, 0x1},
165 {0x0, 0x3, 0x1, 0x1},
166 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
167 };
168
169 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id,
170 int *reg, int *enable_ctrl)
171 {
172 int i;
173 unsigned int mode;
174
175 switch (reg_id) {
176 case S5M8767_LDO1 ... S5M8767_LDO2:
177 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
178 break;
179 case S5M8767_LDO3 ... S5M8767_LDO28:
180 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
181 break;
182 case S5M8767_BUCK1:
183 *reg = S5M8767_REG_BUCK1CTRL1;
184 break;
185 case S5M8767_BUCK2 ... S5M8767_BUCK4:
186 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
187 break;
188 case S5M8767_BUCK5:
189 *reg = S5M8767_REG_BUCK5CTRL1;
190 break;
191 case S5M8767_BUCK6 ... S5M8767_BUCK9:
192 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
193 break;
194 default:
195 return -EINVAL;
196 }
197
198 for (i = 0; i < s5m8767->num_regulators; i++) {
199 if (s5m8767->opmode[i].id == reg_id) {
200 mode = s5m8767->opmode[i].mode;
201 break;
202 }
203 }
204
205 if (i < s5m8767->num_regulators)
206 *enable_ctrl =
207 s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
208
209 return 0;
210 }
211
212 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
213 {
214 int reg;
215
216 switch (reg_id) {
217 case S5M8767_LDO1 ... S5M8767_LDO2:
218 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
219 break;
220 case S5M8767_LDO3 ... S5M8767_LDO28:
221 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
222 break;
223 case S5M8767_BUCK1:
224 reg = S5M8767_REG_BUCK1CTRL2;
225 break;
226 case S5M8767_BUCK2:
227 reg = S5M8767_REG_BUCK2DVS1;
228 if (s5m8767->buck2_gpiodvs)
229 reg += s5m8767->buck_gpioindex;
230 break;
231 case S5M8767_BUCK3:
232 reg = S5M8767_REG_BUCK3DVS1;
233 if (s5m8767->buck3_gpiodvs)
234 reg += s5m8767->buck_gpioindex;
235 break;
236 case S5M8767_BUCK4:
237 reg = S5M8767_REG_BUCK4DVS1;
238 if (s5m8767->buck4_gpiodvs)
239 reg += s5m8767->buck_gpioindex;
240 break;
241 case S5M8767_BUCK5:
242 reg = S5M8767_REG_BUCK5CTRL2;
243 break;
244 case S5M8767_BUCK6 ... S5M8767_BUCK9:
245 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
246 break;
247 default:
248 return -EINVAL;
249 }
250
251 return reg;
252 }
253
254 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
255 int min_vol)
256 {
257 int selector = 0;
258
259 if (desc == NULL)
260 return -EINVAL;
261
262 if (min_vol > desc->max)
263 return -EINVAL;
264
265 if (min_vol < desc->min)
266 min_vol = desc->min;
267
268 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
269
270 if (desc->min + desc->step * selector > desc->max)
271 return -EINVAL;
272
273 return selector;
274 }
275
276 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
277 {
278 int temp_index = s5m8767->buck_gpioindex;
279
280 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
281 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
282 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
283
284 return 0;
285 }
286
287 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
288 {
289 int temp_index = s5m8767->buck_gpioindex;
290
291 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
292 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
293 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
294
295 return 0;
296 }
297
298 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
299 unsigned selector)
300 {
301 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
302 int reg_id = rdev_get_id(rdev);
303 int old_index, index = 0;
304 u8 *buck234_vol = NULL;
305
306 switch (reg_id) {
307 case S5M8767_LDO1 ... S5M8767_LDO28:
308 break;
309 case S5M8767_BUCK1 ... S5M8767_BUCK6:
310 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
311 buck234_vol = &s5m8767->buck2_vol[0];
312 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
313 buck234_vol = &s5m8767->buck3_vol[0];
314 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
315 buck234_vol = &s5m8767->buck4_vol[0];
316 break;
317 case S5M8767_BUCK7 ... S5M8767_BUCK8:
318 return -EINVAL;
319 case S5M8767_BUCK9:
320 break;
321 default:
322 return -EINVAL;
323 }
324
325 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
326 if (buck234_vol) {
327 while (*buck234_vol != selector) {
328 buck234_vol++;
329 index++;
330 }
331 old_index = s5m8767->buck_gpioindex;
332 s5m8767->buck_gpioindex = index;
333
334 if (index > old_index)
335 return s5m8767_set_high(s5m8767);
336 else
337 return s5m8767_set_low(s5m8767);
338 } else {
339 return regulator_set_voltage_sel_regmap(rdev, selector);
340 }
341 }
342
343 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
344 unsigned int old_sel,
345 unsigned int new_sel)
346 {
347 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
348 const struct sec_voltage_desc *desc;
349 int reg_id = rdev_get_id(rdev);
350
351 desc = reg_voltage_map[reg_id];
352
353 if ((old_sel < new_sel) && s5m8767->ramp_delay)
354 return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
355 s5m8767->ramp_delay * 1000);
356 return 0;
357 }
358
359 static struct regulator_ops s5m8767_ops = {
360 .list_voltage = regulator_list_voltage_linear,
361 .is_enabled = regulator_is_enabled_regmap,
362 .enable = regulator_enable_regmap,
363 .disable = regulator_disable_regmap,
364 .get_voltage_sel = regulator_get_voltage_sel_regmap,
365 .set_voltage_sel = s5m8767_set_voltage_sel,
366 .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
367 };
368
369 static struct regulator_ops s5m8767_buck78_ops = {
370 .list_voltage = regulator_list_voltage_linear,
371 .is_enabled = regulator_is_enabled_regmap,
372 .enable = regulator_enable_regmap,
373 .disable = regulator_disable_regmap,
374 .get_voltage_sel = regulator_get_voltage_sel_regmap,
375 .set_voltage_sel = regulator_set_voltage_sel_regmap,
376 };
377
378 #define s5m8767_regulator_desc(_name) { \
379 .name = #_name, \
380 .id = S5M8767_##_name, \
381 .ops = &s5m8767_ops, \
382 .type = REGULATOR_VOLTAGE, \
383 .owner = THIS_MODULE, \
384 }
385
386 #define s5m8767_regulator_buck78_desc(_name) { \
387 .name = #_name, \
388 .id = S5M8767_##_name, \
389 .ops = &s5m8767_buck78_ops, \
390 .type = REGULATOR_VOLTAGE, \
391 .owner = THIS_MODULE, \
392 }
393
394 static struct regulator_desc regulators[] = {
395 s5m8767_regulator_desc(LDO1),
396 s5m8767_regulator_desc(LDO2),
397 s5m8767_regulator_desc(LDO3),
398 s5m8767_regulator_desc(LDO4),
399 s5m8767_regulator_desc(LDO5),
400 s5m8767_regulator_desc(LDO6),
401 s5m8767_regulator_desc(LDO7),
402 s5m8767_regulator_desc(LDO8),
403 s5m8767_regulator_desc(LDO9),
404 s5m8767_regulator_desc(LDO10),
405 s5m8767_regulator_desc(LDO11),
406 s5m8767_regulator_desc(LDO12),
407 s5m8767_regulator_desc(LDO13),
408 s5m8767_regulator_desc(LDO14),
409 s5m8767_regulator_desc(LDO15),
410 s5m8767_regulator_desc(LDO16),
411 s5m8767_regulator_desc(LDO17),
412 s5m8767_regulator_desc(LDO18),
413 s5m8767_regulator_desc(LDO19),
414 s5m8767_regulator_desc(LDO20),
415 s5m8767_regulator_desc(LDO21),
416 s5m8767_regulator_desc(LDO22),
417 s5m8767_regulator_desc(LDO23),
418 s5m8767_regulator_desc(LDO24),
419 s5m8767_regulator_desc(LDO25),
420 s5m8767_regulator_desc(LDO26),
421 s5m8767_regulator_desc(LDO27),
422 s5m8767_regulator_desc(LDO28),
423 s5m8767_regulator_desc(BUCK1),
424 s5m8767_regulator_desc(BUCK2),
425 s5m8767_regulator_desc(BUCK3),
426 s5m8767_regulator_desc(BUCK4),
427 s5m8767_regulator_desc(BUCK5),
428 s5m8767_regulator_desc(BUCK6),
429 s5m8767_regulator_buck78_desc(BUCK7),
430 s5m8767_regulator_buck78_desc(BUCK8),
431 s5m8767_regulator_desc(BUCK9),
432 };
433
434 /*
435 * Enable GPIO control over BUCK9 in regulator_config for that regulator.
436 */
437 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767,
438 struct sec_regulator_data *rdata,
439 struct regulator_config *config)
440 {
441 int i, mode = 0;
442
443 if (rdata->id != S5M8767_BUCK9)
444 return;
445
446 /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */
447 for (i = 0; i < s5m8767->num_regulators; i++) {
448 const struct sec_opmode_data *opmode = &s5m8767->opmode[i];
449 if (opmode->id == rdata->id) {
450 mode = s5m8767_opmode_reg[rdata->id][opmode->mode];
451 break;
452 }
453 }
454 if (mode != S5M8767_ENCTRL_USE_GPIO) {
455 dev_warn(s5m8767->dev,
456 "ext-control for %s: mismatched op_mode (%x), ignoring\n",
457 rdata->reg_node->name, mode);
458 return;
459 }
460
461 if (!gpio_is_valid(rdata->ext_control_gpio)) {
462 dev_warn(s5m8767->dev,
463 "ext-control for %s: GPIO not valid, ignoring\n",
464 rdata->reg_node->name);
465 return;
466 }
467
468 config->ena_gpio = rdata->ext_control_gpio;
469 config->ena_gpio_flags = GPIOF_OUT_INIT_HIGH;
470 }
471
472 /*
473 * Turn on GPIO control over BUCK9.
474 */
475 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767,
476 struct regulator_dev *rdev)
477 {
478 int id = rdev_get_id(rdev);
479 int ret, reg, enable_ctrl;
480
481 if (id != S5M8767_BUCK9)
482 return -EINVAL;
483
484 ret = s5m8767_get_register(s5m8767, id, &reg, &enable_ctrl);
485 if (ret)
486 return ret;
487
488 return regmap_update_bits(s5m8767->iodev->regmap_pmic,
489 reg, S5M8767_ENCTRL_MASK,
490 S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT);
491 }
492
493
494 #ifdef CONFIG_OF
495 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
496 struct sec_platform_data *pdata,
497 struct device_node *pmic_np)
498 {
499 int i, gpio;
500
501 for (i = 0; i < 3; i++) {
502 gpio = of_get_named_gpio(pmic_np,
503 "s5m8767,pmic-buck-dvs-gpios", i);
504 if (!gpio_is_valid(gpio)) {
505 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
506 return -EINVAL;
507 }
508 pdata->buck_gpios[i] = gpio;
509 }
510 return 0;
511 }
512
513 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
514 struct sec_platform_data *pdata,
515 struct device_node *pmic_np)
516 {
517 int i, gpio;
518
519 for (i = 0; i < 3; i++) {
520 gpio = of_get_named_gpio(pmic_np,
521 "s5m8767,pmic-buck-ds-gpios", i);
522 if (!gpio_is_valid(gpio)) {
523 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
524 return -EINVAL;
525 }
526 pdata->buck_ds[i] = gpio;
527 }
528 return 0;
529 }
530
531 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
532 struct sec_platform_data *pdata)
533 {
534 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
535 struct device_node *pmic_np, *regulators_np, *reg_np;
536 struct sec_regulator_data *rdata;
537 struct sec_opmode_data *rmode;
538 unsigned int i, dvs_voltage_nr = 8, ret;
539
540 pmic_np = iodev->dev->of_node;
541 if (!pmic_np) {
542 dev_err(iodev->dev, "could not find pmic sub-node\n");
543 return -ENODEV;
544 }
545
546 regulators_np = of_get_child_by_name(pmic_np, "regulators");
547 if (!regulators_np) {
548 dev_err(iodev->dev, "could not find regulators sub-node\n");
549 return -EINVAL;
550 }
551
552 /* count the number of regulators to be supported in pmic */
553 pdata->num_regulators = of_get_child_count(regulators_np);
554
555 rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) *
556 pdata->num_regulators, GFP_KERNEL);
557 if (!rdata)
558 return -ENOMEM;
559
560 rmode = devm_kzalloc(&pdev->dev, sizeof(*rmode) *
561 pdata->num_regulators, GFP_KERNEL);
562 if (!rmode)
563 return -ENOMEM;
564
565 pdata->regulators = rdata;
566 pdata->opmode = rmode;
567 for_each_child_of_node(regulators_np, reg_np) {
568 for (i = 0; i < ARRAY_SIZE(regulators); i++)
569 if (!of_node_cmp(reg_np->name, regulators[i].name))
570 break;
571
572 if (i == ARRAY_SIZE(regulators)) {
573 dev_warn(iodev->dev,
574 "don't know how to configure regulator %s\n",
575 reg_np->name);
576 continue;
577 }
578
579 rdata->ext_control_gpio = of_get_named_gpio(reg_np,
580 "s5m8767,pmic-ext-control-gpios", 0);
581
582 rdata->id = i;
583 rdata->initdata = of_get_regulator_init_data(
584 &pdev->dev, reg_np,
585 &regulators[i]);
586 rdata->reg_node = reg_np;
587 rdata++;
588 rmode->id = i;
589 if (of_property_read_u32(reg_np, "op_mode",
590 &rmode->mode)) {
591 dev_warn(iodev->dev,
592 "no op_mode property property at %s\n",
593 reg_np->full_name);
594
595 rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
596 }
597 rmode++;
598 }
599
600 of_node_put(regulators_np);
601
602 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) {
603 pdata->buck2_gpiodvs = true;
604
605 if (of_property_read_u32_array(pmic_np,
606 "s5m8767,pmic-buck2-dvs-voltage",
607 pdata->buck2_voltage, dvs_voltage_nr)) {
608 dev_err(iodev->dev, "buck2 voltages not specified\n");
609 return -EINVAL;
610 }
611 }
612
613 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) {
614 pdata->buck3_gpiodvs = true;
615
616 if (of_property_read_u32_array(pmic_np,
617 "s5m8767,pmic-buck3-dvs-voltage",
618 pdata->buck3_voltage, dvs_voltage_nr)) {
619 dev_err(iodev->dev, "buck3 voltages not specified\n");
620 return -EINVAL;
621 }
622 }
623
624 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) {
625 pdata->buck4_gpiodvs = true;
626
627 if (of_property_read_u32_array(pmic_np,
628 "s5m8767,pmic-buck4-dvs-voltage",
629 pdata->buck4_voltage, dvs_voltage_nr)) {
630 dev_err(iodev->dev, "buck4 voltages not specified\n");
631 return -EINVAL;
632 }
633 }
634
635 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
636 pdata->buck4_gpiodvs) {
637 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
638 if (ret)
639 return -EINVAL;
640
641 if (of_property_read_u32(pmic_np,
642 "s5m8767,pmic-buck-default-dvs-idx",
643 &pdata->buck_default_idx)) {
644 pdata->buck_default_idx = 0;
645 } else {
646 if (pdata->buck_default_idx >= 8) {
647 pdata->buck_default_idx = 0;
648 dev_info(iodev->dev,
649 "invalid value for default dvs index, use 0\n");
650 }
651 }
652 }
653
654 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
655 if (ret)
656 return -EINVAL;
657
658 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL))
659 pdata->buck2_ramp_enable = true;
660
661 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL))
662 pdata->buck3_ramp_enable = true;
663
664 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL))
665 pdata->buck4_ramp_enable = true;
666
667 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
668 || pdata->buck4_ramp_enable) {
669 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
670 &pdata->buck_ramp_delay))
671 pdata->buck_ramp_delay = 0;
672 }
673
674 return 0;
675 }
676 #else
677 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
678 struct sec_platform_data *pdata)
679 {
680 return 0;
681 }
682 #endif /* CONFIG_OF */
683
684 static int s5m8767_pmic_probe(struct platform_device *pdev)
685 {
686 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
687 struct sec_platform_data *pdata = iodev->pdata;
688 struct regulator_config config = { };
689 struct s5m8767_info *s5m8767;
690 int i, ret, buck_init;
691
692 if (!pdata) {
693 dev_err(pdev->dev.parent, "Platform data not supplied\n");
694 return -ENODEV;
695 }
696
697 if (iodev->dev->of_node) {
698 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
699 if (ret)
700 return ret;
701 }
702
703 if (pdata->buck2_gpiodvs) {
704 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
705 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
706 return -EINVAL;
707 }
708 }
709
710 if (pdata->buck3_gpiodvs) {
711 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
712 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
713 return -EINVAL;
714 }
715 }
716
717 if (pdata->buck4_gpiodvs) {
718 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
719 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
720 return -EINVAL;
721 }
722 }
723
724 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
725 GFP_KERNEL);
726 if (!s5m8767)
727 return -ENOMEM;
728
729 s5m8767->dev = &pdev->dev;
730 s5m8767->iodev = iodev;
731 s5m8767->num_regulators = pdata->num_regulators;
732 platform_set_drvdata(pdev, s5m8767);
733
734 s5m8767->buck_gpioindex = pdata->buck_default_idx;
735 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
736 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
737 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
738 s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
739 s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
740 s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
741 s5m8767->buck_ds[0] = pdata->buck_ds[0];
742 s5m8767->buck_ds[1] = pdata->buck_ds[1];
743 s5m8767->buck_ds[2] = pdata->buck_ds[2];
744
745 s5m8767->ramp_delay = pdata->buck_ramp_delay;
746 s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
747 s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
748 s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
749 s5m8767->opmode = pdata->opmode;
750
751 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
752 pdata->buck2_init);
753
754 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
755 buck_init);
756
757 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
758 pdata->buck3_init);
759
760 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
761 buck_init);
762
763 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
764 pdata->buck4_init);
765
766 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
767 buck_init);
768
769 for (i = 0; i < 8; i++) {
770 if (s5m8767->buck2_gpiodvs) {
771 s5m8767->buck2_vol[i] =
772 s5m8767_convert_voltage_to_sel(
773 &buck_voltage_val2,
774 pdata->buck2_voltage[i]);
775 }
776
777 if (s5m8767->buck3_gpiodvs) {
778 s5m8767->buck3_vol[i] =
779 s5m8767_convert_voltage_to_sel(
780 &buck_voltage_val2,
781 pdata->buck3_voltage[i]);
782 }
783
784 if (s5m8767->buck4_gpiodvs) {
785 s5m8767->buck4_vol[i] =
786 s5m8767_convert_voltage_to_sel(
787 &buck_voltage_val2,
788 pdata->buck4_voltage[i]);
789 }
790 }
791
792 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
793 pdata->buck4_gpiodvs) {
794
795 if (!gpio_is_valid(pdata->buck_gpios[0]) ||
796 !gpio_is_valid(pdata->buck_gpios[1]) ||
797 !gpio_is_valid(pdata->buck_gpios[2])) {
798 dev_err(&pdev->dev, "GPIO NOT VALID\n");
799 return -EINVAL;
800 }
801
802 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
803 "S5M8767 SET1");
804 if (ret)
805 return ret;
806
807 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
808 "S5M8767 SET2");
809 if (ret)
810 return ret;
811
812 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
813 "S5M8767 SET3");
814 if (ret)
815 return ret;
816
817 /* SET1 GPIO */
818 gpio_direction_output(pdata->buck_gpios[0],
819 (s5m8767->buck_gpioindex >> 2) & 0x1);
820 /* SET2 GPIO */
821 gpio_direction_output(pdata->buck_gpios[1],
822 (s5m8767->buck_gpioindex >> 1) & 0x1);
823 /* SET3 GPIO */
824 gpio_direction_output(pdata->buck_gpios[2],
825 (s5m8767->buck_gpioindex >> 0) & 0x1);
826 }
827
828 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
829 if (ret)
830 return ret;
831
832 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
833 if (ret)
834 return ret;
835
836 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
837 if (ret)
838 return ret;
839
840 /* DS2 GPIO */
841 gpio_direction_output(pdata->buck_ds[0], 0x0);
842 /* DS3 GPIO */
843 gpio_direction_output(pdata->buck_ds[1], 0x0);
844 /* DS4 GPIO */
845 gpio_direction_output(pdata->buck_ds[2], 0x0);
846
847 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
848 pdata->buck4_gpiodvs) {
849 regmap_update_bits(s5m8767->iodev->regmap_pmic,
850 S5M8767_REG_BUCK2CTRL, 1 << 1,
851 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
852 regmap_update_bits(s5m8767->iodev->regmap_pmic,
853 S5M8767_REG_BUCK3CTRL, 1 << 1,
854 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
855 regmap_update_bits(s5m8767->iodev->regmap_pmic,
856 S5M8767_REG_BUCK4CTRL, 1 << 1,
857 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
858 }
859
860 /* Initialize GPIO DVS registers */
861 for (i = 0; i < 8; i++) {
862 if (s5m8767->buck2_gpiodvs) {
863 regmap_write(s5m8767->iodev->regmap_pmic,
864 S5M8767_REG_BUCK2DVS1 + i,
865 s5m8767->buck2_vol[i]);
866 }
867
868 if (s5m8767->buck3_gpiodvs) {
869 regmap_write(s5m8767->iodev->regmap_pmic,
870 S5M8767_REG_BUCK3DVS1 + i,
871 s5m8767->buck3_vol[i]);
872 }
873
874 if (s5m8767->buck4_gpiodvs) {
875 regmap_write(s5m8767->iodev->regmap_pmic,
876 S5M8767_REG_BUCK4DVS1 + i,
877 s5m8767->buck4_vol[i]);
878 }
879 }
880
881 if (s5m8767->buck2_ramp)
882 regmap_update_bits(s5m8767->iodev->regmap_pmic,
883 S5M8767_REG_DVSRAMP, 0x08, 0x08);
884
885 if (s5m8767->buck3_ramp)
886 regmap_update_bits(s5m8767->iodev->regmap_pmic,
887 S5M8767_REG_DVSRAMP, 0x04, 0x04);
888
889 if (s5m8767->buck4_ramp)
890 regmap_update_bits(s5m8767->iodev->regmap_pmic,
891 S5M8767_REG_DVSRAMP, 0x02, 0x02);
892
893 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
894 || s5m8767->buck4_ramp) {
895 unsigned int val;
896 switch (s5m8767->ramp_delay) {
897 case 5:
898 val = S5M8767_DVS_BUCK_RAMP_5;
899 break;
900 case 10:
901 val = S5M8767_DVS_BUCK_RAMP_10;
902 break;
903 case 25:
904 val = S5M8767_DVS_BUCK_RAMP_25;
905 break;
906 case 50:
907 val = S5M8767_DVS_BUCK_RAMP_50;
908 break;
909 case 100:
910 val = S5M8767_DVS_BUCK_RAMP_100;
911 break;
912 default:
913 val = S5M8767_DVS_BUCK_RAMP_10;
914 }
915 regmap_update_bits(s5m8767->iodev->regmap_pmic,
916 S5M8767_REG_DVSRAMP,
917 S5M8767_DVS_BUCK_RAMP_MASK,
918 val << S5M8767_DVS_BUCK_RAMP_SHIFT);
919 }
920
921 for (i = 0; i < pdata->num_regulators; i++) {
922 const struct sec_voltage_desc *desc;
923 int id = pdata->regulators[i].id;
924 int enable_reg, enable_val;
925 struct regulator_dev *rdev;
926
927 desc = reg_voltage_map[id];
928 if (desc) {
929 regulators[id].n_voltages =
930 (desc->max - desc->min) / desc->step + 1;
931 regulators[id].min_uV = desc->min;
932 regulators[id].uV_step = desc->step;
933 regulators[id].vsel_reg =
934 s5m8767_get_vsel_reg(id, s5m8767);
935 if (id < S5M8767_BUCK1)
936 regulators[id].vsel_mask = 0x3f;
937 else
938 regulators[id].vsel_mask = 0xff;
939
940 s5m8767_get_register(s5m8767, id, &enable_reg,
941 &enable_val);
942 regulators[id].enable_reg = enable_reg;
943 regulators[id].enable_mask = S5M8767_ENCTRL_MASK;
944 regulators[id].enable_val = enable_val;
945 }
946
947 config.dev = s5m8767->dev;
948 config.init_data = pdata->regulators[i].initdata;
949 config.driver_data = s5m8767;
950 config.regmap = iodev->regmap_pmic;
951 config.of_node = pdata->regulators[i].reg_node;
952 config.ena_gpio = -EINVAL;
953 config.ena_gpio_flags = 0;
954 config.ena_gpio_initialized = true;
955 if (gpio_is_valid(pdata->regulators[i].ext_control_gpio))
956 s5m8767_regulator_config_ext_control(s5m8767,
957 &pdata->regulators[i], &config);
958
959 rdev = devm_regulator_register(&pdev->dev, &regulators[id],
960 &config);
961 if (IS_ERR(rdev)) {
962 ret = PTR_ERR(rdev);
963 dev_err(s5m8767->dev, "regulator init failed for %d\n",
964 id);
965 return ret;
966 }
967
968 if (gpio_is_valid(pdata->regulators[i].ext_control_gpio)) {
969 ret = s5m8767_enable_ext_control(s5m8767, rdev);
970 if (ret < 0) {
971 dev_err(s5m8767->dev,
972 "failed to enable gpio control over %s: %d\n",
973 rdev->desc->name, ret);
974 return ret;
975 }
976 }
977 }
978
979 return 0;
980 }
981
982 static const struct platform_device_id s5m8767_pmic_id[] = {
983 { "s5m8767-pmic", 0},
984 { },
985 };
986 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
987
988 static struct platform_driver s5m8767_pmic_driver = {
989 .driver = {
990 .name = "s5m8767-pmic",
991 },
992 .probe = s5m8767_pmic_probe,
993 .id_table = s5m8767_pmic_id,
994 };
995
996 static int __init s5m8767_pmic_init(void)
997 {
998 return platform_driver_register(&s5m8767_pmic_driver);
999 }
1000 subsys_initcall(s5m8767_pmic_init);
1001
1002 static void __exit s5m8767_pmic_exit(void)
1003 {
1004 platform_driver_unregister(&s5m8767_pmic_driver);
1005 }
1006 module_exit(s5m8767_pmic_exit);
1007
1008 /* Module information */
1009 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
1010 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
1011 MODULE_LICENSE("GPL");
Linux with added FPC-III support