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mmc: rtsx_pci: Enable MMC_CAP_ERASE to allow erase/discard/trim requests
[linux/fpc-iii.git] / drivers / iio / adc / ad799x.c
bloba3f5254f4e512d1f11e4be9c27b3333095757704
1 /*
2 * iio/adc/ad799x.c
3 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
4 *
5 * based on iio/adc/max1363
6 * Copyright (C) 2008-2010 Jonathan Cameron
7 *
8 * based on linux/drivers/i2c/chips/max123x
9 * Copyright (C) 2002-2004 Stefan Eletzhofer
10 *
11 * based on linux/drivers/acron/char/pcf8583.c
12 * Copyright (C) 2000 Russell King
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 * ad799x.c
19 *
20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
21 * ad7998 and similar chips.
22 *
23 */
24
25 #include <linux/interrupt.h>
26 #include <linux/device.h>
27 #include <linux/kernel.h>
28 #include <linux/sysfs.h>
29 #include <linux/i2c.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/slab.h>
32 #include <linux/types.h>
33 #include <linux/err.h>
34 #include <linux/module.h>
35 #include <linux/bitops.h>
36
37 #include <linux/iio/iio.h>
38 #include <linux/iio/sysfs.h>
39 #include <linux/iio/events.h>
40 #include <linux/iio/buffer.h>
41 #include <linux/iio/trigger_consumer.h>
42 #include <linux/iio/triggered_buffer.h>
43
44 #define AD799X_CHANNEL_SHIFT 4
45
46 /*
47 * AD7991, AD7995 and AD7999 defines
48 */
49
50 #define AD7991_REF_SEL 0x08
51 #define AD7991_FLTR 0x04
52 #define AD7991_BIT_TRIAL_DELAY 0x02
53 #define AD7991_SAMPLE_DELAY 0x01
54
55 /*
56 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
57 */
58
59 #define AD7998_FLTR BIT(3)
60 #define AD7998_ALERT_EN BIT(2)
61 #define AD7998_BUSY_ALERT BIT(1)
62 #define AD7998_BUSY_ALERT_POL BIT(0)
63
64 #define AD7998_CONV_RES_REG 0x0
65 #define AD7998_ALERT_STAT_REG 0x1
66 #define AD7998_CONF_REG 0x2
67 #define AD7998_CYCLE_TMR_REG 0x3
68
69 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
70 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
71 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
72
73 #define AD7998_CYC_MASK GENMASK(2, 0)
74 #define AD7998_CYC_DIS 0x0
75 #define AD7998_CYC_TCONF_32 0x1
76 #define AD7998_CYC_TCONF_64 0x2
77 #define AD7998_CYC_TCONF_128 0x3
78 #define AD7998_CYC_TCONF_256 0x4
79 #define AD7998_CYC_TCONF_512 0x5
80 #define AD7998_CYC_TCONF_1024 0x6
81 #define AD7998_CYC_TCONF_2048 0x7
82
83 #define AD7998_ALERT_STAT_CLEAR 0xFF
84
85 /*
86 * AD7997 and AD7997 defines
87 */
88
89 #define AD7997_8_READ_SINGLE BIT(7)
90 #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
91
92 enum {
93 ad7991,
94 ad7995,
95 ad7999,
96 ad7992,
97 ad7993,
98 ad7994,
99 ad7997,
100 ad7998
101 };
102
103 /**
104 * struct ad799x_chip_config - chip specific information
105 * @channel: channel specification
106 * @default_config: device default configuration
107 * @info: pointer to iio_info struct
108 */
109 struct ad799x_chip_config {
110 const struct iio_chan_spec channel[9];
111 u16 default_config;
112 const struct iio_info *info;
113 };
114
115 /**
116 * struct ad799x_chip_info - chip specific information
117 * @num_channels: number of channels
118 * @noirq_config: device configuration w/o IRQ
119 * @irq_config: device configuration w/IRQ
120 */
121 struct ad799x_chip_info {
122 int num_channels;
123 const struct ad799x_chip_config noirq_config;
124 const struct ad799x_chip_config irq_config;
125 };
126
127 struct ad799x_state {
128 struct i2c_client *client;
129 const struct ad799x_chip_config *chip_config;
130 struct regulator *reg;
131 struct regulator *vref;
132 unsigned id;
133 u16 config;
134
135 u8 *rx_buf;
136 unsigned int transfer_size;
137 };
138
139 static int ad799x_write_config(struct ad799x_state *st, u16 val)
140 {
141 switch (st->id) {
142 case ad7997:
143 case ad7998:
144 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
145 val);
146 case ad7992:
147 case ad7993:
148 case ad7994:
149 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
150 val);
151 default:
152 /* Will be written when doing a conversion */
153 st->config = val;
154 return 0;
155 }
156 }
157
158 static int ad799x_read_config(struct ad799x_state *st)
159 {
160 switch (st->id) {
161 case ad7997:
162 case ad7998:
163 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
164 case ad7992:
165 case ad7993:
166 case ad7994:
167 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
168 default:
169 /* No readback support */
170 return st->config;
171 }
172 }
173
174 /**
175 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
176 *
177 * Currently there is no option in this driver to disable the saving of
178 * timestamps within the ring.
179 **/
180 static irqreturn_t ad799x_trigger_handler(int irq, void *p)
181 {
182 struct iio_poll_func *pf = p;
183 struct iio_dev *indio_dev = pf->indio_dev;
184 struct ad799x_state *st = iio_priv(indio_dev);
185 int b_sent;
186 u8 cmd;
187
188 switch (st->id) {
189 case ad7991:
190 case ad7995:
191 case ad7999:
192 cmd = st->config |
193 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
194 break;
195 case ad7992:
196 case ad7993:
197 case ad7994:
198 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
199 AD7998_CONV_RES_REG;
200 break;
201 case ad7997:
202 case ad7998:
203 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
204 break;
205 default:
206 cmd = 0;
207 }
208
209 b_sent = i2c_smbus_read_i2c_block_data(st->client,
210 cmd, st->transfer_size, st->rx_buf);
211 if (b_sent < 0)
212 goto out;
213
214 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
215 iio_get_time_ns());
216 out:
217 iio_trigger_notify_done(indio_dev->trig);
218
219 return IRQ_HANDLED;
220 }
221
222 static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
223 const unsigned long *scan_mask)
224 {
225 struct ad799x_state *st = iio_priv(indio_dev);
226
227 kfree(st->rx_buf);
228 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
229 if (!st->rx_buf)
230 return -ENOMEM;
231
232 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
233
234 switch (st->id) {
235 case ad7992:
236 case ad7993:
237 case ad7994:
238 case ad7997:
239 case ad7998:
240 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
241 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
242 return ad799x_write_config(st, st->config);
243 default:
244 return 0;
245 }
246 }
247
248 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
249 {
250 u8 cmd;
251
252 switch (st->id) {
253 case ad7991:
254 case ad7995:
255 case ad7999:
256 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
257 break;
258 case ad7992:
259 case ad7993:
260 case ad7994:
261 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
262 break;
263 case ad7997:
264 case ad7998:
265 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
266 break;
267 default:
268 return -EINVAL;
269 }
270
271 return i2c_smbus_read_word_swapped(st->client, cmd);
272 }
273
274 static int ad799x_read_raw(struct iio_dev *indio_dev,
275 struct iio_chan_spec const *chan,
276 int *val,
277 int *val2,
278 long m)
279 {
280 int ret;
281 struct ad799x_state *st = iio_priv(indio_dev);
282
283 switch (m) {
284 case IIO_CHAN_INFO_RAW:
285 mutex_lock(&indio_dev->mlock);
286 if (iio_buffer_enabled(indio_dev))
287 ret = -EBUSY;
288 else
289 ret = ad799x_scan_direct(st, chan->scan_index);
290 mutex_unlock(&indio_dev->mlock);
291
292 if (ret < 0)
293 return ret;
294 *val = (ret >> chan->scan_type.shift) &
295 GENMASK(chan->scan_type.realbits - 1, 0);
296 return IIO_VAL_INT;
297 case IIO_CHAN_INFO_SCALE:
298 ret = regulator_get_voltage(st->vref);
299 if (ret < 0)
300 return ret;
301 *val = ret / 1000;
302 *val2 = chan->scan_type.realbits;
303 return IIO_VAL_FRACTIONAL_LOG2;
304 }
305 return -EINVAL;
306 }
307 static const unsigned int ad7998_frequencies[] = {
308 [AD7998_CYC_DIS] = 0,
309 [AD7998_CYC_TCONF_32] = 15625,
310 [AD7998_CYC_TCONF_64] = 7812,
311 [AD7998_CYC_TCONF_128] = 3906,
312 [AD7998_CYC_TCONF_512] = 976,
313 [AD7998_CYC_TCONF_1024] = 488,
314 [AD7998_CYC_TCONF_2048] = 244,
315 };
316
317 static ssize_t ad799x_read_frequency(struct device *dev,
318 struct device_attribute *attr,
319 char *buf)
320 {
321 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
322 struct ad799x_state *st = iio_priv(indio_dev);
323
324 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
325 if (ret < 0)
326 return ret;
327
328 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
329 }
330
331 static ssize_t ad799x_write_frequency(struct device *dev,
332 struct device_attribute *attr,
333 const char *buf,
334 size_t len)
335 {
336 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
337 struct ad799x_state *st = iio_priv(indio_dev);
338
339 long val;
340 int ret, i;
341
342 ret = kstrtol(buf, 10, &val);
343 if (ret)
344 return ret;
345
346 mutex_lock(&indio_dev->mlock);
347 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
348 if (ret < 0)
349 goto error_ret_mutex;
350 /* Wipe the bits clean */
351 ret &= ~AD7998_CYC_MASK;
352
353 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
354 if (val == ad7998_frequencies[i])
355 break;
356 if (i == ARRAY_SIZE(ad7998_frequencies)) {
357 ret = -EINVAL;
358 goto error_ret_mutex;
359 }
360
361 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
362 ret | i);
363 if (ret < 0)
364 goto error_ret_mutex;
365 ret = len;
366
367 error_ret_mutex:
368 mutex_unlock(&indio_dev->mlock);
369
370 return ret;
371 }
372
373 static int ad799x_read_event_config(struct iio_dev *indio_dev,
374 const struct iio_chan_spec *chan,
375 enum iio_event_type type,
376 enum iio_event_direction dir)
377 {
378 struct ad799x_state *st = iio_priv(indio_dev);
379
380 if (!(st->config & AD7998_ALERT_EN))
381 return 0;
382
383 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
384 return 1;
385
386 return 0;
387 }
388
389 static int ad799x_write_event_config(struct iio_dev *indio_dev,
390 const struct iio_chan_spec *chan,
391 enum iio_event_type type,
392 enum iio_event_direction dir,
393 int state)
394 {
395 struct ad799x_state *st = iio_priv(indio_dev);
396 int ret;
397
398 mutex_lock(&indio_dev->mlock);
399 if (iio_buffer_enabled(indio_dev)) {
400 ret = -EBUSY;
401 goto done;
402 }
403
404 if (state)
405 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
406 else
407 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
408
409 if (st->config >> AD799X_CHANNEL_SHIFT)
410 st->config |= AD7998_ALERT_EN;
411 else
412 st->config &= ~AD7998_ALERT_EN;
413
414 ret = ad799x_write_config(st, st->config);
415
416 done:
417 mutex_unlock(&indio_dev->mlock);
418
419 return ret;
420 }
421
422 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
423 enum iio_event_direction dir,
424 enum iio_event_info info)
425 {
426 switch (info) {
427 case IIO_EV_INFO_VALUE:
428 if (dir == IIO_EV_DIR_FALLING)
429 return AD7998_DATALOW_REG(chan->channel);
430 else
431 return AD7998_DATAHIGH_REG(chan->channel);
432 case IIO_EV_INFO_HYSTERESIS:
433 return AD7998_HYST_REG(chan->channel);
434 default:
435 return -EINVAL;
436 }
437
438 return 0;
439 }
440
441 static int ad799x_write_event_value(struct iio_dev *indio_dev,
442 const struct iio_chan_spec *chan,
443 enum iio_event_type type,
444 enum iio_event_direction dir,
445 enum iio_event_info info,
446 int val, int val2)
447 {
448 int ret;
449 struct ad799x_state *st = iio_priv(indio_dev);
450
451 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
452 return -EINVAL;
453
454 mutex_lock(&indio_dev->mlock);
455 ret = i2c_smbus_write_word_swapped(st->client,
456 ad799x_threshold_reg(chan, dir, info),
457 val << chan->scan_type.shift);
458 mutex_unlock(&indio_dev->mlock);
459
460 return ret;
461 }
462
463 static int ad799x_read_event_value(struct iio_dev *indio_dev,
464 const struct iio_chan_spec *chan,
465 enum iio_event_type type,
466 enum iio_event_direction dir,
467 enum iio_event_info info,
468 int *val, int *val2)
469 {
470 int ret;
471 struct ad799x_state *st = iio_priv(indio_dev);
472
473 mutex_lock(&indio_dev->mlock);
474 ret = i2c_smbus_read_word_swapped(st->client,
475 ad799x_threshold_reg(chan, dir, info));
476 mutex_unlock(&indio_dev->mlock);
477 if (ret < 0)
478 return ret;
479 *val = (ret >> chan->scan_type.shift) &
480 GENMASK(chan->scan_type.realbits - 1, 0);
481
482 return IIO_VAL_INT;
483 }
484
485 static irqreturn_t ad799x_event_handler(int irq, void *private)
486 {
487 struct iio_dev *indio_dev = private;
488 struct ad799x_state *st = iio_priv(private);
489 int i, ret;
490
491 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
492 if (ret <= 0)
493 goto done;
494
495 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
496 AD7998_ALERT_STAT_CLEAR) < 0)
497 goto done;
498
499 for (i = 0; i < 8; i++) {
500 if (ret & BIT(i))
501 iio_push_event(indio_dev,
502 i & 0x1 ?
503 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
504 (i >> 1),
505 IIO_EV_TYPE_THRESH,
506 IIO_EV_DIR_RISING) :
507 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
508 (i >> 1),
509 IIO_EV_TYPE_THRESH,
510 IIO_EV_DIR_FALLING),
511 iio_get_time_ns());
512 }
513
514 done:
515 return IRQ_HANDLED;
516 }
517
518 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
519 ad799x_read_frequency,
520 ad799x_write_frequency);
521 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
522
523 static struct attribute *ad799x_event_attributes[] = {
524 &iio_dev_attr_sampling_frequency.dev_attr.attr,
525 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
526 NULL,
527 };
528
529 static struct attribute_group ad799x_event_attrs_group = {
530 .attrs = ad799x_event_attributes,
531 };
532
533 static const struct iio_info ad7991_info = {
534 .read_raw = &ad799x_read_raw,
535 .driver_module = THIS_MODULE,
536 };
537
538 static const struct iio_info ad7993_4_7_8_noirq_info = {
539 .read_raw = &ad799x_read_raw,
540 .driver_module = THIS_MODULE,
541 .update_scan_mode = ad799x_update_scan_mode,
542 };
543
544 static const struct iio_info ad7993_4_7_8_irq_info = {
545 .read_raw = &ad799x_read_raw,
546 .event_attrs = &ad799x_event_attrs_group,
547 .read_event_config = &ad799x_read_event_config,
548 .write_event_config = &ad799x_write_event_config,
549 .read_event_value = &ad799x_read_event_value,
550 .write_event_value = &ad799x_write_event_value,
551 .driver_module = THIS_MODULE,
552 .update_scan_mode = ad799x_update_scan_mode,
553 };
554
555 static const struct iio_event_spec ad799x_events[] = {
556 {
557 .type = IIO_EV_TYPE_THRESH,
558 .dir = IIO_EV_DIR_RISING,
559 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
560 BIT(IIO_EV_INFO_ENABLE),
561 }, {
562 .type = IIO_EV_TYPE_THRESH,
563 .dir = IIO_EV_DIR_FALLING,
564 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
565 BIT(IIO_EV_INFO_ENABLE),
566 }, {
567 .type = IIO_EV_TYPE_THRESH,
568 .dir = IIO_EV_DIR_EITHER,
569 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
570 },
571 };
572
573 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
574 .type = IIO_VOLTAGE, \
575 .indexed = 1, \
576 .channel = (_index), \
577 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
578 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
579 .scan_index = (_index), \
580 .scan_type = { \
581 .sign = 'u', \
582 .realbits = (_realbits), \
583 .storagebits = 16, \
584 .shift = 12 - (_realbits), \
585 .endianness = IIO_BE, \
586 }, \
587 .event_spec = _ev_spec, \
588 .num_event_specs = _num_ev_spec, \
589 }
590
591 #define AD799X_CHANNEL(_index, _realbits) \
592 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
593
594 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
595 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
596 ARRAY_SIZE(ad799x_events))
597
598 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
599 [ad7991] = {
600 .num_channels = 5,
601 .noirq_config = {
602 .channel = {
603 AD799X_CHANNEL(0, 12),
604 AD799X_CHANNEL(1, 12),
605 AD799X_CHANNEL(2, 12),
606 AD799X_CHANNEL(3, 12),
607 IIO_CHAN_SOFT_TIMESTAMP(4),
608 },
609 .info = &ad7991_info,
610 },
611 },
612 [ad7995] = {
613 .num_channels = 5,
614 .noirq_config = {
615 .channel = {
616 AD799X_CHANNEL(0, 10),
617 AD799X_CHANNEL(1, 10),
618 AD799X_CHANNEL(2, 10),
619 AD799X_CHANNEL(3, 10),
620 IIO_CHAN_SOFT_TIMESTAMP(4),
621 },
622 .info = &ad7991_info,
623 },
624 },
625 [ad7999] = {
626 .num_channels = 5,
627 .noirq_config = {
628 .channel = {
629 AD799X_CHANNEL(0, 8),
630 AD799X_CHANNEL(1, 8),
631 AD799X_CHANNEL(2, 8),
632 AD799X_CHANNEL(3, 8),
633 IIO_CHAN_SOFT_TIMESTAMP(4),
634 },
635 .info = &ad7991_info,
636 },
637 },
638 [ad7992] = {
639 .num_channels = 3,
640 .noirq_config = {
641 .channel = {
642 AD799X_CHANNEL(0, 12),
643 AD799X_CHANNEL(1, 12),
644 IIO_CHAN_SOFT_TIMESTAMP(3),
645 },
646 .info = &ad7993_4_7_8_noirq_info,
647 },
648 .irq_config = {
649 .channel = {
650 AD799X_CHANNEL_WITH_EVENTS(0, 12),
651 AD799X_CHANNEL_WITH_EVENTS(1, 12),
652 IIO_CHAN_SOFT_TIMESTAMP(3),
653 },
654 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
655 .info = &ad7993_4_7_8_irq_info,
656 },
657 },
658 [ad7993] = {
659 .num_channels = 5,
660 .noirq_config = {
661 .channel = {
662 AD799X_CHANNEL(0, 10),
663 AD799X_CHANNEL(1, 10),
664 AD799X_CHANNEL(2, 10),
665 AD799X_CHANNEL(3, 10),
666 IIO_CHAN_SOFT_TIMESTAMP(4),
667 },
668 .info = &ad7993_4_7_8_noirq_info,
669 },
670 .irq_config = {
671 .channel = {
672 AD799X_CHANNEL_WITH_EVENTS(0, 10),
673 AD799X_CHANNEL_WITH_EVENTS(1, 10),
674 AD799X_CHANNEL_WITH_EVENTS(2, 10),
675 AD799X_CHANNEL_WITH_EVENTS(3, 10),
676 IIO_CHAN_SOFT_TIMESTAMP(4),
677 },
678 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
679 .info = &ad7993_4_7_8_irq_info,
680 },
681 },
682 [ad7994] = {
683 .num_channels = 5,
684 .noirq_config = {
685 .channel = {
686 AD799X_CHANNEL(0, 12),
687 AD799X_CHANNEL(1, 12),
688 AD799X_CHANNEL(2, 12),
689 AD799X_CHANNEL(3, 12),
690 IIO_CHAN_SOFT_TIMESTAMP(4),
691 },
692 .info = &ad7993_4_7_8_noirq_info,
693 },
694 .irq_config = {
695 .channel = {
696 AD799X_CHANNEL_WITH_EVENTS(0, 12),
697 AD799X_CHANNEL_WITH_EVENTS(1, 12),
698 AD799X_CHANNEL_WITH_EVENTS(2, 12),
699 AD799X_CHANNEL_WITH_EVENTS(3, 12),
700 IIO_CHAN_SOFT_TIMESTAMP(4),
701 },
702 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
703 .info = &ad7993_4_7_8_irq_info,
704 },
705 },
706 [ad7997] = {
707 .num_channels = 9,
708 .noirq_config = {
709 .channel = {
710 AD799X_CHANNEL(0, 10),
711 AD799X_CHANNEL(1, 10),
712 AD799X_CHANNEL(2, 10),
713 AD799X_CHANNEL(3, 10),
714 AD799X_CHANNEL(4, 10),
715 AD799X_CHANNEL(5, 10),
716 AD799X_CHANNEL(6, 10),
717 AD799X_CHANNEL(7, 10),
718 IIO_CHAN_SOFT_TIMESTAMP(8),
719 },
720 .info = &ad7993_4_7_8_noirq_info,
721 },
722 .irq_config = {
723 .channel = {
724 AD799X_CHANNEL_WITH_EVENTS(0, 10),
725 AD799X_CHANNEL_WITH_EVENTS(1, 10),
726 AD799X_CHANNEL_WITH_EVENTS(2, 10),
727 AD799X_CHANNEL_WITH_EVENTS(3, 10),
728 AD799X_CHANNEL(4, 10),
729 AD799X_CHANNEL(5, 10),
730 AD799X_CHANNEL(6, 10),
731 AD799X_CHANNEL(7, 10),
732 IIO_CHAN_SOFT_TIMESTAMP(8),
733 },
734 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
735 .info = &ad7993_4_7_8_irq_info,
736 },
737 },
738 [ad7998] = {
739 .num_channels = 9,
740 .noirq_config = {
741 .channel = {
742 AD799X_CHANNEL(0, 12),
743 AD799X_CHANNEL(1, 12),
744 AD799X_CHANNEL(2, 12),
745 AD799X_CHANNEL(3, 12),
746 AD799X_CHANNEL(4, 12),
747 AD799X_CHANNEL(5, 12),
748 AD799X_CHANNEL(6, 12),
749 AD799X_CHANNEL(7, 12),
750 IIO_CHAN_SOFT_TIMESTAMP(8),
751 },
752 .info = &ad7993_4_7_8_noirq_info,
753 },
754 .irq_config = {
755 .channel = {
756 AD799X_CHANNEL_WITH_EVENTS(0, 12),
757 AD799X_CHANNEL_WITH_EVENTS(1, 12),
758 AD799X_CHANNEL_WITH_EVENTS(2, 12),
759 AD799X_CHANNEL_WITH_EVENTS(3, 12),
760 AD799X_CHANNEL(4, 12),
761 AD799X_CHANNEL(5, 12),
762 AD799X_CHANNEL(6, 12),
763 AD799X_CHANNEL(7, 12),
764 IIO_CHAN_SOFT_TIMESTAMP(8),
765 },
766 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
767 .info = &ad7993_4_7_8_irq_info,
768 },
769 },
770 };
771
772 static int ad799x_probe(struct i2c_client *client,
773 const struct i2c_device_id *id)
774 {
775 int ret;
776 struct ad799x_state *st;
777 struct iio_dev *indio_dev;
778 const struct ad799x_chip_info *chip_info =
779 &ad799x_chip_info_tbl[id->driver_data];
780
781 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
782 if (indio_dev == NULL)
783 return -ENOMEM;
784
785 st = iio_priv(indio_dev);
786 /* this is only used for device removal purposes */
787 i2c_set_clientdata(client, indio_dev);
788
789 st->id = id->driver_data;
790 if (client->irq > 0 && chip_info->irq_config.info)
791 st->chip_config = &chip_info->irq_config;
792 else
793 st->chip_config = &chip_info->noirq_config;
794
795 /* TODO: Add pdata options for filtering and bit delay */
796
797 st->reg = devm_regulator_get(&client->dev, "vcc");
798 if (IS_ERR(st->reg))
799 return PTR_ERR(st->reg);
800 ret = regulator_enable(st->reg);
801 if (ret)
802 return ret;
803 st->vref = devm_regulator_get(&client->dev, "vref");
804 if (IS_ERR(st->vref)) {
805 ret = PTR_ERR(st->vref);
806 goto error_disable_reg;
807 }
808 ret = regulator_enable(st->vref);
809 if (ret)
810 goto error_disable_reg;
811
812 st->client = client;
813
814 indio_dev->dev.parent = &client->dev;
815 indio_dev->name = id->name;
816 indio_dev->info = st->chip_config->info;
817
818 indio_dev->modes = INDIO_DIRECT_MODE;
819 indio_dev->channels = st->chip_config->channel;
820 indio_dev->num_channels = chip_info->num_channels;
821
822 ret = ad799x_write_config(st, st->chip_config->default_config);
823 if (ret < 0)
824 goto error_disable_reg;
825 ret = ad799x_read_config(st);
826 if (ret < 0)
827 goto error_disable_reg;
828 st->config = ret;
829
830 ret = iio_triggered_buffer_setup(indio_dev, NULL,
831 &ad799x_trigger_handler, NULL);
832 if (ret)
833 goto error_disable_vref;
834
835 if (client->irq > 0) {
836 ret = devm_request_threaded_irq(&client->dev,
837 client->irq,
838 NULL,
839 ad799x_event_handler,
840 IRQF_TRIGGER_FALLING |
841 IRQF_ONESHOT,
842 client->name,
843 indio_dev);
844 if (ret)
845 goto error_cleanup_ring;
846 }
847 ret = iio_device_register(indio_dev);
848 if (ret)
849 goto error_cleanup_ring;
850
851 return 0;
852
853 error_cleanup_ring:
854 iio_triggered_buffer_cleanup(indio_dev);
855 error_disable_vref:
856 regulator_disable(st->vref);
857 error_disable_reg:
858 regulator_disable(st->reg);
859
860 return ret;
861 }
862
863 static int ad799x_remove(struct i2c_client *client)
864 {
865 struct iio_dev *indio_dev = i2c_get_clientdata(client);
866 struct ad799x_state *st = iio_priv(indio_dev);
867
868 iio_device_unregister(indio_dev);
869
870 iio_triggered_buffer_cleanup(indio_dev);
871 regulator_disable(st->vref);
872 regulator_disable(st->reg);
873 kfree(st->rx_buf);
874
875 return 0;
876 }
877
878 static const struct i2c_device_id ad799x_id[] = {
879 { "ad7991", ad7991 },
880 { "ad7995", ad7995 },
881 { "ad7999", ad7999 },
882 { "ad7992", ad7992 },
883 { "ad7993", ad7993 },
884 { "ad7994", ad7994 },
885 { "ad7997", ad7997 },
886 { "ad7998", ad7998 },
887 {}
888 };
889
890 MODULE_DEVICE_TABLE(i2c, ad799x_id);
891
892 static struct i2c_driver ad799x_driver = {
893 .driver = {
894 .name = "ad799x",
895 },
896 .probe = ad799x_probe,
897 .remove = ad799x_remove,
898 .id_table = ad799x_id,
899 };
900 module_i2c_driver(ad799x_driver);
901
902 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
903 MODULE_DESCRIPTION("Analog Devices AD799x ADC");
904 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support