mmc: rtsx_pci: Enable MMC_CAP_ERASE to allow erase/discard/trim requests
[linux/fpc-iii.git] / drivers / mfd / intel_quark_i2c_gpio.c
blob7946d6e38b87201e3904f3247d2807c2ed174ca4
1 /*
2 * Intel Quark MFD PCI driver for I2C & GPIO
4 * Copyright(c) 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * Intel Quark PCI device for I2C and GPIO controller sharing the same
16 * PCI function. This PCI driver will split the 2 devices into their
17 * respective drivers.
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/mfd/core.h>
24 #include <linux/clkdev.h>
25 #include <linux/clk-provider.h>
26 #include <linux/dmi.h>
27 #include <linux/platform_data/gpio-dwapb.h>
28 #include <linux/platform_data/i2c-designware.h>
30 /* PCI BAR for register base address */
31 #define MFD_I2C_BAR 0
32 #define MFD_GPIO_BAR 1
34 /* ACPI _ADR value to match the child node */
35 #define MFD_ACPI_MATCH_GPIO 0ULL
36 #define MFD_ACPI_MATCH_I2C 1ULL
38 /* The base GPIO number under GPIOLIB framework */
39 #define INTEL_QUARK_MFD_GPIO_BASE 8
41 /* The default number of South-Cluster GPIO on Quark. */
42 #define INTEL_QUARK_MFD_NGPIO 8
44 /* The DesignWare GPIO ports on Quark. */
45 #define INTEL_QUARK_GPIO_NPORTS 1
47 #define INTEL_QUARK_IORES_MEM 0
48 #define INTEL_QUARK_IORES_IRQ 1
50 #define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
52 /* The Quark I2C controller source clock */
53 #define INTEL_QUARK_I2C_CLK_HZ 33000000
55 struct intel_quark_mfd {
56 struct device *dev;
57 struct clk *i2c_clk;
58 struct clk_lookup *i2c_clk_lookup;
61 struct i2c_mode_info {
62 const char *name;
63 unsigned int i2c_scl_freq;
66 static const struct i2c_mode_info platform_i2c_mode_info[] = {
68 .name = "Galileo",
69 .i2c_scl_freq = 100000,
72 .name = "GalileoGen2",
73 .i2c_scl_freq = 400000,
78 static struct resource intel_quark_i2c_res[] = {
79 [INTEL_QUARK_IORES_MEM] = {
80 .flags = IORESOURCE_MEM,
82 [INTEL_QUARK_IORES_IRQ] = {
83 .flags = IORESOURCE_IRQ,
87 static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
88 .adr = MFD_ACPI_MATCH_I2C,
91 static struct resource intel_quark_gpio_res[] = {
92 [INTEL_QUARK_IORES_MEM] = {
93 .flags = IORESOURCE_MEM,
97 static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
98 .adr = MFD_ACPI_MATCH_GPIO,
101 static struct mfd_cell intel_quark_mfd_cells[] = {
103 .id = MFD_GPIO_BAR,
104 .name = "gpio-dwapb",
105 .acpi_match = &intel_quark_acpi_match_gpio,
106 .num_resources = ARRAY_SIZE(intel_quark_gpio_res),
107 .resources = intel_quark_gpio_res,
108 .ignore_resource_conflicts = true,
111 .id = MFD_I2C_BAR,
112 .name = "i2c_designware",
113 .acpi_match = &intel_quark_acpi_match_i2c,
114 .num_resources = ARRAY_SIZE(intel_quark_i2c_res),
115 .resources = intel_quark_i2c_res,
116 .ignore_resource_conflicts = true,
120 static const struct pci_device_id intel_quark_mfd_ids[] = {
121 { PCI_VDEVICE(INTEL, 0x0934), },
124 MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
126 static int intel_quark_register_i2c_clk(struct device *dev)
128 struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
129 struct clk *i2c_clk;
131 i2c_clk = clk_register_fixed_rate(dev,
132 INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
133 0, INTEL_QUARK_I2C_CLK_HZ);
134 if (IS_ERR(i2c_clk))
135 return PTR_ERR(i2c_clk);
137 quark_mfd->i2c_clk = i2c_clk;
138 quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
139 INTEL_QUARK_I2C_CONTROLLER_CLK);
141 if (!quark_mfd->i2c_clk_lookup) {
142 clk_unregister(quark_mfd->i2c_clk);
143 dev_err(dev, "Fixed clk register failed\n");
144 return -ENOMEM;
147 return 0;
150 static void intel_quark_unregister_i2c_clk(struct device *dev)
152 struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
154 if (!quark_mfd->i2c_clk_lookup)
155 return;
157 clkdev_drop(quark_mfd->i2c_clk_lookup);
158 clk_unregister(quark_mfd->i2c_clk);
161 static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
163 const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
164 const struct i2c_mode_info *info;
165 struct dw_i2c_platform_data *pdata;
166 struct resource *res = (struct resource *)cell->resources;
167 struct device *dev = &pdev->dev;
169 res[INTEL_QUARK_IORES_MEM].start =
170 pci_resource_start(pdev, MFD_I2C_BAR);
171 res[INTEL_QUARK_IORES_MEM].end =
172 pci_resource_end(pdev, MFD_I2C_BAR);
174 res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
175 res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
177 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
178 if (!pdata)
179 return -ENOMEM;
181 /* Normal mode by default */
182 pdata->i2c_scl_freq = 100000;
184 if (board_name) {
185 for (info = platform_i2c_mode_info; info->name; info++) {
186 if (!strcmp(board_name, info->name)) {
187 pdata->i2c_scl_freq = info->i2c_scl_freq;
188 break;
193 cell->platform_data = pdata;
194 cell->pdata_size = sizeof(*pdata);
196 return 0;
199 static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
201 struct dwapb_platform_data *pdata;
202 struct resource *res = (struct resource *)cell->resources;
203 struct device *dev = &pdev->dev;
205 res[INTEL_QUARK_IORES_MEM].start =
206 pci_resource_start(pdev, MFD_GPIO_BAR);
207 res[INTEL_QUARK_IORES_MEM].end =
208 pci_resource_end(pdev, MFD_GPIO_BAR);
210 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
211 if (!pdata)
212 return -ENOMEM;
214 /* For intel quark x1000, it has only one port: portA */
215 pdata->nports = INTEL_QUARK_GPIO_NPORTS;
216 pdata->properties = devm_kcalloc(dev, pdata->nports,
217 sizeof(*pdata->properties),
218 GFP_KERNEL);
219 if (!pdata->properties)
220 return -ENOMEM;
222 /* Set the properties for portA */
223 pdata->properties->fwnode = NULL;
224 pdata->properties->idx = 0;
225 pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
226 pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
227 pdata->properties->irq = pdev->irq;
228 pdata->properties->irq_shared = true;
230 cell->platform_data = pdata;
231 cell->pdata_size = sizeof(*pdata);
233 return 0;
236 static int intel_quark_mfd_probe(struct pci_dev *pdev,
237 const struct pci_device_id *id)
239 struct intel_quark_mfd *quark_mfd;
240 int ret;
242 ret = pcim_enable_device(pdev);
243 if (ret)
244 return ret;
246 quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
247 if (!quark_mfd)
248 return -ENOMEM;
250 quark_mfd->dev = &pdev->dev;
251 dev_set_drvdata(&pdev->dev, quark_mfd);
253 ret = intel_quark_register_i2c_clk(&pdev->dev);
254 if (ret)
255 return ret;
257 ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
258 if (ret)
259 goto err_unregister_i2c_clk;
261 ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
262 if (ret)
263 goto err_unregister_i2c_clk;
265 ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
266 ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
267 NULL);
268 if (ret)
269 goto err_unregister_i2c_clk;
271 return 0;
273 err_unregister_i2c_clk:
274 intel_quark_unregister_i2c_clk(&pdev->dev);
275 return ret;
278 static void intel_quark_mfd_remove(struct pci_dev *pdev)
280 intel_quark_unregister_i2c_clk(&pdev->dev);
281 mfd_remove_devices(&pdev->dev);
284 static struct pci_driver intel_quark_mfd_driver = {
285 .name = "intel_quark_mfd_i2c_gpio",
286 .id_table = intel_quark_mfd_ids,
287 .probe = intel_quark_mfd_probe,
288 .remove = intel_quark_mfd_remove,
291 module_pci_driver(intel_quark_mfd_driver);
293 MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
294 MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
295 MODULE_LICENSE("GPL v2");