mmc: rtsx_pci: Enable MMC_CAP_ERASE to allow erase/discard/trim requests
[linux/fpc-iii.git] / drivers / usb / dwc3 / dwc3-pci.c
blob14196cd416b3dda692fa12e70d6ce627074f7d3d
1 /**
2 * dwc3-pci.c - PCI Specific glue layer
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/platform_device.h>
24 #include <linux/gpio/consumer.h>
25 #include <linux/acpi.h>
27 #include "platform_data.h"
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
41 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
42 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
44 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
45 { "reset-gpios", &reset_gpios, 1 },
46 { "cs-gpios", &cs_gpios, 1 },
47 { },
50 static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3)
52 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
53 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
54 struct dwc3_platform_data pdata;
56 memset(&pdata, 0, sizeof(pdata));
58 pdata.has_lpm_erratum = true;
59 pdata.lpm_nyet_threshold = 0xf;
61 pdata.u2exit_lfps_quirk = true;
62 pdata.u2ss_inp3_quirk = true;
63 pdata.req_p1p2p3_quirk = true;
64 pdata.del_p1p2p3_quirk = true;
65 pdata.del_phy_power_chg_quirk = true;
66 pdata.lfps_filter_quirk = true;
67 pdata.rx_detect_poll_quirk = true;
69 pdata.tx_de_emphasis_quirk = true;
70 pdata.tx_de_emphasis = 1;
73 * FIXME these quirks should be removed when AMD NL
74 * taps out
76 pdata.disable_scramble_quirk = true;
77 pdata.dis_u3_susphy_quirk = true;
78 pdata.dis_u2_susphy_quirk = true;
80 return platform_device_add_data(dwc3, &pdata, sizeof(pdata));
83 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
84 pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
85 struct gpio_desc *gpio;
87 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
88 acpi_dwc3_byt_gpios);
91 * These GPIOs will turn on the USB2 PHY. Note that we have to
92 * put the gpio descriptors again here because the phy driver
93 * might want to grab them, too.
95 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
96 if (IS_ERR(gpio))
97 return PTR_ERR(gpio);
99 gpiod_set_value_cansleep(gpio, 1);
100 gpiod_put(gpio);
102 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
103 if (IS_ERR(gpio))
104 return PTR_ERR(gpio);
106 if (gpio) {
107 gpiod_set_value_cansleep(gpio, 1);
108 gpiod_put(gpio);
109 usleep_range(10000, 11000);
113 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
114 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
115 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
116 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
118 struct dwc3_platform_data pdata;
120 memset(&pdata, 0, sizeof(pdata));
121 pdata.usb3_lpm_capable = true;
122 pdata.has_lpm_erratum = true;
123 pdata.dis_enblslpm_quirk = true;
125 return platform_device_add_data(dwc3, &pdata, sizeof(pdata));
128 return 0;
131 static int dwc3_pci_probe(struct pci_dev *pci,
132 const struct pci_device_id *id)
134 struct resource res[2];
135 struct platform_device *dwc3;
136 int ret;
137 struct device *dev = &pci->dev;
139 ret = pcim_enable_device(pci);
140 if (ret) {
141 dev_err(dev, "failed to enable pci device\n");
142 return -ENODEV;
145 pci_set_master(pci);
147 dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
148 if (!dwc3) {
149 dev_err(dev, "couldn't allocate dwc3 device\n");
150 return -ENOMEM;
153 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
155 res[0].start = pci_resource_start(pci, 0);
156 res[0].end = pci_resource_end(pci, 0);
157 res[0].name = "dwc_usb3";
158 res[0].flags = IORESOURCE_MEM;
160 res[1].start = pci->irq;
161 res[1].name = "dwc_usb3";
162 res[1].flags = IORESOURCE_IRQ;
164 ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
165 if (ret) {
166 dev_err(dev, "couldn't add resources to dwc3 device\n");
167 return ret;
170 dwc3->dev.parent = dev;
171 ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev));
173 ret = dwc3_pci_quirks(pci, dwc3);
174 if (ret)
175 goto err;
177 ret = platform_device_add(dwc3);
178 if (ret) {
179 dev_err(dev, "failed to register dwc3 device\n");
180 goto err;
183 pci_set_drvdata(pci, dwc3);
184 return 0;
185 err:
186 platform_device_put(dwc3);
187 return ret;
190 static void dwc3_pci_remove(struct pci_dev *pci)
192 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
193 platform_device_unregister(pci_get_drvdata(pci));
196 static const struct pci_device_id dwc3_pci_id_table[] = {
198 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
199 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
202 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
203 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
206 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
207 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
209 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
210 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
211 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
212 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
213 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
214 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
215 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
216 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
217 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
218 { } /* Terminating Entry */
220 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
222 static struct pci_driver dwc3_pci_driver = {
223 .name = "dwc3-pci",
224 .id_table = dwc3_pci_id_table,
225 .probe = dwc3_pci_probe,
226 .remove = dwc3_pci_remove,
229 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
230 MODULE_LICENSE("GPL v2");
231 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
233 module_pci_driver(dwc3_pci_driver);