2 * Copyright (c) 2001-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 /* this file is part of ehci-hcd.c */
18 #ifdef CONFIG_DYNAMIC_DEBUG
21 * check the values in the HCSPARAMS register
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
25 static void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
)
27 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
32 HCS_DEBUG_PORT(params
),
33 HCS_INDICATOR(params
) ? " ind" : "",
36 HCS_PORTROUTED(params
) ? "" : " ordered",
37 HCS_PPC(params
) ? "" : " !ppc",
39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
40 if (HCS_PORTROUTED(params
)) {
42 char buf
[46], tmp
[7], byte
;
45 for (i
= 0; i
< HCS_N_PORTS(params
); i
++) {
46 /* FIXME MIPS won't readb() ... */
47 byte
= readb(&ehci
->caps
->portroute
[(i
>> 1)]);
49 (i
& 0x1) ? byte
& 0xf : (byte
>> 4) & 0xf);
52 ehci_dbg(ehci
, "%s portroute %s\n", label
, buf
);
57 * check the values in the HCCPARAMS register
58 * (host controller _Capability_ parameters)
59 * see EHCI Spec, Table 2-5 for each value
61 static void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
)
63 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
65 if (HCC_ISOC_CACHE(params
)) {
67 "%s hcc_params %04x caching frame %s%s%s\n",
69 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
70 HCC_CANPARK(params
) ? " park" : "",
71 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "");
74 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
77 HCC_ISOC_THRES(params
),
78 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
79 HCC_CANPARK(params
) ? " park" : "",
80 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "",
81 HCC_LPM(params
) ? " LPM" : "",
82 HCC_PER_PORT_CHANGE_EVENT(params
) ? " ppce" : "",
83 HCC_HW_PREFETCH(params
) ? " hw prefetch" : "",
84 HCC_32FRAME_PERIODIC_LIST(params
) ?
85 " 32 periodic list" : "");
89 static void __maybe_unused
90 dbg_qtd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
92 ehci_dbg(ehci
, "%s td %p n%08x %08x t%08x p0=%08x\n", label
, qtd
,
93 hc32_to_cpup(ehci
, &qtd
->hw_next
),
94 hc32_to_cpup(ehci
, &qtd
->hw_alt_next
),
95 hc32_to_cpup(ehci
, &qtd
->hw_token
),
96 hc32_to_cpup(ehci
, &qtd
->hw_buf
[0]));
98 ehci_dbg(ehci
, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
99 hc32_to_cpup(ehci
, &qtd
->hw_buf
[1]),
100 hc32_to_cpup(ehci
, &qtd
->hw_buf
[2]),
101 hc32_to_cpup(ehci
, &qtd
->hw_buf
[3]),
102 hc32_to_cpup(ehci
, &qtd
->hw_buf
[4]));
105 static void __maybe_unused
106 dbg_qh(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
108 struct ehci_qh_hw
*hw
= qh
->hw
;
110 ehci_dbg(ehci
, "%s qh %p n%08x info %x %x qtd %x\n", label
,
111 qh
, hw
->hw_next
, hw
->hw_info1
, hw
->hw_info2
, hw
->hw_current
);
112 dbg_qtd("overlay", ehci
, (struct ehci_qtd
*) &hw
->hw_qtd_next
);
115 static void __maybe_unused
116 dbg_itd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_itd
*itd
)
118 ehci_dbg(ehci
, "%s [%d] itd %p, next %08x, urb %p\n",
119 label
, itd
->frame
, itd
, hc32_to_cpu(ehci
, itd
->hw_next
),
122 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
123 hc32_to_cpu(ehci
, itd
->hw_transaction
[0]),
124 hc32_to_cpu(ehci
, itd
->hw_transaction
[1]),
125 hc32_to_cpu(ehci
, itd
->hw_transaction
[2]),
126 hc32_to_cpu(ehci
, itd
->hw_transaction
[3]),
127 hc32_to_cpu(ehci
, itd
->hw_transaction
[4]),
128 hc32_to_cpu(ehci
, itd
->hw_transaction
[5]),
129 hc32_to_cpu(ehci
, itd
->hw_transaction
[6]),
130 hc32_to_cpu(ehci
, itd
->hw_transaction
[7]));
132 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
133 hc32_to_cpu(ehci
, itd
->hw_bufp
[0]),
134 hc32_to_cpu(ehci
, itd
->hw_bufp
[1]),
135 hc32_to_cpu(ehci
, itd
->hw_bufp
[2]),
136 hc32_to_cpu(ehci
, itd
->hw_bufp
[3]),
137 hc32_to_cpu(ehci
, itd
->hw_bufp
[4]),
138 hc32_to_cpu(ehci
, itd
->hw_bufp
[5]),
139 hc32_to_cpu(ehci
, itd
->hw_bufp
[6]));
140 ehci_dbg(ehci
, " index: %d %d %d %d %d %d %d %d\n",
141 itd
->index
[0], itd
->index
[1], itd
->index
[2],
142 itd
->index
[3], itd
->index
[4], itd
->index
[5],
143 itd
->index
[6], itd
->index
[7]);
146 static void __maybe_unused
147 dbg_sitd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_sitd
*sitd
)
149 ehci_dbg(ehci
, "%s [%d] sitd %p, next %08x, urb %p\n",
150 label
, sitd
->frame
, sitd
, hc32_to_cpu(ehci
, sitd
->hw_next
),
153 " addr %08x sched %04x result %08x buf %08x %08x\n",
154 hc32_to_cpu(ehci
, sitd
->hw_fullspeed_ep
),
155 hc32_to_cpu(ehci
, sitd
->hw_uframe
),
156 hc32_to_cpu(ehci
, sitd
->hw_results
),
157 hc32_to_cpu(ehci
, sitd
->hw_buf
[0]),
158 hc32_to_cpu(ehci
, sitd
->hw_buf
[1]));
161 static int __maybe_unused
162 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
164 return scnprintf(buf
, len
,
165 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
166 label
, label
[0] ? " " : "", status
,
167 (status
& STS_PPCE_MASK
) ? " PPCE" : "",
168 (status
& STS_ASS
) ? " Async" : "",
169 (status
& STS_PSS
) ? " Periodic" : "",
170 (status
& STS_RECL
) ? " Recl" : "",
171 (status
& STS_HALT
) ? " Halt" : "",
172 (status
& STS_IAA
) ? " IAA" : "",
173 (status
& STS_FATAL
) ? " FATAL" : "",
174 (status
& STS_FLR
) ? " FLR" : "",
175 (status
& STS_PCD
) ? " PCD" : "",
176 (status
& STS_ERR
) ? " ERR" : "",
177 (status
& STS_INT
) ? " INT" : "");
180 static int __maybe_unused
181 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
183 return scnprintf(buf
, len
,
184 "%s%sintrenable %02x%s%s%s%s%s%s%s",
185 label
, label
[0] ? " " : "", enable
,
186 (enable
& STS_PPCE_MASK
) ? " PPCE" : "",
187 (enable
& STS_IAA
) ? " IAA" : "",
188 (enable
& STS_FATAL
) ? " FATAL" : "",
189 (enable
& STS_FLR
) ? " FLR" : "",
190 (enable
& STS_PCD
) ? " PCD" : "",
191 (enable
& STS_ERR
) ? " ERR" : "",
192 (enable
& STS_INT
) ? " INT" : "");
195 static const char *const fls_strings
[] = { "1024", "512", "256", "??" };
198 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
200 return scnprintf(buf
, len
,
201 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
203 label
, label
[0] ? " " : "", command
,
204 (command
& CMD_HIRD
) ? " HIRD" : "",
205 (command
& CMD_PPCEE
) ? " PPCEE" : "",
206 (command
& CMD_FSP
) ? " FSP" : "",
207 (command
& CMD_ASPE
) ? " ASPE" : "",
208 (command
& CMD_PSPE
) ? " PSPE" : "",
209 (command
& CMD_PARK
) ? " park" : "(park)",
210 CMD_PARK_CNT(command
),
211 (command
>> 16) & 0x3f,
212 (command
& CMD_LRESET
) ? " LReset" : "",
213 (command
& CMD_IAAD
) ? " IAAD" : "",
214 (command
& CMD_ASE
) ? " Async" : "",
215 (command
& CMD_PSE
) ? " Periodic" : "",
216 fls_strings
[(command
>> 2) & 0x3],
217 (command
& CMD_RESET
) ? " Reset" : "",
218 (command
& CMD_RUN
) ? "RUN" : "HALT");
222 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
226 /* signaling state */
227 switch (status
& (3 << 10)) {
231 case 1 << 10: /* low speed */
242 return scnprintf(buf
, len
,
243 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
244 "sig=%s%s%s%s%s%s%s%s%s%s%s",
245 label
, label
[0] ? " " : "", port
, status
,
246 status
>> 25, /*device address */
247 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ACK
?
249 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_NYET
?
251 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_STALL
?
253 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ERR
?
255 (status
& PORT_POWER
) ? " POWER" : "",
256 (status
& PORT_OWNER
) ? " OWNER" : "",
258 (status
& PORT_LPM
) ? " LPM" : "",
259 (status
& PORT_RESET
) ? " RESET" : "",
260 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
261 (status
& PORT_RESUME
) ? " RESUME" : "",
262 (status
& PORT_OCC
) ? " OCC" : "",
263 (status
& PORT_OC
) ? " OC" : "",
264 (status
& PORT_PEC
) ? " PEC" : "",
265 (status
& PORT_PE
) ? " PE" : "",
266 (status
& PORT_CSC
) ? " CSC" : "",
267 (status
& PORT_CONNECT
) ? " CONNECT" : "");
271 dbg_status(struct ehci_hcd
*ehci
, const char *label
, u32 status
)
275 dbg_status_buf(buf
, sizeof(buf
), label
, status
);
276 ehci_dbg(ehci
, "%s\n", buf
);
280 dbg_cmd(struct ehci_hcd
*ehci
, const char *label
, u32 command
)
284 dbg_command_buf(buf
, sizeof(buf
), label
, command
);
285 ehci_dbg(ehci
, "%s\n", buf
);
289 dbg_port(struct ehci_hcd
*ehci
, const char *label
, int port
, u32 status
)
293 dbg_port_buf(buf
, sizeof(buf
), label
, port
, status
);
294 ehci_dbg(ehci
, "%s\n", buf
);
297 /*-------------------------------------------------------------------------*/
299 /* troubleshooting help: expose state in debugfs */
301 static int debug_async_open(struct inode
*, struct file
*);
302 static int debug_bandwidth_open(struct inode
*, struct file
*);
303 static int debug_periodic_open(struct inode
*, struct file
*);
304 static int debug_registers_open(struct inode
*, struct file
*);
306 static ssize_t
debug_output(struct file
*, char __user
*, size_t, loff_t
*);
307 static int debug_close(struct inode
*, struct file
*);
309 static const struct file_operations debug_async_fops
= {
310 .owner
= THIS_MODULE
,
311 .open
= debug_async_open
,
312 .read
= debug_output
,
313 .release
= debug_close
,
314 .llseek
= default_llseek
,
317 static const struct file_operations debug_bandwidth_fops
= {
318 .owner
= THIS_MODULE
,
319 .open
= debug_bandwidth_open
,
320 .read
= debug_output
,
321 .release
= debug_close
,
322 .llseek
= default_llseek
,
325 static const struct file_operations debug_periodic_fops
= {
326 .owner
= THIS_MODULE
,
327 .open
= debug_periodic_open
,
328 .read
= debug_output
,
329 .release
= debug_close
,
330 .llseek
= default_llseek
,
333 static const struct file_operations debug_registers_fops
= {
334 .owner
= THIS_MODULE
,
335 .open
= debug_registers_open
,
336 .read
= debug_output
,
337 .release
= debug_close
,
338 .llseek
= default_llseek
,
341 static struct dentry
*ehci_debug_root
;
343 struct debug_buffer
{
344 ssize_t (*fill_func
)(struct debug_buffer
*); /* fill method */
346 struct mutex mutex
; /* protect filling of buffer */
347 size_t count
; /* number of characters filled into buffer */
352 static inline char speed_char(u32 info1
)
354 switch (info1
& (3 << 12)) {
366 static inline char token_mark(struct ehci_hcd
*ehci
, __hc32 token
)
368 __u32 v
= hc32_to_cpu(ehci
, token
);
370 if (v
& QTD_STS_ACTIVE
)
372 if (v
& QTD_STS_HALT
)
374 if (!IS_SHORT_READ(v
))
376 /* tries to advance through hw_alt_next */
380 static void qh_lines(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
,
381 char **nextp
, unsigned *sizep
)
385 struct list_head
*entry
;
388 unsigned size
= *sizep
;
391 __le32 list_end
= EHCI_LIST_END(ehci
);
392 struct ehci_qh_hw
*hw
= qh
->hw
;
394 if (hw
->hw_qtd_next
== list_end
) /* NEC does this */
397 mark
= token_mark(ehci
, hw
->hw_token
);
398 if (mark
== '/') { /* qh_alt_next controls qh advance? */
399 if ((hw
->hw_alt_next
& QTD_MASK(ehci
))
400 == ehci
->async
->hw
->hw_alt_next
)
401 mark
= '#'; /* blocked */
402 else if (hw
->hw_alt_next
== list_end
)
403 mark
= '.'; /* use hw_qtd_next */
404 /* else alt_next points to some other qtd */
406 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
407 hw_curr
= (mark
== '*') ? hc32_to_cpup(ehci
, &hw
->hw_current
) : 0;
408 temp
= scnprintf(next
, size
,
409 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
410 " [cur %08x next %08x buf[0] %08x]",
411 qh
, scratch
& 0x007f,
412 speed_char (scratch
),
413 (scratch
>> 8) & 0x000f,
414 scratch
, hc32_to_cpup(ehci
, &hw
->hw_info2
),
415 hc32_to_cpup(ehci
, &hw
->hw_token
), mark
,
416 (cpu_to_hc32(ehci
, QTD_TOGGLE
) & hw
->hw_token
)
418 (hc32_to_cpup(ehci
, &hw
->hw_alt_next
) >> 1) & 0x0f,
419 hc32_to_cpup(ehci
, &hw
->hw_current
),
420 hc32_to_cpup(ehci
, &hw
->hw_qtd_next
),
421 hc32_to_cpup(ehci
, &hw
->hw_buf
[0]));
425 /* hc may be modifying the list as we read it ... */
426 list_for_each(entry
, &qh
->qtd_list
) {
429 td
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
430 scratch
= hc32_to_cpup(ehci
, &td
->hw_token
);
432 if (hw_curr
== td
->qtd_dma
) {
434 } else if (hw
->hw_qtd_next
== cpu_to_hc32(ehci
, td
->qtd_dma
)) {
436 } else if (QTD_LENGTH(scratch
)) {
437 if (td
->hw_alt_next
== ehci
->async
->hw
->hw_alt_next
)
439 else if (td
->hw_alt_next
!= list_end
)
442 switch ((scratch
>> 8) & 0x03) {
456 temp
= scnprintf(next
, size
,
457 "\n\t%p%c%s len=%d %08x urb %p"
458 " [td %08x buf[0] %08x]",
460 (scratch
>> 16) & 0x7fff,
464 hc32_to_cpup(ehci
, &td
->hw_buf
[0]));
471 temp
= scnprintf(next
, size
, "\n");
480 static ssize_t
fill_async_buffer(struct debug_buffer
*buf
)
483 struct ehci_hcd
*ehci
;
489 hcd
= bus_to_hcd(buf
->bus
);
490 ehci
= hcd_to_ehci(hcd
);
491 next
= buf
->output_buf
;
492 size
= buf
->alloc_size
;
497 * dumps a snapshot of the async schedule.
498 * usually empty except for long-term bulk reads, or head.
499 * one QH per line, and TDs we know about
501 spin_lock_irqsave(&ehci
->lock
, flags
);
502 for (qh
= ehci
->async
->qh_next
.qh
; size
> 0 && qh
; qh
= qh
->qh_next
.qh
)
503 qh_lines(ehci
, qh
, &next
, &size
);
504 if (!list_empty(&ehci
->async_unlink
) && size
> 0) {
505 temp
= scnprintf(next
, size
, "\nunlink =\n");
509 list_for_each_entry(qh
, &ehci
->async_unlink
, unlink_node
) {
512 qh_lines(ehci
, qh
, &next
, &size
);
515 spin_unlock_irqrestore(&ehci
->lock
, flags
);
517 return strlen(buf
->output_buf
);
520 static ssize_t
fill_bandwidth_buffer(struct debug_buffer
*buf
)
522 struct ehci_hcd
*ehci
;
524 struct ehci_per_sched
*ps
;
530 u8 budget
[EHCI_BANDWIDTH_SIZE
];
532 ehci
= hcd_to_ehci(bus_to_hcd(buf
->bus
));
533 next
= buf
->output_buf
;
534 size
= buf
->alloc_size
;
538 spin_lock_irq(&ehci
->lock
);
540 /* Dump the HS bandwidth table */
541 temp
= scnprintf(next
, size
,
542 "HS bandwidth allocation (us per microframe)\n");
545 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
546 bw
= &ehci
->bandwidth
[i
];
547 temp
= scnprintf(next
, size
,
548 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
549 i
, bw
[0], bw
[1], bw
[2], bw
[3],
550 bw
[4], bw
[5], bw
[6], bw
[7]);
555 /* Dump all the FS/LS tables */
556 list_for_each_entry(tt
, &ehci
->tt_list
, tt_list
) {
557 temp
= scnprintf(next
, size
,
558 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
559 dev_name(&tt
->usb_tt
->hub
->dev
),
560 tt
->tt_port
+ !!tt
->usb_tt
->multi
);
565 temp
= scnprintf(next
, size
,
566 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
567 bf
[0], bf
[1], bf
[2], bf
[3],
568 bf
[4], bf
[5], bf
[6], bf
[7]);
572 temp
= scnprintf(next
, size
,
573 "FS/LS budget (us per microframe)\n");
576 compute_tt_budget(budget
, tt
);
577 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
579 temp
= scnprintf(next
, size
,
580 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
581 i
, bw
[0], bw
[1], bw
[2], bw
[3],
582 bw
[4], bw
[5], bw
[6], bw
[7]);
586 list_for_each_entry(ps
, &tt
->ps_list
, ps_list
) {
587 temp
= scnprintf(next
, size
,
588 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
589 dev_name(&ps
->udev
->dev
),
590 ps
->ep
->desc
.bEndpointAddress
,
592 ps
->bw_phase
, ps
->phase_uf
,
593 ps
->bw_period
, ps
->cs_mask
);
598 spin_unlock_irq(&ehci
->lock
);
600 return next
- buf
->output_buf
;
603 static unsigned output_buf_tds_dir(char *buf
, struct ehci_hcd
*ehci
,
604 struct ehci_qh_hw
*hw
, struct ehci_qh
*qh
, unsigned size
)
606 u32 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
607 struct ehci_qtd
*qtd
;
611 /* count tds, get ep direction */
612 list_for_each_entry(qtd
, &qh
->qtd_list
, qtd_list
) {
614 switch ((hc32_to_cpu(ehci
, qtd
->hw_token
) >> 8) & 0x03) {
624 return scnprintf(buf
, size
, " (%c%d ep%d%s [%d/%d] q%d p%d)",
625 speed_char(scratch
), scratch
& 0x007f,
626 (scratch
>> 8) & 0x000f, type
, qh
->ps
.usecs
,
627 qh
->ps
.c_usecs
, temp
, 0x7ff & (scratch
>> 16));
630 #define DBG_SCHED_LIMIT 64
631 static ssize_t
fill_periodic_buffer(struct debug_buffer
*buf
)
634 struct ehci_hcd
*ehci
;
636 union ehci_shadow p
, *seen
;
637 unsigned temp
, size
, seen_count
;
642 seen
= kmalloc_array(DBG_SCHED_LIMIT
, sizeof(*seen
), GFP_ATOMIC
);
647 hcd
= bus_to_hcd(buf
->bus
);
648 ehci
= hcd_to_ehci(hcd
);
649 next
= buf
->output_buf
;
650 size
= buf
->alloc_size
;
652 temp
= scnprintf(next
, size
, "size = %d\n", ehci
->periodic_size
);
657 * dump a snapshot of the periodic schedule.
658 * iso changes, interrupt usually doesn't.
660 spin_lock_irqsave(&ehci
->lock
, flags
);
661 for (i
= 0; i
< ehci
->periodic_size
; i
++) {
662 p
= ehci
->pshadow
[i
];
665 tag
= Q_NEXT_TYPE(ehci
, ehci
->periodic
[i
]);
667 temp
= scnprintf(next
, size
, "%4d: ", i
);
672 struct ehci_qh_hw
*hw
;
674 switch (hc32_to_cpu(ehci
, tag
)) {
677 temp
= scnprintf(next
, size
, " qh%d-%04x/%p",
682 & (QH_CMASK
| QH_SMASK
),
686 /* don't repeat what follows this qh */
687 for (temp
= 0; temp
< seen_count
; temp
++) {
688 if (seen
[temp
].ptr
!= p
.ptr
)
690 if (p
.qh
->qh_next
.ptr
) {
691 temp
= scnprintf(next
, size
,
698 /* show more info the first time around */
699 if (temp
== seen_count
) {
700 temp
= output_buf_tds_dir(next
, ehci
,
703 if (seen_count
< DBG_SCHED_LIMIT
)
704 seen
[seen_count
++].qh
= p
.qh
;
708 tag
= Q_NEXT_TYPE(ehci
, hw
->hw_next
);
712 temp
= scnprintf(next
, size
,
713 " fstn-%8x/%p", p
.fstn
->hw_prev
,
715 tag
= Q_NEXT_TYPE(ehci
, p
.fstn
->hw_next
);
716 p
= p
.fstn
->fstn_next
;
719 temp
= scnprintf(next
, size
,
721 tag
= Q_NEXT_TYPE(ehci
, p
.itd
->hw_next
);
725 temp
= scnprintf(next
, size
,
727 p
.sitd
->stream
->ps
.period
,
728 hc32_to_cpup(ehci
, &p
.sitd
->hw_uframe
)
731 tag
= Q_NEXT_TYPE(ehci
, p
.sitd
->hw_next
);
732 p
= p
.sitd
->sitd_next
;
739 temp
= scnprintf(next
, size
, "\n");
743 spin_unlock_irqrestore(&ehci
->lock
, flags
);
746 return buf
->alloc_size
- size
;
748 #undef DBG_SCHED_LIMIT
750 static const char *rh_state_string(struct ehci_hcd
*ehci
)
752 switch (ehci
->rh_state
) {
755 case EHCI_RH_SUSPENDED
:
757 case EHCI_RH_RUNNING
:
759 case EHCI_RH_STOPPING
:
765 static ssize_t
fill_registers_buffer(struct debug_buffer
*buf
)
768 struct ehci_hcd
*ehci
;
770 unsigned temp
, size
, i
;
771 char *next
, scratch
[80];
772 static char fmt
[] = "%*s\n";
773 static char label
[] = "";
775 hcd
= bus_to_hcd(buf
->bus
);
776 ehci
= hcd_to_ehci(hcd
);
777 next
= buf
->output_buf
;
778 size
= buf
->alloc_size
;
780 spin_lock_irqsave(&ehci
->lock
, flags
);
782 if (!HCD_HW_ACCESSIBLE(hcd
)) {
783 size
= scnprintf(next
, size
,
784 "bus %s, device %s\n"
786 "SUSPENDED (no register access)\n",
787 hcd
->self
.controller
->bus
->name
,
788 dev_name(hcd
->self
.controller
),
793 /* Capability Registers */
794 i
= HC_VERSION(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
795 temp
= scnprintf(next
, size
,
796 "bus %s, device %s\n"
798 "EHCI %x.%02x, rh state %s\n",
799 hcd
->self
.controller
->bus
->name
,
800 dev_name(hcd
->self
.controller
),
802 i
>> 8, i
& 0x0ff, rh_state_string(ehci
));
807 /* EHCI 0.96 and later may have "extended capabilities" */
808 if (dev_is_pci(hcd
->self
.controller
)) {
809 struct pci_dev
*pdev
;
810 u32 offset
, cap
, cap2
;
811 unsigned count
= 256 / 4;
813 pdev
= to_pci_dev(ehci_to_hcd(ehci
)->self
.controller
);
814 offset
= HCC_EXT_CAPS(ehci_readl(ehci
,
815 &ehci
->caps
->hcc_params
));
816 while (offset
&& count
--) {
817 pci_read_config_dword(pdev
, offset
, &cap
);
818 switch (cap
& 0xff) {
820 temp
= scnprintf(next
, size
,
821 "ownership %08x%s%s\n", cap
,
822 (cap
& (1 << 24)) ? " linux" : "",
823 (cap
& (1 << 16)) ? " firmware" : "");
828 pci_read_config_dword(pdev
, offset
, &cap2
);
829 temp
= scnprintf(next
, size
,
830 "SMI sts/enable 0x%08x\n", cap2
);
834 case 0: /* illegal reserved capability */
837 default: /* unknown */
840 temp
= (cap
>> 8) & 0xff;
845 /* FIXME interpret both types of params */
846 i
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
847 temp
= scnprintf(next
, size
, "structural params 0x%08x\n", i
);
851 i
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
852 temp
= scnprintf(next
, size
, "capability params 0x%08x\n", i
);
856 /* Operational Registers */
857 temp
= dbg_status_buf(scratch
, sizeof(scratch
), label
,
858 ehci_readl(ehci
, &ehci
->regs
->status
));
859 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
863 temp
= dbg_command_buf(scratch
, sizeof(scratch
), label
,
864 ehci_readl(ehci
, &ehci
->regs
->command
));
865 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
869 temp
= dbg_intr_buf(scratch
, sizeof(scratch
), label
,
870 ehci_readl(ehci
, &ehci
->regs
->intr_enable
));
871 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
875 temp
= scnprintf(next
, size
, "uframe %04x\n",
876 ehci_read_frame_index(ehci
));
880 for (i
= 1; i
<= HCS_N_PORTS(ehci
->hcs_params
); i
++) {
881 temp
= dbg_port_buf(scratch
, sizeof(scratch
), label
, i
,
883 &ehci
->regs
->port_status
[i
- 1]));
884 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
887 if (i
== HCS_DEBUG_PORT(ehci
->hcs_params
) && ehci
->debug
) {
888 temp
= scnprintf(next
, size
,
889 " debug control %08x\n",
891 &ehci
->debug
->control
));
897 if (!list_empty(&ehci
->async_unlink
)) {
898 temp
= scnprintf(next
, size
, "async unlink qh %p\n",
899 list_first_entry(&ehci
->async_unlink
,
900 struct ehci_qh
, unlink_node
));
906 temp
= scnprintf(next
, size
,
907 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
908 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.iaa
,
909 ehci
->stats
.lost_iaa
);
913 temp
= scnprintf(next
, size
, "complete %ld unlink %ld\n",
914 ehci
->stats
.complete
, ehci
->stats
.unlink
);
920 spin_unlock_irqrestore(&ehci
->lock
, flags
);
922 return buf
->alloc_size
- size
;
925 static struct debug_buffer
*alloc_buffer(struct usb_bus
*bus
,
926 ssize_t (*fill_func
)(struct debug_buffer
*))
928 struct debug_buffer
*buf
;
930 buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
934 buf
->fill_func
= fill_func
;
935 mutex_init(&buf
->mutex
);
936 buf
->alloc_size
= PAGE_SIZE
;
942 static int fill_buffer(struct debug_buffer
*buf
)
946 if (!buf
->output_buf
)
947 buf
->output_buf
= vmalloc(buf
->alloc_size
);
949 if (!buf
->output_buf
) {
954 ret
= buf
->fill_func(buf
);
965 static ssize_t
debug_output(struct file
*file
, char __user
*user_buf
,
966 size_t len
, loff_t
*offset
)
968 struct debug_buffer
*buf
= file
->private_data
;
971 mutex_lock(&buf
->mutex
);
972 if (buf
->count
== 0) {
973 ret
= fill_buffer(buf
);
975 mutex_unlock(&buf
->mutex
);
979 mutex_unlock(&buf
->mutex
);
981 ret
= simple_read_from_buffer(user_buf
, len
, offset
,
982 buf
->output_buf
, buf
->count
);
988 static int debug_close(struct inode
*inode
, struct file
*file
)
990 struct debug_buffer
*buf
= file
->private_data
;
993 vfree(buf
->output_buf
);
1000 static int debug_async_open(struct inode
*inode
, struct file
*file
)
1002 file
->private_data
= alloc_buffer(inode
->i_private
, fill_async_buffer
);
1004 return file
->private_data
? 0 : -ENOMEM
;
1007 static int debug_bandwidth_open(struct inode
*inode
, struct file
*file
)
1009 file
->private_data
= alloc_buffer(inode
->i_private
,
1010 fill_bandwidth_buffer
);
1012 return file
->private_data
? 0 : -ENOMEM
;
1015 static int debug_periodic_open(struct inode
*inode
, struct file
*file
)
1017 struct debug_buffer
*buf
;
1019 buf
= alloc_buffer(inode
->i_private
, fill_periodic_buffer
);
1023 buf
->alloc_size
= (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE
;
1024 file
->private_data
= buf
;
1028 static int debug_registers_open(struct inode
*inode
, struct file
*file
)
1030 file
->private_data
= alloc_buffer(inode
->i_private
,
1031 fill_registers_buffer
);
1033 return file
->private_data
? 0 : -ENOMEM
;
1036 static inline void create_debug_files(struct ehci_hcd
*ehci
)
1038 struct usb_bus
*bus
= &ehci_to_hcd(ehci
)->self
;
1040 ehci
->debug_dir
= debugfs_create_dir(bus
->bus_name
, ehci_debug_root
);
1041 if (!ehci
->debug_dir
)
1044 if (!debugfs_create_file("async", S_IRUGO
, ehci
->debug_dir
, bus
,
1048 if (!debugfs_create_file("bandwidth", S_IRUGO
, ehci
->debug_dir
, bus
,
1049 &debug_bandwidth_fops
))
1052 if (!debugfs_create_file("periodic", S_IRUGO
, ehci
->debug_dir
, bus
,
1053 &debug_periodic_fops
))
1056 if (!debugfs_create_file("registers", S_IRUGO
, ehci
->debug_dir
, bus
,
1057 &debug_registers_fops
))
1063 debugfs_remove_recursive(ehci
->debug_dir
);
1066 static inline void remove_debug_files(struct ehci_hcd
*ehci
)
1068 debugfs_remove_recursive(ehci
->debug_dir
);
1071 #else /* CONFIG_DYNAMIC_DEBUG */
1073 static inline void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
) { }
1074 static inline void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
) { }
1076 static inline void __maybe_unused
dbg_qh(const char *label
,
1077 struct ehci_hcd
*ehci
, struct ehci_qh
*qh
) { }
1079 static inline int __maybe_unused
dbg_status_buf(const char *buf
,
1080 unsigned int len
, const char *label
, u32 status
)
1083 static inline int __maybe_unused
dbg_command_buf(const char *buf
,
1084 unsigned int len
, const char *label
, u32 command
)
1087 static inline int __maybe_unused
dbg_intr_buf(const char *buf
,
1088 unsigned int len
, const char *label
, u32 enable
)
1091 static inline int __maybe_unused
dbg_port_buf(char *buf
,
1092 unsigned int len
, const char *label
, int port
, u32 status
)
1095 static inline void dbg_status(struct ehci_hcd
*ehci
, const char *label
,
1097 static inline void dbg_cmd(struct ehci_hcd
*ehci
, const char *label
,
1099 static inline void dbg_port(struct ehci_hcd
*ehci
, const char *label
,
1100 int port
, u32 status
) { }
1102 static inline void create_debug_files(struct ehci_hcd
*bus
) { }
1103 static inline void remove_debug_files(struct ehci_hcd
*bus
) { }
1105 #endif /* CONFIG_DYNAMIC_DEBUG */