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mmc: rtsx_pci: Enable MMC_CAP_ERASE to allow erase/discard/trim requests
[linux/fpc-iii.git] / drivers / usb / host / isp116x-hcd.c
blobd089b3fb7a13dc8e02ad781765c78c87815e6a11
1 /*
2 * ISP116x HCD (Host Controller Driver) for USB.
3 *
4 * Derived from the SL811 HCD, rewritten for ISP116x.
5 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
6 *
7 * Portions:
8 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
9 * Copyright (C) 2004 David Brownell
10 *
11 * Periodic scheduling is based on Roman's OHCI code
12 * Copyright (C) 1999 Roman Weissgaerber
13 *
14 */
15
16 /*
17 * The driver basically works. A number of people have used it with a range
18 * of devices.
19 *
20 * The driver passes all usbtests 1-14.
21 *
22 * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
23 * And suspending/resuming of platform device works too. Suspend/resume
24 * via HCD operations vector is not implemented.
25 *
26 * Iso transfer support is not implemented. Adding this would include
27 * implementing recovery from the failure to service the processed ITL
28 * fifo ram in time, which will involve chip reset.
29 *
30 * TODO:
31 + More testing of suspend/resume.
32 */
33
34 /*
35 ISP116x chips require certain delays between accesses to its
36 registers. The following timing options exist.
37
38 1. Configure your memory controller (the best)
39 2. Implement platform-specific delay function possibly
40 combined with configuring the memory controller; see
41 include/linux/usb-isp116x.h for more info. Some broken
42 memory controllers line LH7A400 SMC need this. Also,
43 uncomment for that to work the following
44 USE_PLATFORM_DELAY macro.
45 3. Use ndelay (easiest, poorest). For that, uncomment
46 the following USE_NDELAY macro.
47 */
48 #define USE_PLATFORM_DELAY
49 //#define USE_NDELAY
50
51 //#define DEBUG
52 //#define VERBOSE
53 /* Transfer descriptors. See dump_ptd() for printout format */
54 //#define PTD_TRACE
55 /* enqueuing/finishing log of urbs */
56 //#define URB_TRACE
57
58 #include <linux/module.h>
59 #include <linux/delay.h>
60 #include <linux/debugfs.h>
61 #include <linux/seq_file.h>
62 #include <linux/errno.h>
63 #include <linux/list.h>
64 #include <linux/slab.h>
65 #include <linux/usb.h>
66 #include <linux/usb/isp116x.h>
67 #include <linux/usb/hcd.h>
68 #include <linux/platform_device.h>
69
70 #include <asm/io.h>
71 #include <asm/irq.h>
72 #include <asm/byteorder.h>
73
74 #include "isp116x.h"
75
76 #define DRIVER_VERSION "03 Nov 2005"
77 #define DRIVER_DESC "ISP116x USB Host Controller Driver"
78
79 MODULE_DESCRIPTION(DRIVER_DESC);
80 MODULE_LICENSE("GPL");
81
82 static const char hcd_name[] = "isp116x-hcd";
83
84 /*-----------------------------------------------------------------*/
85
86 /*
87 Write len bytes to fifo, pad till 32-bit boundary
88 */
89 static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
90 {
91 u8 *dp = (u8 *) buf;
92 u16 *dp2 = (u16 *) buf;
93 u16 w;
94 int quot = len % 4;
95
96 /* buffer is already in 'usb data order', which is LE. */
97 /* When reading buffer as u16, we have to take care byte order */
98 /* doesn't get mixed up */
99
100 if ((unsigned long)dp2 & 1) {
101 /* not aligned */
102 for (; len > 1; len -= 2) {
103 w = *dp++;
104 w |= *dp++ << 8;
105 isp116x_raw_write_data16(isp116x, w);
106 }
107 if (len)
108 isp116x_write_data16(isp116x, (u16) * dp);
109 } else {
110 /* aligned */
111 for (; len > 1; len -= 2) {
112 /* Keep byte order ! */
113 isp116x_raw_write_data16(isp116x, cpu_to_le16(*dp2++));
114 }
115
116 if (len)
117 isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
118 }
119 if (quot == 1 || quot == 2)
120 isp116x_raw_write_data16(isp116x, 0);
121 }
122
123 /*
124 Read len bytes from fifo and then read till 32-bit boundary.
125 */
126 static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
127 {
128 u8 *dp = (u8 *) buf;
129 u16 *dp2 = (u16 *) buf;
130 u16 w;
131 int quot = len % 4;
132
133 /* buffer is already in 'usb data order', which is LE. */
134 /* When reading buffer as u16, we have to take care byte order */
135 /* doesn't get mixed up */
136
137 if ((unsigned long)dp2 & 1) {
138 /* not aligned */
139 for (; len > 1; len -= 2) {
140 w = isp116x_raw_read_data16(isp116x);
141 *dp++ = w & 0xff;
142 *dp++ = (w >> 8) & 0xff;
143 }
144
145 if (len)
146 *dp = 0xff & isp116x_read_data16(isp116x);
147 } else {
148 /* aligned */
149 for (; len > 1; len -= 2) {
150 /* Keep byte order! */
151 *dp2++ = le16_to_cpu(isp116x_raw_read_data16(isp116x));
152 }
153
154 if (len)
155 *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
156 }
157 if (quot == 1 || quot == 2)
158 isp116x_raw_read_data16(isp116x);
159 }
160
161 /*
162 Write ptd's and data for scheduled transfers into
163 the fifo ram. Fifo must be empty and ready.
164 */
165 static void pack_fifo(struct isp116x *isp116x)
166 {
167 struct isp116x_ep *ep;
168 struct ptd *ptd;
169 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
170 ? isp116x->atl_bufshrt : isp116x->atl_buflen;
171
172 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
173 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
174 isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
175 for (ep = isp116x->atl_active; ep; ep = ep->active) {
176 ptd = &ep->ptd;
177 dump_ptd(ptd);
178 dump_ptd_out_data(ptd, ep->data);
179 isp116x_write_data16(isp116x, ptd->count);
180 isp116x_write_data16(isp116x, ptd->mps);
181 isp116x_write_data16(isp116x, ptd->len);
182 isp116x_write_data16(isp116x, ptd->faddr);
183 buflen -= sizeof(struct ptd);
184 /* Skip writing data for last IN PTD */
185 if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
186 write_ptddata_to_fifo(isp116x, ep->data, ep->length);
187 buflen -= ALIGN(ep->length, 4);
188 }
189 }
190 BUG_ON(buflen);
191 }
192
193 /*
194 Read the processed ptd's and data from fifo ram back to
195 URBs' buffers. Fifo must be full and done
196 */
197 static void unpack_fifo(struct isp116x *isp116x)
198 {
199 struct isp116x_ep *ep;
200 struct ptd *ptd;
201 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
202 ? isp116x->atl_buflen : isp116x->atl_bufshrt;
203
204 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
205 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
206 isp116x_write_addr(isp116x, HCATLPORT);
207 for (ep = isp116x->atl_active; ep; ep = ep->active) {
208 ptd = &ep->ptd;
209 ptd->count = isp116x_read_data16(isp116x);
210 ptd->mps = isp116x_read_data16(isp116x);
211 ptd->len = isp116x_read_data16(isp116x);
212 ptd->faddr = isp116x_read_data16(isp116x);
213 buflen -= sizeof(struct ptd);
214 /* Skip reading data for last Setup or Out PTD */
215 if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
216 read_ptddata_from_fifo(isp116x, ep->data, ep->length);
217 buflen -= ALIGN(ep->length, 4);
218 }
219 dump_ptd(ptd);
220 dump_ptd_in_data(ptd, ep->data);
221 }
222 BUG_ON(buflen);
223 }
224
225 /*---------------------------------------------------------------*/
226
227 /*
228 Set up PTD's.
229 */
230 static void preproc_atl_queue(struct isp116x *isp116x)
231 {
232 struct isp116x_ep *ep;
233 struct urb *urb;
234 struct ptd *ptd;
235 u16 len;
236
237 for (ep = isp116x->atl_active; ep; ep = ep->active) {
238 u16 toggle = 0, dir = PTD_DIR_SETUP;
239
240 BUG_ON(list_empty(&ep->hep->urb_list));
241 urb = container_of(ep->hep->urb_list.next,
242 struct urb, urb_list);
243 ptd = &ep->ptd;
244 len = ep->length;
245 ep->data = (unsigned char *)urb->transfer_buffer
246 + urb->actual_length;
247
248 switch (ep->nextpid) {
249 case USB_PID_IN:
250 toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
251 dir = PTD_DIR_IN;
252 break;
253 case USB_PID_OUT:
254 toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
255 dir = PTD_DIR_OUT;
256 break;
257 case USB_PID_SETUP:
258 len = sizeof(struct usb_ctrlrequest);
259 ep->data = urb->setup_packet;
260 break;
261 case USB_PID_ACK:
262 toggle = 1;
263 len = 0;
264 dir = (urb->transfer_buffer_length
265 && usb_pipein(urb->pipe))
266 ? PTD_DIR_OUT : PTD_DIR_IN;
267 break;
268 default:
269 ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
270 ep->nextpid);
271 BUG();
272 }
273
274 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
275 ptd->mps = PTD_MPS(ep->maxpacket)
276 | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
277 | PTD_EP(ep->epnum);
278 ptd->len = PTD_LEN(len) | PTD_DIR(dir);
279 ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
280 if (!ep->active) {
281 ptd->mps |= PTD_LAST_MSK;
282 isp116x->atl_last_dir = dir;
283 }
284 isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
285 isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
286 }
287 }
288
289 /*
290 Take done or failed requests out of schedule. Give back
291 processed urbs.
292 */
293 static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
294 struct urb *urb, int status)
295 __releases(isp116x->lock) __acquires(isp116x->lock)
296 {
297 unsigned i;
298
299 ep->error_count = 0;
300
301 if (usb_pipecontrol(urb->pipe))
302 ep->nextpid = USB_PID_SETUP;
303
304 urb_dbg(urb, "Finish");
305
306 usb_hcd_unlink_urb_from_ep(isp116x_to_hcd(isp116x), urb);
307 spin_unlock(&isp116x->lock);
308 usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, status);
309 spin_lock(&isp116x->lock);
310
311 /* take idle endpoints out of the schedule */
312 if (!list_empty(&ep->hep->urb_list))
313 return;
314
315 /* async deschedule */
316 if (!list_empty(&ep->schedule)) {
317 list_del_init(&ep->schedule);
318 return;
319 }
320
321 /* periodic deschedule */
322 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
323 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
324 struct isp116x_ep *temp;
325 struct isp116x_ep **prev = &isp116x->periodic[i];
326
327 while (*prev && ((temp = *prev) != ep))
328 prev = &temp->next;
329 if (*prev)
330 *prev = ep->next;
331 isp116x->load[i] -= ep->load;
332 }
333 ep->branch = PERIODIC_SIZE;
334 isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
335 ep->load / ep->period;
336
337 /* switch irq type? */
338 if (!--isp116x->periodic_count) {
339 isp116x->irqenb &= ~HCuPINT_SOF;
340 isp116x->irqenb |= HCuPINT_ATL;
341 }
342 }
343
344 /*
345 Analyze transfer results, handle partial transfers and errors
346 */
347 static void postproc_atl_queue(struct isp116x *isp116x)
348 {
349 struct isp116x_ep *ep;
350 struct urb *urb;
351 struct usb_device *udev;
352 struct ptd *ptd;
353 int short_not_ok;
354 int status;
355 u8 cc;
356
357 for (ep = isp116x->atl_active; ep; ep = ep->active) {
358 BUG_ON(list_empty(&ep->hep->urb_list));
359 urb =
360 container_of(ep->hep->urb_list.next, struct urb, urb_list);
361 udev = urb->dev;
362 ptd = &ep->ptd;
363 cc = PTD_GET_CC(ptd);
364 short_not_ok = 1;
365 status = -EINPROGRESS;
366
367 /* Data underrun is special. For allowed underrun
368 we clear the error and continue as normal. For
369 forbidden underrun we finish the DATA stage
370 immediately while for control transfer,
371 we do a STATUS stage. */
372 if (cc == TD_DATAUNDERRUN) {
373 if (!(urb->transfer_flags & URB_SHORT_NOT_OK) ||
374 usb_pipecontrol(urb->pipe)) {
375 DBG("Allowed or control data underrun\n");
376 cc = TD_CC_NOERROR;
377 short_not_ok = 0;
378 } else {
379 ep->error_count = 1;
380 usb_settoggle(udev, ep->epnum,
381 ep->nextpid == USB_PID_OUT,
382 PTD_GET_TOGGLE(ptd));
383 urb->actual_length += PTD_GET_COUNT(ptd);
384 status = cc_to_error[TD_DATAUNDERRUN];
385 goto done;
386 }
387 }
388
389 if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
390 && (++ep->error_count >= 3 || cc == TD_CC_STALL
391 || cc == TD_DATAOVERRUN)) {
392 status = cc_to_error[cc];
393 if (ep->nextpid == USB_PID_ACK)
394 ep->nextpid = 0;
395 goto done;
396 }
397 /* According to usb spec, zero-length Int transfer signals
398 finishing of the urb. Hey, does this apply only
399 for IN endpoints? */
400 if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
401 status = 0;
402 goto done;
403 }
404
405 /* Relax after previously failed, but later succeeded
406 or correctly NAK'ed retransmission attempt */
407 if (ep->error_count
408 && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
409 ep->error_count = 0;
410
411 /* Take into account idiosyncracies of the isp116x chip
412 regarding toggle bit for failed transfers */
413 if (ep->nextpid == USB_PID_OUT)
414 usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
415 ^ (ep->error_count > 0));
416 else if (ep->nextpid == USB_PID_IN)
417 usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
418 ^ (ep->error_count > 0));
419
420 switch (ep->nextpid) {
421 case USB_PID_IN:
422 case USB_PID_OUT:
423 urb->actual_length += PTD_GET_COUNT(ptd);
424 if (PTD_GET_ACTIVE(ptd)
425 || (cc != TD_CC_NOERROR && cc < 0x0E))
426 break;
427 if (urb->transfer_buffer_length != urb->actual_length) {
428 if (short_not_ok)
429 break;
430 } else {
431 if (urb->transfer_flags & URB_ZERO_PACKET
432 && ep->nextpid == USB_PID_OUT
433 && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
434 DBG("Zero packet requested\n");
435 break;
436 }
437 }
438 /* All data for this URB is transferred, let's finish */
439 if (usb_pipecontrol(urb->pipe))
440 ep->nextpid = USB_PID_ACK;
441 else
442 status = 0;
443 break;
444 case USB_PID_SETUP:
445 if (PTD_GET_ACTIVE(ptd)
446 || (cc != TD_CC_NOERROR && cc < 0x0E))
447 break;
448 if (urb->transfer_buffer_length == urb->actual_length)
449 ep->nextpid = USB_PID_ACK;
450 else if (usb_pipeout(urb->pipe)) {
451 usb_settoggle(udev, 0, 1, 1);
452 ep->nextpid = USB_PID_OUT;
453 } else {
454 usb_settoggle(udev, 0, 0, 1);
455 ep->nextpid = USB_PID_IN;
456 }
457 break;
458 case USB_PID_ACK:
459 if (PTD_GET_ACTIVE(ptd)
460 || (cc != TD_CC_NOERROR && cc < 0x0E))
461 break;
462 status = 0;
463 ep->nextpid = 0;
464 break;
465 default:
466 BUG();
467 }
468
469 done:
470 if (status != -EINPROGRESS || urb->unlinked)
471 finish_request(isp116x, ep, urb, status);
472 }
473 }
474
475 /*
476 Scan transfer lists, schedule transfers, send data off
477 to chip.
478 */
479 static void start_atl_transfers(struct isp116x *isp116x)
480 {
481 struct isp116x_ep *last_ep = NULL, *ep;
482 struct urb *urb;
483 u16 load = 0;
484 int len, index, speed, byte_time;
485
486 if (atomic_read(&isp116x->atl_finishing))
487 return;
488
489 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
490 return;
491
492 /* FIFO not empty? */
493 if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
494 return;
495
496 isp116x->atl_active = NULL;
497 isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
498
499 /* Schedule int transfers */
500 if (isp116x->periodic_count) {
501 isp116x->fmindex = index =
502 (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
503 load = isp116x->load[index];
504 if (load) {
505 /* Bring all int transfers for this frame
506 into the active queue */
507 isp116x->atl_active = last_ep =
508 isp116x->periodic[index];
509 while (last_ep->next)
510 last_ep = (last_ep->active = last_ep->next);
511 last_ep->active = NULL;
512 }
513 }
514
515 /* Schedule control/bulk transfers */
516 list_for_each_entry(ep, &isp116x->async, schedule) {
517 urb = container_of(ep->hep->urb_list.next,
518 struct urb, urb_list);
519 speed = urb->dev->speed;
520 byte_time = speed == USB_SPEED_LOW
521 ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
522
523 if (ep->nextpid == USB_PID_SETUP) {
524 len = sizeof(struct usb_ctrlrequest);
525 } else if (ep->nextpid == USB_PID_ACK) {
526 len = 0;
527 } else {
528 /* Find current free length ... */
529 len = (MAX_LOAD_LIMIT - load) / byte_time;
530
531 /* ... then limit it to configured max size ... */
532 len = min(len, speed == USB_SPEED_LOW ?
533 MAX_TRANSFER_SIZE_LOWSPEED :
534 MAX_TRANSFER_SIZE_FULLSPEED);
535
536 /* ... and finally cut to the multiple of MaxPacketSize,
537 or to the real length if there's enough room. */
538 if (len <
539 (urb->transfer_buffer_length -
540 urb->actual_length)) {
541 len -= len % ep->maxpacket;
542 if (!len)
543 continue;
544 } else
545 len = urb->transfer_buffer_length -
546 urb->actual_length;
547 BUG_ON(len < 0);
548 }
549
550 load += len * byte_time;
551 if (load > MAX_LOAD_LIMIT)
552 break;
553
554 ep->active = NULL;
555 ep->length = len;
556 if (last_ep)
557 last_ep->active = ep;
558 else
559 isp116x->atl_active = ep;
560 last_ep = ep;
561 }
562
563 /* Avoid starving of endpoints */
564 if ((&isp116x->async)->next != (&isp116x->async)->prev)
565 list_move(&isp116x->async, (&isp116x->async)->next);
566
567 if (isp116x->atl_active) {
568 preproc_atl_queue(isp116x);
569 pack_fifo(isp116x);
570 }
571 }
572
573 /*
574 Finish the processed transfers
575 */
576 static void finish_atl_transfers(struct isp116x *isp116x)
577 {
578 if (!isp116x->atl_active)
579 return;
580 /* Fifo not ready? */
581 if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
582 return;
583
584 atomic_inc(&isp116x->atl_finishing);
585 unpack_fifo(isp116x);
586 postproc_atl_queue(isp116x);
587 atomic_dec(&isp116x->atl_finishing);
588 }
589
590 static irqreturn_t isp116x_irq(struct usb_hcd *hcd)
591 {
592 struct isp116x *isp116x = hcd_to_isp116x(hcd);
593 u16 irqstat;
594 irqreturn_t ret = IRQ_NONE;
595
596 spin_lock(&isp116x->lock);
597 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
598 irqstat = isp116x_read_reg16(isp116x, HCuPINT);
599 isp116x_write_reg16(isp116x, HCuPINT, irqstat);
600
601 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
602 ret = IRQ_HANDLED;
603 finish_atl_transfers(isp116x);
604 }
605
606 if (irqstat & HCuPINT_OPR) {
607 u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
608 isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
609 if (intstat & HCINT_UE) {
610 ERR("Unrecoverable error, HC is dead!\n");
611 /* IRQ's are off, we do no DMA,
612 perfectly ready to die ... */
613 hcd->state = HC_STATE_HALT;
614 usb_hc_died(hcd);
615 ret = IRQ_HANDLED;
616 goto done;
617 }
618 if (intstat & HCINT_RHSC)
619 /* When root hub or any of its ports is going
620 to come out of suspend, it may take more
621 than 10ms for status bits to stabilize. */
622 mod_timer(&hcd->rh_timer, jiffies
623 + msecs_to_jiffies(20) + 1);
624 if (intstat & HCINT_RD) {
625 DBG("---- remote wakeup\n");
626 usb_hcd_resume_root_hub(hcd);
627 }
628 irqstat &= ~HCuPINT_OPR;
629 ret = IRQ_HANDLED;
630 }
631
632 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
633 start_atl_transfers(isp116x);
634 }
635
636 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
637 done:
638 spin_unlock(&isp116x->lock);
639 return ret;
640 }
641
642 /*-----------------------------------------------------------------*/
643
644 /* usb 1.1 says max 90% of a frame is available for periodic transfers.
645 * this driver doesn't promise that much since it's got to handle an
646 * IRQ per packet; irq handling latencies also use up that time.
647 */
648
649 /* out of 1000 us */
650 #define MAX_PERIODIC_LOAD 600
651 static int balance(struct isp116x *isp116x, u16 period, u16 load)
652 {
653 int i, branch = -ENOSPC;
654
655 /* search for the least loaded schedule branch of that period
656 which has enough bandwidth left unreserved. */
657 for (i = 0; i < period; i++) {
658 if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
659 int j;
660
661 for (j = i; j < PERIODIC_SIZE; j += period) {
662 if ((isp116x->load[j] + load)
663 > MAX_PERIODIC_LOAD)
664 break;
665 }
666 if (j < PERIODIC_SIZE)
667 continue;
668 branch = i;
669 }
670 }
671 return branch;
672 }
673
674 /* NB! ALL the code above this point runs with isp116x->lock
675 held, irqs off
676 */
677
678 /*-----------------------------------------------------------------*/
679
680 static int isp116x_urb_enqueue(struct usb_hcd *hcd,
681 struct urb *urb,
682 gfp_t mem_flags)
683 {
684 struct isp116x *isp116x = hcd_to_isp116x(hcd);
685 struct usb_device *udev = urb->dev;
686 unsigned int pipe = urb->pipe;
687 int is_out = !usb_pipein(pipe);
688 int type = usb_pipetype(pipe);
689 int epnum = usb_pipeendpoint(pipe);
690 struct usb_host_endpoint *hep = urb->ep;
691 struct isp116x_ep *ep = NULL;
692 unsigned long flags;
693 int i;
694 int ret = 0;
695
696 urb_dbg(urb, "Enqueue");
697
698 if (type == PIPE_ISOCHRONOUS) {
699 ERR("Isochronous transfers not supported\n");
700 urb_dbg(urb, "Refused to enqueue");
701 return -ENXIO;
702 }
703 /* avoid all allocations within spinlocks: request or endpoint */
704 if (!hep->hcpriv) {
705 ep = kzalloc(sizeof *ep, mem_flags);
706 if (!ep)
707 return -ENOMEM;
708 }
709
710 spin_lock_irqsave(&isp116x->lock, flags);
711 if (!HC_IS_RUNNING(hcd->state)) {
712 kfree(ep);
713 ret = -ENODEV;
714 goto fail_not_linked;
715 }
716 ret = usb_hcd_link_urb_to_ep(hcd, urb);
717 if (ret) {
718 kfree(ep);
719 goto fail_not_linked;
720 }
721
722 if (hep->hcpriv)
723 ep = hep->hcpriv;
724 else {
725 INIT_LIST_HEAD(&ep->schedule);
726 ep->udev = udev;
727 ep->epnum = epnum;
728 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
729 usb_settoggle(udev, epnum, is_out, 0);
730
731 if (type == PIPE_CONTROL) {
732 ep->nextpid = USB_PID_SETUP;
733 } else if (is_out) {
734 ep->nextpid = USB_PID_OUT;
735 } else {
736 ep->nextpid = USB_PID_IN;
737 }
738
739 if (urb->interval) {
740 /*
741 With INT URBs submitted, the driver works with SOF
742 interrupt enabled and ATL interrupt disabled. After
743 the PTDs are written to fifo ram, the chip starts
744 fifo processing and usb transfers after the next
745 SOF and continues until the transfers are finished
746 (succeeded or failed) or the frame ends. Therefore,
747 the transfers occur only in every second frame,
748 while fifo reading/writing and data processing
749 occur in every other second frame. */
750 if (urb->interval < 2)
751 urb->interval = 2;
752 if (urb->interval > 2 * PERIODIC_SIZE)
753 urb->interval = 2 * PERIODIC_SIZE;
754 ep->period = urb->interval >> 1;
755 ep->branch = PERIODIC_SIZE;
756 ep->load = usb_calc_bus_time(udev->speed,
757 !is_out,
758 (type == PIPE_ISOCHRONOUS),
759 usb_maxpacket(udev, pipe,
760 is_out)) /
761 1000;
762 }
763 hep->hcpriv = ep;
764 ep->hep = hep;
765 }
766
767 /* maybe put endpoint into schedule */
768 switch (type) {
769 case PIPE_CONTROL:
770 case PIPE_BULK:
771 if (list_empty(&ep->schedule))
772 list_add_tail(&ep->schedule, &isp116x->async);
773 break;
774 case PIPE_INTERRUPT:
775 urb->interval = ep->period;
776 ep->length = min_t(u32, ep->maxpacket,
777 urb->transfer_buffer_length);
778
779 /* urb submitted for already existing endpoint */
780 if (ep->branch < PERIODIC_SIZE)
781 break;
782
783 ep->branch = ret = balance(isp116x, ep->period, ep->load);
784 if (ret < 0)
785 goto fail;
786 ret = 0;
787
788 urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
789 + ep->branch;
790
791 /* sort each schedule branch by period (slow before fast)
792 to share the faster parts of the tree without needing
793 dummy/placeholder nodes */
794 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
795 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
796 struct isp116x_ep **prev = &isp116x->periodic[i];
797 struct isp116x_ep *here = *prev;
798
799 while (here && ep != here) {
800 if (ep->period > here->period)
801 break;
802 prev = &here->next;
803 here = *prev;
804 }
805 if (ep != here) {
806 ep->next = here;
807 *prev = ep;
808 }
809 isp116x->load[i] += ep->load;
810 }
811 hcd->self.bandwidth_allocated += ep->load / ep->period;
812
813 /* switch over to SOFint */
814 if (!isp116x->periodic_count++) {
815 isp116x->irqenb &= ~HCuPINT_ATL;
816 isp116x->irqenb |= HCuPINT_SOF;
817 isp116x_write_reg16(isp116x, HCuPINTENB,
818 isp116x->irqenb);
819 }
820 }
821
822 urb->hcpriv = hep;
823 start_atl_transfers(isp116x);
824
825 fail:
826 if (ret)
827 usb_hcd_unlink_urb_from_ep(hcd, urb);
828 fail_not_linked:
829 spin_unlock_irqrestore(&isp116x->lock, flags);
830 return ret;
831 }
832
833 /*
834 Dequeue URBs.
835 */
836 static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
837 int status)
838 {
839 struct isp116x *isp116x = hcd_to_isp116x(hcd);
840 struct usb_host_endpoint *hep;
841 struct isp116x_ep *ep, *ep_act;
842 unsigned long flags;
843 int rc;
844
845 spin_lock_irqsave(&isp116x->lock, flags);
846 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
847 if (rc)
848 goto done;
849
850 hep = urb->hcpriv;
851 ep = hep->hcpriv;
852 WARN_ON(hep != ep->hep);
853
854 /* In front of queue? */
855 if (ep->hep->urb_list.next == &urb->urb_list)
856 /* active? */
857 for (ep_act = isp116x->atl_active; ep_act;
858 ep_act = ep_act->active)
859 if (ep_act == ep) {
860 VDBG("dequeue, urb %p active; wait for irq\n",
861 urb);
862 urb = NULL;
863 break;
864 }
865
866 if (urb)
867 finish_request(isp116x, ep, urb, status);
868 done:
869 spin_unlock_irqrestore(&isp116x->lock, flags);
870 return rc;
871 }
872
873 static void isp116x_endpoint_disable(struct usb_hcd *hcd,
874 struct usb_host_endpoint *hep)
875 {
876 int i;
877 struct isp116x_ep *ep = hep->hcpriv;
878
879 if (!ep)
880 return;
881
882 /* assume we'd just wait for the irq */
883 for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
884 msleep(3);
885 if (!list_empty(&hep->urb_list))
886 WARNING("ep %p not empty?\n", ep);
887
888 kfree(ep);
889 hep->hcpriv = NULL;
890 }
891
892 static int isp116x_get_frame(struct usb_hcd *hcd)
893 {
894 struct isp116x *isp116x = hcd_to_isp116x(hcd);
895 u32 fmnum;
896 unsigned long flags;
897
898 spin_lock_irqsave(&isp116x->lock, flags);
899 fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
900 spin_unlock_irqrestore(&isp116x->lock, flags);
901 return (int)fmnum;
902 }
903
904 /*
905 Adapted from ohci-hub.c. Currently we don't support autosuspend.
906 */
907 static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
908 {
909 struct isp116x *isp116x = hcd_to_isp116x(hcd);
910 int ports, i, changed = 0;
911 unsigned long flags;
912
913 if (!HC_IS_RUNNING(hcd->state))
914 return -ESHUTDOWN;
915
916 /* Report no status change now, if we are scheduled to be
917 called later */
918 if (timer_pending(&hcd->rh_timer))
919 return 0;
920
921 ports = isp116x->rhdesca & RH_A_NDP;
922 spin_lock_irqsave(&isp116x->lock, flags);
923 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
924 if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
925 buf[0] = changed = 1;
926 else
927 buf[0] = 0;
928
929 for (i = 0; i < ports; i++) {
930 u32 status = isp116x_read_reg32(isp116x, i ? HCRHPORT2 : HCRHPORT1);
931
932 if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
933 | RH_PS_OCIC | RH_PS_PRSC)) {
934 changed = 1;
935 buf[0] |= 1 << (i + 1);
936 }
937 }
938 spin_unlock_irqrestore(&isp116x->lock, flags);
939 return changed;
940 }
941
942 static void isp116x_hub_descriptor(struct isp116x *isp116x,
943 struct usb_hub_descriptor *desc)
944 {
945 u32 reg = isp116x->rhdesca;
946
947 desc->bDescriptorType = USB_DT_HUB;
948 desc->bDescLength = 9;
949 desc->bHubContrCurrent = 0;
950 desc->bNbrPorts = (u8) (reg & 0x3);
951 /* Power switching, device type, overcurrent. */
952 desc->wHubCharacteristics = cpu_to_le16((u16) ((reg >> 8) &
953 (HUB_CHAR_LPSM |
954 HUB_CHAR_COMPOUND |
955 HUB_CHAR_OCPM)));
956 desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
957 /* ports removable, and legacy PortPwrCtrlMask */
958 desc->u.hs.DeviceRemovable[0] = 0;
959 desc->u.hs.DeviceRemovable[1] = ~0;
960 }
961
962 /* Perform reset of a given port.
963 It would be great to just start the reset and let the
964 USB core to clear the reset in due time. However,
965 root hub ports should be reset for at least 50 ms, while
966 our chip stays in reset for about 10 ms. I.e., we must
967 repeatedly reset it ourself here.
968 */
969 static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
970 {
971 u32 tmp;
972 unsigned long flags, t;
973
974 /* Root hub reset should be 50 ms, but some devices
975 want it even longer. */
976 t = jiffies + msecs_to_jiffies(100);
977
978 while (time_before(jiffies, t)) {
979 spin_lock_irqsave(&isp116x->lock, flags);
980 /* spin until any current reset finishes */
981 for (;;) {
982 tmp = isp116x_read_reg32(isp116x, port ?
983 HCRHPORT2 : HCRHPORT1);
984 if (!(tmp & RH_PS_PRS))
985 break;
986 udelay(500);
987 }
988 /* Don't reset a disconnected port */
989 if (!(tmp & RH_PS_CCS)) {
990 spin_unlock_irqrestore(&isp116x->lock, flags);
991 break;
992 }
993 /* Reset lasts 10ms (claims datasheet) */
994 isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
995 HCRHPORT1, (RH_PS_PRS));
996 spin_unlock_irqrestore(&isp116x->lock, flags);
997 msleep(10);
998 }
999 }
1000
1001 /* Adapted from ohci-hub.c */
1002 static int isp116x_hub_control(struct usb_hcd *hcd,
1003 u16 typeReq,
1004 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1005 {
1006 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1007 int ret = 0;
1008 unsigned long flags;
1009 int ports = isp116x->rhdesca & RH_A_NDP;
1010 u32 tmp = 0;
1011
1012 switch (typeReq) {
1013 case ClearHubFeature:
1014 DBG("ClearHubFeature: ");
1015 switch (wValue) {
1016 case C_HUB_OVER_CURRENT:
1017 DBG("C_HUB_OVER_CURRENT\n");
1018 spin_lock_irqsave(&isp116x->lock, flags);
1019 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
1020 spin_unlock_irqrestore(&isp116x->lock, flags);
1021 case C_HUB_LOCAL_POWER:
1022 DBG("C_HUB_LOCAL_POWER\n");
1023 break;
1024 default:
1025 goto error;
1026 }
1027 break;
1028 case SetHubFeature:
1029 DBG("SetHubFeature: ");
1030 switch (wValue) {
1031 case C_HUB_OVER_CURRENT:
1032 case C_HUB_LOCAL_POWER:
1033 DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1034 break;
1035 default:
1036 goto error;
1037 }
1038 break;
1039 case GetHubDescriptor:
1040 DBG("GetHubDescriptor\n");
1041 isp116x_hub_descriptor(isp116x,
1042 (struct usb_hub_descriptor *)buf);
1043 break;
1044 case GetHubStatus:
1045 DBG("GetHubStatus\n");
1046 *(__le32 *) buf = 0;
1047 break;
1048 case GetPortStatus:
1049 DBG("GetPortStatus\n");
1050 if (!wIndex || wIndex > ports)
1051 goto error;
1052 spin_lock_irqsave(&isp116x->lock, flags);
1053 tmp = isp116x_read_reg32(isp116x, (--wIndex) ? HCRHPORT2 : HCRHPORT1);
1054 spin_unlock_irqrestore(&isp116x->lock, flags);
1055 *(__le32 *) buf = cpu_to_le32(tmp);
1056 DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
1057 break;
1058 case ClearPortFeature:
1059 DBG("ClearPortFeature: ");
1060 if (!wIndex || wIndex > ports)
1061 goto error;
1062 wIndex--;
1063
1064 switch (wValue) {
1065 case USB_PORT_FEAT_ENABLE:
1066 DBG("USB_PORT_FEAT_ENABLE\n");
1067 tmp = RH_PS_CCS;
1068 break;
1069 case USB_PORT_FEAT_C_ENABLE:
1070 DBG("USB_PORT_FEAT_C_ENABLE\n");
1071 tmp = RH_PS_PESC;
1072 break;
1073 case USB_PORT_FEAT_SUSPEND:
1074 DBG("USB_PORT_FEAT_SUSPEND\n");
1075 tmp = RH_PS_POCI;
1076 break;
1077 case USB_PORT_FEAT_C_SUSPEND:
1078 DBG("USB_PORT_FEAT_C_SUSPEND\n");
1079 tmp = RH_PS_PSSC;
1080 break;
1081 case USB_PORT_FEAT_POWER:
1082 DBG("USB_PORT_FEAT_POWER\n");
1083 tmp = RH_PS_LSDA;
1084 break;
1085 case USB_PORT_FEAT_C_CONNECTION:
1086 DBG("USB_PORT_FEAT_C_CONNECTION\n");
1087 tmp = RH_PS_CSC;
1088 break;
1089 case USB_PORT_FEAT_C_OVER_CURRENT:
1090 DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
1091 tmp = RH_PS_OCIC;
1092 break;
1093 case USB_PORT_FEAT_C_RESET:
1094 DBG("USB_PORT_FEAT_C_RESET\n");
1095 tmp = RH_PS_PRSC;
1096 break;
1097 default:
1098 goto error;
1099 }
1100 spin_lock_irqsave(&isp116x->lock, flags);
1101 isp116x_write_reg32(isp116x, wIndex
1102 ? HCRHPORT2 : HCRHPORT1, tmp);
1103 spin_unlock_irqrestore(&isp116x->lock, flags);
1104 break;
1105 case SetPortFeature:
1106 DBG("SetPortFeature: ");
1107 if (!wIndex || wIndex > ports)
1108 goto error;
1109 wIndex--;
1110 switch (wValue) {
1111 case USB_PORT_FEAT_SUSPEND:
1112 DBG("USB_PORT_FEAT_SUSPEND\n");
1113 spin_lock_irqsave(&isp116x->lock, flags);
1114 isp116x_write_reg32(isp116x, wIndex
1115 ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
1116 spin_unlock_irqrestore(&isp116x->lock, flags);
1117 break;
1118 case USB_PORT_FEAT_POWER:
1119 DBG("USB_PORT_FEAT_POWER\n");
1120 spin_lock_irqsave(&isp116x->lock, flags);
1121 isp116x_write_reg32(isp116x, wIndex
1122 ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
1123 spin_unlock_irqrestore(&isp116x->lock, flags);
1124 break;
1125 case USB_PORT_FEAT_RESET:
1126 DBG("USB_PORT_FEAT_RESET\n");
1127 root_port_reset(isp116x, wIndex);
1128 break;
1129 default:
1130 goto error;
1131 }
1132 break;
1133
1134 default:
1135 error:
1136 /* "protocol stall" on error */
1137 DBG("PROTOCOL STALL\n");
1138 ret = -EPIPE;
1139 }
1140 return ret;
1141 }
1142
1143 /*-----------------------------------------------------------------*/
1144
1145 #ifdef CONFIG_DEBUG_FS
1146
1147 static void dump_irq(struct seq_file *s, char *label, u16 mask)
1148 {
1149 seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
1150 mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1151 mask & HCuPINT_SUSP ? " susp" : "",
1152 mask & HCuPINT_OPR ? " opr" : "",
1153 mask & HCuPINT_AIIEOT ? " eot" : "",
1154 mask & HCuPINT_ATL ? " atl" : "",
1155 mask & HCuPINT_SOF ? " sof" : "");
1156 }
1157
1158 static void dump_int(struct seq_file *s, char *label, u32 mask)
1159 {
1160 seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
1161 mask & HCINT_MIE ? " MIE" : "",
1162 mask & HCINT_RHSC ? " rhsc" : "",
1163 mask & HCINT_FNO ? " fno" : "",
1164 mask & HCINT_UE ? " ue" : "",
1165 mask & HCINT_RD ? " rd" : "",
1166 mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
1167 }
1168
1169 static int isp116x_show_dbg(struct seq_file *s, void *unused)
1170 {
1171 struct isp116x *isp116x = s->private;
1172
1173 seq_printf(s, "%s\n%s version %s\n",
1174 isp116x_to_hcd(isp116x)->product_desc, hcd_name,
1175 DRIVER_VERSION);
1176
1177 if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
1178 seq_printf(s, "HCD is suspended\n");
1179 return 0;
1180 }
1181 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
1182 seq_printf(s, "HCD not running\n");
1183 return 0;
1184 }
1185
1186 spin_lock_irq(&isp116x->lock);
1187 dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
1188 dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
1189 dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
1190 dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
1191 isp116x_show_regs_seq(isp116x, s);
1192 spin_unlock_irq(&isp116x->lock);
1193 seq_printf(s, "\n");
1194
1195 return 0;
1196 }
1197
1198 static int isp116x_open_seq(struct inode *inode, struct file *file)
1199 {
1200 return single_open(file, isp116x_show_dbg, inode->i_private);
1201 }
1202
1203 static const struct file_operations isp116x_debug_fops = {
1204 .open = isp116x_open_seq,
1205 .read = seq_read,
1206 .llseek = seq_lseek,
1207 .release = single_release,
1208 };
1209
1210 static int create_debug_file(struct isp116x *isp116x)
1211 {
1212 isp116x->dentry = debugfs_create_file(hcd_name,
1213 S_IRUGO, NULL, isp116x,
1214 &isp116x_debug_fops);
1215 if (!isp116x->dentry)
1216 return -ENOMEM;
1217 return 0;
1218 }
1219
1220 static void remove_debug_file(struct isp116x *isp116x)
1221 {
1222 debugfs_remove(isp116x->dentry);
1223 }
1224
1225 #else
1226
1227 #define create_debug_file(d) 0
1228 #define remove_debug_file(d) do{}while(0)
1229
1230 #endif /* CONFIG_DEBUG_FS */
1231
1232 /*-----------------------------------------------------------------*/
1233
1234 /*
1235 Software reset - can be called from any contect.
1236 */
1237 static int isp116x_sw_reset(struct isp116x *isp116x)
1238 {
1239 int retries = 15;
1240 unsigned long flags;
1241 int ret = 0;
1242
1243 spin_lock_irqsave(&isp116x->lock, flags);
1244 isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
1245 isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
1246 while (--retries) {
1247 /* It usually resets within 1 ms */
1248 mdelay(1);
1249 if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
1250 break;
1251 }
1252 if (!retries) {
1253 ERR("Software reset timeout\n");
1254 ret = -ETIME;
1255 }
1256 spin_unlock_irqrestore(&isp116x->lock, flags);
1257 return ret;
1258 }
1259
1260 static int isp116x_reset(struct usb_hcd *hcd)
1261 {
1262 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1263 unsigned long t;
1264 u16 clkrdy = 0;
1265 int ret, timeout = 15 /* ms */ ;
1266
1267 ret = isp116x_sw_reset(isp116x);
1268 if (ret)
1269 return ret;
1270
1271 t = jiffies + msecs_to_jiffies(timeout);
1272 while (time_before_eq(jiffies, t)) {
1273 msleep(4);
1274 spin_lock_irq(&isp116x->lock);
1275 clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
1276 spin_unlock_irq(&isp116x->lock);
1277 if (clkrdy)
1278 break;
1279 }
1280 if (!clkrdy) {
1281 ERR("Clock not ready after %dms\n", timeout);
1282 /* After sw_reset the clock won't report to be ready, if
1283 H_WAKEUP pin is high. */
1284 ERR("Please make sure that the H_WAKEUP pin is pulled low!\n");
1285 ret = -ENODEV;
1286 }
1287 return ret;
1288 }
1289
1290 static void isp116x_stop(struct usb_hcd *hcd)
1291 {
1292 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1293 unsigned long flags;
1294 u32 val;
1295
1296 spin_lock_irqsave(&isp116x->lock, flags);
1297 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1298
1299 /* Switch off ports' power, some devices don't come up
1300 after next 'insmod' without this */
1301 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1302 val &= ~(RH_A_NPS | RH_A_PSM);
1303 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1304 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
1305 spin_unlock_irqrestore(&isp116x->lock, flags);
1306
1307 isp116x_sw_reset(isp116x);
1308 }
1309
1310 /*
1311 Configure the chip. The chip must be successfully reset by now.
1312 */
1313 static int isp116x_start(struct usb_hcd *hcd)
1314 {
1315 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1316 struct isp116x_platform_data *board = isp116x->board;
1317 u32 val;
1318 unsigned long flags;
1319
1320 spin_lock_irqsave(&isp116x->lock, flags);
1321
1322 /* clear interrupt status and disable all interrupt sources */
1323 isp116x_write_reg16(isp116x, HCuPINT, 0xff);
1324 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1325
1326 val = isp116x_read_reg16(isp116x, HCCHIPID);
1327 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1328 ERR("Invalid chip ID %04x\n", val);
1329 spin_unlock_irqrestore(&isp116x->lock, flags);
1330 return -ENODEV;
1331 }
1332
1333 /* To be removed in future */
1334 hcd->uses_new_polling = 1;
1335
1336 isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
1337 isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
1338
1339 /* ----- HW conf */
1340 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1341 if (board->sel15Kres)
1342 val |= HCHWCFG_15KRSEL;
1343 /* Remote wakeup won't work without working clock */
1344 if (board->remote_wakeup_enable)
1345 val |= HCHWCFG_CLKNOTSTOP;
1346 if (board->oc_enable)
1347 val |= HCHWCFG_ANALOG_OC;
1348 if (board->int_act_high)
1349 val |= HCHWCFG_INT_POL;
1350 if (board->int_edge_triggered)
1351 val |= HCHWCFG_INT_TRIGGER;
1352 isp116x_write_reg16(isp116x, HCHWCFG, val);
1353
1354 /* ----- Root hub conf */
1355 val = (25 << 24) & RH_A_POTPGT;
1356 /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
1357 be always set. Yet, instead, we request individual port
1358 power switching. */
1359 val |= RH_A_PSM;
1360 /* Report overcurrent per port */
1361 val |= RH_A_OCPM;
1362 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1363 isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
1364
1365 val = RH_B_PPCM;
1366 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1367 isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
1368
1369 val = 0;
1370 if (board->remote_wakeup_enable) {
1371 if (!device_can_wakeup(hcd->self.controller))
1372 device_init_wakeup(hcd->self.controller, 1);
1373 val |= RH_HS_DRWE;
1374 }
1375 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1376 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
1377
1378 isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
1379
1380 hcd->state = HC_STATE_RUNNING;
1381
1382 /* Set up interrupts */
1383 isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
1384 if (board->remote_wakeup_enable)
1385 isp116x->intenb |= HCINT_RD;
1386 isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
1387 isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
1388 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
1389
1390 /* Go operational */
1391 val = HCCONTROL_USB_OPER;
1392 if (board->remote_wakeup_enable)
1393 val |= HCCONTROL_RWE;
1394 isp116x_write_reg32(isp116x, HCCONTROL, val);
1395
1396 /* Disable ports to avoid race in device enumeration */
1397 isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
1398 isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
1399
1400 isp116x_show_regs_log(isp116x);
1401 spin_unlock_irqrestore(&isp116x->lock, flags);
1402 return 0;
1403 }
1404
1405 #ifdef CONFIG_PM
1406
1407 static int isp116x_bus_suspend(struct usb_hcd *hcd)
1408 {
1409 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1410 unsigned long flags;
1411 u32 val;
1412 int ret = 0;
1413
1414 spin_lock_irqsave(&isp116x->lock, flags);
1415 val = isp116x_read_reg32(isp116x, HCCONTROL);
1416
1417 switch (val & HCCONTROL_HCFS) {
1418 case HCCONTROL_USB_OPER:
1419 spin_unlock_irqrestore(&isp116x->lock, flags);
1420 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1421 val |= HCCONTROL_USB_SUSPEND;
1422 if (hcd->self.root_hub->do_remote_wakeup)
1423 val |= HCCONTROL_RWE;
1424 /* Wait for usb transfers to finish */
1425 msleep(2);
1426 spin_lock_irqsave(&isp116x->lock, flags);
1427 isp116x_write_reg32(isp116x, HCCONTROL, val);
1428 spin_unlock_irqrestore(&isp116x->lock, flags);
1429 /* Wait for devices to suspend */
1430 msleep(5);
1431 break;
1432 case HCCONTROL_USB_RESUME:
1433 isp116x_write_reg32(isp116x, HCCONTROL,
1434 (val & ~HCCONTROL_HCFS) |
1435 HCCONTROL_USB_RESET);
1436 case HCCONTROL_USB_RESET:
1437 ret = -EBUSY;
1438 default: /* HCCONTROL_USB_SUSPEND */
1439 spin_unlock_irqrestore(&isp116x->lock, flags);
1440 break;
1441 }
1442
1443 return ret;
1444 }
1445
1446 static int isp116x_bus_resume(struct usb_hcd *hcd)
1447 {
1448 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1449 u32 val;
1450
1451 msleep(5);
1452 spin_lock_irq(&isp116x->lock);
1453
1454 val = isp116x_read_reg32(isp116x, HCCONTROL);
1455 switch (val & HCCONTROL_HCFS) {
1456 case HCCONTROL_USB_SUSPEND:
1457 val &= ~HCCONTROL_HCFS;
1458 val |= HCCONTROL_USB_RESUME;
1459 isp116x_write_reg32(isp116x, HCCONTROL, val);
1460 case HCCONTROL_USB_RESUME:
1461 break;
1462 case HCCONTROL_USB_OPER:
1463 spin_unlock_irq(&isp116x->lock);
1464 return 0;
1465 default:
1466 /* HCCONTROL_USB_RESET: this may happen, when during
1467 suspension the HC lost power. Reinitialize completely */
1468 spin_unlock_irq(&isp116x->lock);
1469 DBG("Chip has been reset while suspended. Reinit from scratch.\n");
1470 isp116x_reset(hcd);
1471 isp116x_start(hcd);
1472 isp116x_hub_control(hcd, SetPortFeature,
1473 USB_PORT_FEAT_POWER, 1, NULL, 0);
1474 if ((isp116x->rhdesca & RH_A_NDP) == 2)
1475 isp116x_hub_control(hcd, SetPortFeature,
1476 USB_PORT_FEAT_POWER, 2, NULL, 0);
1477 return 0;
1478 }
1479
1480 val = isp116x->rhdesca & RH_A_NDP;
1481 while (val--) {
1482 u32 stat =
1483 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1484 /* force global, not selective, resume */
1485 if (!(stat & RH_PS_PSS))
1486 continue;
1487 DBG("%s: Resuming port %d\n", __func__, val);
1488 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1489 ? HCRHPORT2 : HCRHPORT1);
1490 }
1491 spin_unlock_irq(&isp116x->lock);
1492
1493 hcd->state = HC_STATE_RESUMING;
1494 msleep(USB_RESUME_TIMEOUT);
1495
1496 /* Go operational */
1497 spin_lock_irq(&isp116x->lock);
1498 val = isp116x_read_reg32(isp116x, HCCONTROL);
1499 isp116x_write_reg32(isp116x, HCCONTROL,
1500 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
1501 spin_unlock_irq(&isp116x->lock);
1502 hcd->state = HC_STATE_RUNNING;
1503
1504 return 0;
1505 }
1506
1507 #else
1508
1509 #define isp116x_bus_suspend NULL
1510 #define isp116x_bus_resume NULL
1511
1512 #endif
1513
1514 static struct hc_driver isp116x_hc_driver = {
1515 .description = hcd_name,
1516 .product_desc = "ISP116x Host Controller",
1517 .hcd_priv_size = sizeof(struct isp116x),
1518
1519 .irq = isp116x_irq,
1520 .flags = HCD_USB11,
1521
1522 .reset = isp116x_reset,
1523 .start = isp116x_start,
1524 .stop = isp116x_stop,
1525
1526 .urb_enqueue = isp116x_urb_enqueue,
1527 .urb_dequeue = isp116x_urb_dequeue,
1528 .endpoint_disable = isp116x_endpoint_disable,
1529
1530 .get_frame_number = isp116x_get_frame,
1531
1532 .hub_status_data = isp116x_hub_status_data,
1533 .hub_control = isp116x_hub_control,
1534 .bus_suspend = isp116x_bus_suspend,
1535 .bus_resume = isp116x_bus_resume,
1536 };
1537
1538 /*----------------------------------------------------------------*/
1539
1540 static int isp116x_remove(struct platform_device *pdev)
1541 {
1542 struct usb_hcd *hcd = platform_get_drvdata(pdev);
1543 struct isp116x *isp116x;
1544 struct resource *res;
1545
1546 if (!hcd)
1547 return 0;
1548 isp116x = hcd_to_isp116x(hcd);
1549 remove_debug_file(isp116x);
1550 usb_remove_hcd(hcd);
1551
1552 iounmap(isp116x->data_reg);
1553 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1554 release_mem_region(res->start, 2);
1555 iounmap(isp116x->addr_reg);
1556 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1557 release_mem_region(res->start, 2);
1558
1559 usb_put_hcd(hcd);
1560 return 0;
1561 }
1562
1563 static int isp116x_probe(struct platform_device *pdev)
1564 {
1565 struct usb_hcd *hcd;
1566 struct isp116x *isp116x;
1567 struct resource *addr, *data, *ires;
1568 void __iomem *addr_reg;
1569 void __iomem *data_reg;
1570 int irq;
1571 int ret = 0;
1572 unsigned long irqflags;
1573
1574 if (usb_disabled())
1575 return -ENODEV;
1576
1577 if (pdev->num_resources < 3) {
1578 ret = -ENODEV;
1579 goto err1;
1580 }
1581
1582 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1583 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1584 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1585
1586 if (!addr || !data || !ires) {
1587 ret = -ENODEV;
1588 goto err1;
1589 }
1590
1591 irq = ires->start;
1592 irqflags = ires->flags & IRQF_TRIGGER_MASK;
1593
1594 if (pdev->dev.dma_mask) {
1595 DBG("DMA not supported\n");
1596 ret = -EINVAL;
1597 goto err1;
1598 }
1599
1600 if (!request_mem_region(addr->start, 2, hcd_name)) {
1601 ret = -EBUSY;
1602 goto err1;
1603 }
1604 addr_reg = ioremap(addr->start, resource_size(addr));
1605 if (addr_reg == NULL) {
1606 ret = -ENOMEM;
1607 goto err2;
1608 }
1609 if (!request_mem_region(data->start, 2, hcd_name)) {
1610 ret = -EBUSY;
1611 goto err3;
1612 }
1613 data_reg = ioremap(data->start, resource_size(data));
1614 if (data_reg == NULL) {
1615 ret = -ENOMEM;
1616 goto err4;
1617 }
1618
1619 /* allocate and initialize hcd */
1620 hcd = usb_create_hcd(&isp116x_hc_driver, &pdev->dev, dev_name(&pdev->dev));
1621 if (!hcd) {
1622 ret = -ENOMEM;
1623 goto err5;
1624 }
1625 /* this rsrc_start is bogus */
1626 hcd->rsrc_start = addr->start;
1627 isp116x = hcd_to_isp116x(hcd);
1628 isp116x->data_reg = data_reg;
1629 isp116x->addr_reg = addr_reg;
1630 spin_lock_init(&isp116x->lock);
1631 INIT_LIST_HEAD(&isp116x->async);
1632 isp116x->board = dev_get_platdata(&pdev->dev);
1633
1634 if (!isp116x->board) {
1635 ERR("Platform data structure not initialized\n");
1636 ret = -ENODEV;
1637 goto err6;
1638 }
1639 if (isp116x_check_platform_delay(isp116x)) {
1640 ERR("USE_PLATFORM_DELAY defined, but delay function not "
1641 "implemented.\n");
1642 ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
1643 ret = -ENODEV;
1644 goto err6;
1645 }
1646
1647 ret = usb_add_hcd(hcd, irq, irqflags);
1648 if (ret)
1649 goto err6;
1650
1651 device_wakeup_enable(hcd->self.controller);
1652
1653 ret = create_debug_file(isp116x);
1654 if (ret) {
1655 ERR("Couldn't create debugfs entry\n");
1656 goto err7;
1657 }
1658
1659 return 0;
1660
1661 err7:
1662 usb_remove_hcd(hcd);
1663 err6:
1664 usb_put_hcd(hcd);
1665 err5:
1666 iounmap(data_reg);
1667 err4:
1668 release_mem_region(data->start, 2);
1669 err3:
1670 iounmap(addr_reg);
1671 err2:
1672 release_mem_region(addr->start, 2);
1673 err1:
1674 ERR("init error, %d\n", ret);
1675 return ret;
1676 }
1677
1678 #ifdef CONFIG_PM
1679 /*
1680 Suspend of platform device
1681 */
1682 static int isp116x_suspend(struct platform_device *dev, pm_message_t state)
1683 {
1684 VDBG("%s: state %x\n", __func__, state.event);
1685 return 0;
1686 }
1687
1688 /*
1689 Resume platform device
1690 */
1691 static int isp116x_resume(struct platform_device *dev)
1692 {
1693 VDBG("%s\n", __func__);
1694 return 0;
1695 }
1696
1697 #else
1698
1699 #define isp116x_suspend NULL
1700 #define isp116x_resume NULL
1701
1702 #endif
1703
1704 /* work with hotplug and coldplug */
1705 MODULE_ALIAS("platform:isp116x-hcd");
1706
1707 static struct platform_driver isp116x_driver = {
1708 .probe = isp116x_probe,
1709 .remove = isp116x_remove,
1710 .suspend = isp116x_suspend,
1711 .resume = isp116x_resume,
1712 .driver = {
1713 .name = hcd_name,
1714 },
1715 };
1716
1717 module_platform_driver(isp116x_driver);
Linux with added FPC-III support