2 * Copyright (c) 2015 MediaTek Inc.
4 * Zhigang.Wei <zhigang.wei@mediatek.com>
5 * Chunfeng.Yun <chunfeng.yun@mediatek.com>
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
25 #define SS_BW_BOUNDARY 51000
26 /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
27 #define HS_BW_BOUNDARY 6144
28 /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
29 #define FS_PAYLOAD_MAX 188
31 /* mtk scheduler bitmasks */
32 #define EP_BPKTS(p) ((p) & 0x3f)
33 #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
34 #define EP_BBM(p) ((p) << 11)
35 #define EP_BOFFSET(p) ((p) & 0x3fff)
36 #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
38 static int is_fs_or_ls(enum usb_device_speed speed
)
40 return speed
== USB_SPEED_FULL
|| speed
== USB_SPEED_LOW
;
44 * get the index of bandwidth domains array which @ep belongs to.
46 * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
47 * each HS root port is treated as a single bandwidth domain,
48 * but each SS root port is treated as two bandwidth domains, one for IN eps,
50 * @real_port value is defined as follow according to xHCI spec:
51 * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
52 * so the bandwidth domain array is organized as follow for simplification:
53 * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
55 static int get_bw_index(struct xhci_hcd
*xhci
, struct usb_device
*udev
,
56 struct usb_host_endpoint
*ep
)
58 struct xhci_virt_device
*virt_dev
;
61 virt_dev
= xhci
->devs
[udev
->slot_id
];
63 if (udev
->speed
== USB_SPEED_SUPER
) {
64 if (usb_endpoint_dir_out(&ep
->desc
))
65 bw_index
= (virt_dev
->real_port
- 1) * 2;
67 bw_index
= (virt_dev
->real_port
- 1) * 2 + 1;
69 /* add one more for each SS port */
70 bw_index
= virt_dev
->real_port
+ xhci
->num_usb3_ports
- 1;
76 static void setup_sch_info(struct usb_device
*udev
,
77 struct xhci_ep_ctx
*ep_ctx
, struct mu3h_sch_ep_info
*sch_ep
)
86 ep_type
= CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx
->ep_info2
));
87 ep_interval
= CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx
->ep_info
));
88 max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
89 max_burst
= CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx
->ep_info2
));
90 mult
= CTX_TO_EP_MULT(le32_to_cpu(ep_ctx
->ep_info
));
92 sch_ep
->esit
= 1 << ep_interval
;
94 sch_ep
->burst_mode
= 0;
96 if (udev
->speed
== USB_SPEED_HIGH
) {
100 * usb_20 spec section5.9
101 * a single microframe is enough for HS synchromous endpoints
104 sch_ep
->num_budget_microframes
= 1;
108 * xHCI spec section6.2.3.4
109 * @max_burst is the number of additional transactions
110 * opportunities per microframe
112 sch_ep
->pkts
= max_burst
+ 1;
113 sch_ep
->bw_cost_per_microframe
= max_packet_size
* sch_ep
->pkts
;
114 } else if (udev
->speed
== USB_SPEED_SUPER
) {
115 /* usb3_r1 spec section4.4.7 & 4.4.8 */
116 sch_ep
->cs_count
= 0;
117 esit_pkts
= (mult
+ 1) * (max_burst
+ 1);
118 if (ep_type
== INT_IN_EP
|| ep_type
== INT_OUT_EP
) {
119 sch_ep
->pkts
= esit_pkts
;
120 sch_ep
->num_budget_microframes
= 1;
124 if (ep_type
== ISOC_IN_EP
|| ep_type
== ISOC_OUT_EP
) {
125 if (esit_pkts
<= sch_ep
->esit
)
128 sch_ep
->pkts
= roundup_pow_of_two(esit_pkts
)
131 sch_ep
->num_budget_microframes
=
132 DIV_ROUND_UP(esit_pkts
, sch_ep
->pkts
);
134 if (sch_ep
->num_budget_microframes
> 1)
139 sch_ep
->bw_cost_per_microframe
= max_packet_size
* sch_ep
->pkts
;
140 } else if (is_fs_or_ls(udev
->speed
)) {
143 * usb_20 spec section11.18.4
147 sch_ep
->pkts
= 1; /* at most one packet for each microframe */
148 if (ep_type
== INT_IN_EP
|| ep_type
== INT_OUT_EP
) {
149 sch_ep
->cs_count
= 3; /* at most need 3 CS*/
150 /* one for SS and one for budgeted transaction */
151 sch_ep
->num_budget_microframes
= sch_ep
->cs_count
+ 2;
152 sch_ep
->bw_cost_per_microframe
= max_packet_size
;
154 if (ep_type
== ISOC_OUT_EP
) {
157 * the best case FS budget assumes that 188 FS bytes
158 * occur in each microframe
160 sch_ep
->num_budget_microframes
= DIV_ROUND_UP(
161 max_packet_size
, FS_PAYLOAD_MAX
);
162 sch_ep
->bw_cost_per_microframe
= FS_PAYLOAD_MAX
;
163 sch_ep
->cs_count
= sch_ep
->num_budget_microframes
;
165 if (ep_type
== ISOC_IN_EP
) {
166 /* at most need additional two CS. */
167 sch_ep
->cs_count
= DIV_ROUND_UP(
168 max_packet_size
, FS_PAYLOAD_MAX
) + 2;
169 sch_ep
->num_budget_microframes
= sch_ep
->cs_count
+ 2;
170 sch_ep
->bw_cost_per_microframe
= FS_PAYLOAD_MAX
;
175 /* Get maximum bandwidth when we schedule at offset slot. */
176 static u32
get_max_bw(struct mu3h_sch_bw_info
*sch_bw
,
177 struct mu3h_sch_ep_info
*sch_ep
, u32 offset
)
184 num_esit
= XHCI_MTK_MAX_ESIT
/ sch_ep
->esit
;
185 for (i
= 0; i
< num_esit
; i
++) {
186 u32 base
= offset
+ i
* sch_ep
->esit
;
188 for (j
= 0; j
< sch_ep
->num_budget_microframes
; j
++) {
189 if (sch_bw
->bus_bw
[base
+ j
] > max_bw
)
190 max_bw
= sch_bw
->bus_bw
[base
+ j
];
196 static void update_bus_bw(struct mu3h_sch_bw_info
*sch_bw
,
197 struct mu3h_sch_ep_info
*sch_ep
, int bw_cost
)
204 num_esit
= XHCI_MTK_MAX_ESIT
/ sch_ep
->esit
;
205 for (i
= 0; i
< num_esit
; i
++) {
206 base
= sch_ep
->offset
+ i
* sch_ep
->esit
;
207 for (j
= 0; j
< sch_ep
->num_budget_microframes
; j
++)
208 sch_bw
->bus_bw
[base
+ j
] += bw_cost
;
212 static int check_sch_bw(struct usb_device
*udev
,
213 struct mu3h_sch_bw_info
*sch_bw
, struct mu3h_sch_ep_info
*sch_ep
)
217 u32 num_budget_microframes
;
223 if (sch_ep
->esit
> XHCI_MTK_MAX_ESIT
)
224 sch_ep
->esit
= XHCI_MTK_MAX_ESIT
;
227 num_budget_microframes
= sch_ep
->num_budget_microframes
;
230 * Search through all possible schedule microframes.
231 * and find a microframe where its worst bandwidth is minimum.
235 for (offset
= 0; offset
< esit
; offset
++) {
236 if ((offset
+ num_budget_microframes
) > sch_ep
->esit
)
240 * usb_20 spec section11.18:
241 * must never schedule Start-Split in Y6
243 if (is_fs_or_ls(udev
->speed
) && (offset
% 8 == 6))
246 worst_bw
= get_max_bw(sch_bw
, sch_ep
, offset
);
247 if (min_bw
> worst_bw
) {
254 sch_ep
->offset
= min_index
;
256 bw_boundary
= (udev
->speed
== USB_SPEED_SUPER
)
257 ? SS_BW_BOUNDARY
: HS_BW_BOUNDARY
;
259 /* check bandwidth */
260 if (min_bw
+ sch_ep
->bw_cost_per_microframe
> bw_boundary
)
263 /* update bus bandwidth info */
264 update_bus_bw(sch_bw
, sch_ep
, sch_ep
->bw_cost_per_microframe
);
269 static bool need_bw_sch(struct usb_host_endpoint
*ep
,
270 enum usb_device_speed speed
, int has_tt
)
272 /* only for periodic endpoints */
273 if (usb_endpoint_xfer_control(&ep
->desc
)
274 || usb_endpoint_xfer_bulk(&ep
->desc
))
278 * for LS & FS periodic endpoints which its device is not behind
279 * a TT are also ignored, root-hub will schedule them directly,
280 * but need set @bpkts field of endpoint context to 1.
282 if (is_fs_or_ls(speed
) && !has_tt
)
288 int xhci_mtk_sch_init(struct xhci_hcd_mtk
*mtk
)
290 struct mu3h_sch_bw_info
*sch_array
;
294 /* ss IN and OUT are separated */
295 num_usb_bus
= mtk
->num_u3_ports
* 2 + mtk
->num_u2_ports
;
297 sch_array
= kcalloc(num_usb_bus
, sizeof(*sch_array
), GFP_KERNEL
);
298 if (sch_array
== NULL
)
301 for (i
= 0; i
< num_usb_bus
; i
++)
302 INIT_LIST_HEAD(&sch_array
[i
].bw_ep_list
);
304 mtk
->sch_array
= sch_array
;
308 EXPORT_SYMBOL_GPL(xhci_mtk_sch_init
);
310 void xhci_mtk_sch_exit(struct xhci_hcd_mtk
*mtk
)
312 kfree(mtk
->sch_array
);
314 EXPORT_SYMBOL_GPL(xhci_mtk_sch_exit
);
316 int xhci_mtk_add_ep_quirk(struct usb_hcd
*hcd
, struct usb_device
*udev
,
317 struct usb_host_endpoint
*ep
)
319 struct xhci_hcd_mtk
*mtk
= hcd_to_mtk(hcd
);
320 struct xhci_hcd
*xhci
;
321 struct xhci_ep_ctx
*ep_ctx
;
322 struct xhci_slot_ctx
*slot_ctx
;
323 struct xhci_virt_device
*virt_dev
;
324 struct mu3h_sch_bw_info
*sch_bw
;
325 struct mu3h_sch_ep_info
*sch_ep
;
326 struct mu3h_sch_bw_info
*sch_array
;
327 unsigned int ep_index
;
331 xhci
= hcd_to_xhci(hcd
);
332 virt_dev
= xhci
->devs
[udev
->slot_id
];
333 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
334 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
335 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, ep_index
);
336 sch_array
= mtk
->sch_array
;
338 xhci_dbg(xhci
, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
339 __func__
, usb_endpoint_type(&ep
->desc
), udev
->speed
,
340 GET_MAX_PACKET(usb_endpoint_maxp(&ep
->desc
)),
341 usb_endpoint_dir_in(&ep
->desc
), ep
);
343 if (!need_bw_sch(ep
, udev
->speed
, slot_ctx
->tt_info
& TT_SLOT
)) {
345 * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
346 * device does not connected through an external HS hub
348 if (usb_endpoint_xfer_int(&ep
->desc
)
349 || usb_endpoint_xfer_isoc(&ep
->desc
))
350 ep_ctx
->reserved
[0] |= cpu_to_le32(EP_BPKTS(1));
355 bw_index
= get_bw_index(xhci
, udev
, ep
);
356 sch_bw
= &sch_array
[bw_index
];
358 sch_ep
= kzalloc(sizeof(struct mu3h_sch_ep_info
), GFP_NOIO
);
362 setup_sch_info(udev
, ep_ctx
, sch_ep
);
364 ret
= check_sch_bw(udev
, sch_bw
, sch_ep
);
366 xhci_err(xhci
, "Not enough bandwidth!\n");
371 list_add_tail(&sch_ep
->endpoint
, &sch_bw
->bw_ep_list
);
374 ep_ctx
->reserved
[0] |= cpu_to_le32(EP_BPKTS(sch_ep
->pkts
)
375 | EP_BCSCOUNT(sch_ep
->cs_count
) | EP_BBM(sch_ep
->burst_mode
));
376 ep_ctx
->reserved
[1] |= cpu_to_le32(EP_BOFFSET(sch_ep
->offset
)
377 | EP_BREPEAT(sch_ep
->repeat
));
379 xhci_dbg(xhci
, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
380 sch_ep
->pkts
, sch_ep
->cs_count
, sch_ep
->burst_mode
,
381 sch_ep
->offset
, sch_ep
->repeat
);
385 EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk
);
387 void xhci_mtk_drop_ep_quirk(struct usb_hcd
*hcd
, struct usb_device
*udev
,
388 struct usb_host_endpoint
*ep
)
390 struct xhci_hcd_mtk
*mtk
= hcd_to_mtk(hcd
);
391 struct xhci_hcd
*xhci
;
392 struct xhci_slot_ctx
*slot_ctx
;
393 struct xhci_virt_device
*virt_dev
;
394 struct mu3h_sch_bw_info
*sch_array
;
395 struct mu3h_sch_bw_info
*sch_bw
;
396 struct mu3h_sch_ep_info
*sch_ep
;
399 xhci
= hcd_to_xhci(hcd
);
400 virt_dev
= xhci
->devs
[udev
->slot_id
];
401 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
402 sch_array
= mtk
->sch_array
;
404 xhci_dbg(xhci
, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
405 __func__
, usb_endpoint_type(&ep
->desc
), udev
->speed
,
406 GET_MAX_PACKET(usb_endpoint_maxp(&ep
->desc
)),
407 usb_endpoint_dir_in(&ep
->desc
), ep
);
409 if (!need_bw_sch(ep
, udev
->speed
, slot_ctx
->tt_info
& TT_SLOT
))
412 bw_index
= get_bw_index(xhci
, udev
, ep
);
413 sch_bw
= &sch_array
[bw_index
];
415 list_for_each_entry(sch_ep
, &sch_bw
->bw_ep_list
, endpoint
) {
416 if (sch_ep
->ep
== ep
) {
417 update_bus_bw(sch_bw
, sch_ep
,
418 -sch_ep
->bw_cost_per_microframe
);
419 list_del(&sch_ep
->endpoint
);
425 EXPORT_SYMBOL_GPL(xhci_mtk_drop_ep_quirk
);