drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/module.h>
  26 #include <linux/acpi.h>
  27
  28 #include "xhci.h"
  29 #include "xhci-trace.h"
  30
  31 #define SSIC_PORT_NUM           2
  32 #define SSIC_PORT_CFG2          0x880c
  33 #define SSIC_PORT_CFG2_OFFSET   0x30
  34 #define PROG_DONE               (1 << 30)
  35 #define SSIC_PORT_UNUSED        (1 << 31)
  36
  37 /* Device for a quirk */
  38 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  39 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  40 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009       0x1009
  41 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  42
  43 #define PCI_VENDOR_ID_ETRON             0x1b6f
  44 #define PCI_DEVICE_ID_EJ168             0x7023
  45
  46 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
  47 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
  48 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
  49 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
  50 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
  51 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI              0x0aa8
  52 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI              0x1aa8
  53
  54 static const char hcd_name[] = "xhci_hcd";
  55
  56 static struct hc_driver __read_mostly xhci_pci_hc_driver;
  57
  58 static int xhci_pci_setup(struct usb_hcd *hcd);
  59
  60 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
  61         .reset = xhci_pci_setup,
  62 };
  63
  64 /* called after powerup, by probe or system-pm "wakeup" */
  65 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  66 {
  67         /*
  68          * TODO: Implement finding debug ports later.
  69          * TODO: see if there are any quirks that need to be added to handle
  70          * new extended capabilities.
  71          */
  72
  73         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  74         if (!pci_set_mwi(pdev))
  75                 xhci_dbg(xhci, "MWI active\n");
  76
  77         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  78         return 0;
  79 }
  80
  81 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  82 {
  83         struct pci_dev          *pdev = to_pci_dev(dev);
  84
  85         /* Look for vendor-specific quirks */
  86         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  87                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  88                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  89                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  90                                 pdev->revision == 0x0) {
  91                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  92                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  93                                 "QUIRK: Fresco Logic xHC needs configure"
  94                                 " endpoint cmd after reset endpoint");
  95                 }
  96                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  97                                 pdev->revision == 0x4) {
  98                         xhci->quirks |= XHCI_SLOW_SUSPEND;
  99                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 100                                 "QUIRK: Fresco Logic xHC revision %u"
 101                                 "must be suspended extra slowly",
 102                                 pdev->revision);
 103                 }
 104                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
 105                         xhci->quirks |= XHCI_BROKEN_STREAMS;
 106                 /* Fresco Logic confirms: all revisions of this chip do not
 107                  * support MSI, even though some of them claim to in their PCI
 108                  * capabilities.
 109                  */
 110                 xhci->quirks |= XHCI_BROKEN_MSI;
 111                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 112                                 "QUIRK: Fresco Logic revision %u "
 113                                 "has broken MSI implementation",
 114                                 pdev->revision);
 115                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 116         }
 117
 118         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 119                         pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
 120                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 121
 122         if (pdev->vendor == PCI_VENDOR_ID_NEC)
 123                 xhci->quirks |= XHCI_NEC_HOST;
 124
 125         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
 126                 xhci->quirks |= XHCI_AMD_0x96_HOST;
 127
 128         /* AMD PLL quirk */
 129         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 130                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 131
 132         if (pdev->vendor == PCI_VENDOR_ID_AMD)
 133                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 134
 135         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 136                 xhci->quirks |= XHCI_LPM_SUPPORT;
 137                 xhci->quirks |= XHCI_INTEL_HOST;
 138                 xhci->quirks |= XHCI_AVOID_BEI;
 139         }
 140         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 141                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
 142                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 143                 xhci->limit_active_eps = 64;
 144                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 145                 /*
 146                  * PPT desktop boards DH77EB and DH77DF will power back on after
 147                  * a few seconds of being shutdown.  The fix for this is to
 148                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 149                  * DMI information to find those particular boards (since each
 150                  * vendor will change the board name), so we have to key off all
 151                  * PPT chipsets.
 152                  */
 153                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 154         }
 155         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 156                 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
 157                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 158                 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
 159         }
 160         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 161                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
 162                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
 163                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
 164                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
 165                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI)) {
 166                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
 167         }
 168         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 169                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
 170                 xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
 171         }
 172         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 173                         pdev->device == PCI_DEVICE_ID_EJ168) {
 174                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 175                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 176                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 177         }
 178         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 179                         pdev->device == 0x0015)
 180                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 181         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 182                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 183
 184         /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
 185         if (pdev->vendor == PCI_VENDOR_ID_VIA &&
 186                         pdev->device == 0x3432)
 187                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 188
 189         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 190                         pdev->device == 0x1042)
 191                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 192
 193         if (xhci->quirks & XHCI_RESET_ON_RESUME)
 194                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 195                                 "QUIRK: Resetting on resume");
 196 }
 197
 198 #ifdef CONFIG_ACPI
 199 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
 200 {
 201         static const u8 intel_dsm_uuid[] = {
 202                 0xb7, 0x0c, 0x34, 0xac, 0x01, 0xe9, 0xbf, 0x45,
 203                 0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23,
 204         };
 205         union acpi_object *obj;
 206
 207         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), intel_dsm_uuid, 3, 1,
 208                                 NULL);
 209         ACPI_FREE(obj);
 210 }
 211 #else
 212 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
 213 #endif /* CONFIG_ACPI */
 214
 215 /* called during probe() after chip reset completes */
 216 static int xhci_pci_setup(struct usb_hcd *hcd)
 217 {
 218         struct xhci_hcd         *xhci;
 219         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 220         int                     retval;
 221
 222         xhci = hcd_to_xhci(hcd);
 223         if (!xhci->sbrn)
 224                 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 225
 226         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 227         if (retval)
 228                 return retval;
 229
 230         if (!usb_hcd_is_primary_hcd(hcd))
 231                 return 0;
 232
 233         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 234
 235         /* Find any debug ports */
 236         retval = xhci_pci_reinit(xhci, pdev);
 237         if (!retval)
 238                 return retval;
 239
 240         return retval;
 241 }
 242
 243 /*
 244  * We need to register our own PCI probe function (instead of the USB core's
 245  * function) in order to create a second roothub under xHCI.
 246  */
 247 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 248 {
 249         int retval;
 250         struct xhci_hcd *xhci;
 251         struct hc_driver *driver;
 252         struct usb_hcd *hcd;
 253
 254         driver = (struct hc_driver *)id->driver_data;
 255
 256         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
 257         pm_runtime_get_noresume(&dev->dev);
 258
 259         /* Register the USB 2.0 roothub.
 260          * FIXME: USB core must know to register the USB 2.0 roothub first.
 261          * This is sort of silly, because we could just set the HCD driver flags
 262          * to say USB 2.0, but I'm not sure what the implications would be in
 263          * the other parts of the HCD code.
 264          */
 265         retval = usb_hcd_pci_probe(dev, id);
 266
 267         if (retval)
 268                 goto put_runtime_pm;
 269
 270         /* USB 2.0 roothub is stored in the PCI device now. */
 271         hcd = dev_get_drvdata(&dev->dev);
 272         xhci = hcd_to_xhci(hcd);
 273         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 274                                 pci_name(dev), hcd);
 275         if (!xhci->shared_hcd) {
 276                 retval = -ENOMEM;
 277                 goto dealloc_usb2_hcd;
 278         }
 279
 280         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 281                         IRQF_SHARED);
 282         if (retval)
 283                 goto put_usb3_hcd;
 284         /* Roothub already marked as USB 3.0 speed */
 285
 286         if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
 287                         HCC_MAX_PSA(xhci->hcc_params) >= 4)
 288                 xhci->shared_hcd->can_do_streams = 1;
 289
 290         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 291                 xhci_pme_acpi_rtd3_enable(dev);
 292
 293         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
 294         pm_runtime_put_noidle(&dev->dev);
 295
 296         return 0;
 297
 298 put_usb3_hcd:
 299         usb_put_hcd(xhci->shared_hcd);
 300 dealloc_usb2_hcd:
 301         usb_hcd_pci_remove(dev);
 302 put_runtime_pm:
 303         pm_runtime_put_noidle(&dev->dev);
 304         return retval;
 305 }
 306
 307 static void xhci_pci_remove(struct pci_dev *dev)
 308 {
 309         struct xhci_hcd *xhci;
 310
 311         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 312         xhci->xhc_state |= XHCI_STATE_REMOVING;
 313         if (xhci->shared_hcd) {
 314                 usb_remove_hcd(xhci->shared_hcd);
 315                 usb_put_hcd(xhci->shared_hcd);
 316         }
 317         usb_hcd_pci_remove(dev);
 318
 319         /* Workaround for spurious wakeups at shutdown with HSW */
 320         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
 321                 pci_set_power_state(dev, PCI_D3hot);
 322 }
 323
 324 #ifdef CONFIG_PM
 325 /*
 326  * In some Intel xHCI controllers, in order to get D3 working,
 327  * through a vendor specific SSIC CONFIG register at offset 0x883c,
 328  * SSIC PORT need to be marked as "unused" before putting xHCI
 329  * into D3. After D3 exit, the SSIC port need to be marked as "used".
 330  * Without this change, xHCI might not enter D3 state.
 331  */
 332 static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
 333 {
 334         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 335         u32 val;
 336         void __iomem *reg;
 337         int i;
 338
 339         for (i = 0; i < SSIC_PORT_NUM; i++) {
 340                 reg = (void __iomem *) xhci->cap_regs +
 341                                 SSIC_PORT_CFG2 +
 342                                 i * SSIC_PORT_CFG2_OFFSET;
 343
 344                 /* Notify SSIC that SSIC profile programming is not done. */
 345                 val = readl(reg) & ~PROG_DONE;
 346                 writel(val, reg);
 347
 348                 /* Mark SSIC port as unused(suspend) or used(resume) */
 349                 val = readl(reg);
 350                 if (suspend)
 351                         val |= SSIC_PORT_UNUSED;
 352                 else
 353                         val &= ~SSIC_PORT_UNUSED;
 354                 writel(val, reg);
 355
 356                 /* Notify SSIC that SSIC profile programming is done */
 357                 val = readl(reg) | PROG_DONE;
 358                 writel(val, reg);
 359                 readl(reg);
 360         }
 361 }
 362
 363 /*
 364  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
 365  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
 366  */
 367 static void xhci_pme_quirk(struct usb_hcd *hcd)
 368 {
 369         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 370         void __iomem *reg;
 371         u32 val;
 372
 373         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
 374         val = readl(reg);
 375         writel(val | BIT(28), reg);
 376         readl(reg);
 377 }
 378
 379 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 380 {
 381         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 382         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 383         int                     ret;
 384
 385         /*
 386          * Systems with the TI redriver that loses port status change events
 387          * need to have the registers polled during D3, so avoid D3cold.
 388          */
 389         if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
 390                 pdev->no_d3cold = true;
 391
 392         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 393                 xhci_pme_quirk(hcd);
 394
 395         if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
 396                 xhci_ssic_port_unused_quirk(hcd, true);
 397
 398         ret = xhci_suspend(xhci, do_wakeup);
 399         if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
 400                 xhci_ssic_port_unused_quirk(hcd, false);
 401
 402         return ret;
 403 }
 404
 405 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 406 {
 407         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 408         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 409         int                     retval = 0;
 410
 411         /* The BIOS on systems with the Intel Panther Point chipset may or may
 412          * not support xHCI natively.  That means that during system resume, it
 413          * may switch the ports back to EHCI so that users can use their
 414          * keyboard to select a kernel from GRUB after resume from hibernate.
 415          *
 416          * The BIOS is supposed to remember whether the OS had xHCI ports
 417          * enabled before resume, and switch the ports back to xHCI when the
 418          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 419          * writers.
 420          *
 421          * Unconditionally switch the ports back to xHCI after a system resume.
 422          * It should not matter whether the EHCI or xHCI controller is
 423          * resumed first. It's enough to do the switchover in xHCI because
 424          * USB core won't notice anything as the hub driver doesn't start
 425          * running again until after all the devices (including both EHCI and
 426          * xHCI host controllers) have been resumed.
 427          */
 428
 429         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 430                 usb_enable_intel_xhci_ports(pdev);
 431
 432         if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
 433                 xhci_ssic_port_unused_quirk(hcd, false);
 434
 435         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 436                 xhci_pme_quirk(hcd);
 437
 438         retval = xhci_resume(xhci, hibernated);
 439         return retval;
 440 }
 441 #endif /* CONFIG_PM */
 442
 443 /*-------------------------------------------------------------------------*/
 444
 445 /* PCI driver selection metadata; PCI hotplugging uses this */
 446 static const struct pci_device_id pci_ids[] = { {
 447         /* handle any USB 3.0 xHCI controller */
 448         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 449         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 450         },
 451         { /* end: all zeroes */ }
 452 };
 453 MODULE_DEVICE_TABLE(pci, pci_ids);
 454
 455 /* pci driver glue; this is a "new style" PCI driver module */
 456 static struct pci_driver xhci_pci_driver = {
 457         .name =         (char *) hcd_name,
 458         .id_table =     pci_ids,
 459
 460         .probe =        xhci_pci_probe,
 461         .remove =       xhci_pci_remove,
 462         /* suspend and resume implemented later */
 463
 464         .shutdown =     usb_hcd_pci_shutdown,
 465 #ifdef CONFIG_PM
 466         .driver = {
 467                 .pm = &usb_hcd_pci_pm_ops
 468         },
 469 #endif
 470 };
 471
 472 static int __init xhci_pci_init(void)
 473 {
 474         xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
 475 #ifdef CONFIG_PM
 476         xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
 477         xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
 478 #endif
 479         return pci_register_driver(&xhci_pci_driver);
 480 }
 481 module_init(xhci_pci_init);
 482
 483 static void __exit xhci_pci_exit(void)
 484 {
 485         pci_unregister_driver(&xhci_pci_driver);
 486 }
 487 module_exit(xhci_pci_exit);
 488
 489 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
 490 MODULE_LICENSE("GPL");