arch/ia64/include/asm/sn/intr.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
   7  */
   8
   9 #ifndef _ASM_IA64_SN_INTR_H
  10 #define _ASM_IA64_SN_INTR_H
  11
  12 #include <linux/rcupdate.h>
  13 #include <asm/sn/types.h>
  14
  15 #define SGI_UART_VECTOR         0xe9
  16
  17 /* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */
  18 #define SGI_XPC_ACTIVATE        0x30
  19 #define SGI_II_ERROR            0x31
  20 #define SGI_XBOW_ERROR          0x32
  21 #define SGI_PCIASIC_ERROR       0x33
  22 #define SGI_ACPI_SCI_INT        0x34
  23 #define SGI_TIOCA_ERROR         0x35
  24 #define SGI_TIO_ERROR           0x36
  25 #define SGI_TIOCX_ERROR         0x37
  26 #define SGI_MMTIMER_VECTOR      0x38
  27 #define SGI_XPC_NOTIFY          0xe7
  28
  29 #define IA64_SN2_FIRST_DEVICE_VECTOR    0x3c
  30 #define IA64_SN2_LAST_DEVICE_VECTOR     0xe6
  31
  32 #define SN2_IRQ_RESERVED        0x1
  33 #define SN2_IRQ_CONNECTED       0x2
  34 #define SN2_IRQ_SHARED          0x4
  35
  36 // The SN PROM irq struct
  37 struct sn_irq_info {
  38         struct sn_irq_info *irq_next;   /* deprecated DO NOT USE     */
  39         short           irq_nasid;      /* Nasid IRQ is assigned to  */
  40         int             irq_slice;      /* slice IRQ is assigned to  */
  41         int             irq_cpuid;      /* kernel logical cpuid      */
  42         int             irq_irq;        /* the IRQ number */
  43         int             irq_int_bit;    /* Bridge interrupt pin */
  44                                         /* <0 means MSI */
  45         u64     irq_xtalkaddr;  /* xtalkaddr IRQ is sent to  */
  46         int             irq_bridge_type;/* pciio asic type (pciio.h) */
  47         void           *irq_bridge;     /* bridge generating irq     */
  48         void           *irq_pciioinfo;  /* associated pciio_info_t   */
  49         int             irq_last_intr;  /* For Shub lb lost intr WAR */
  50         int             irq_cookie;     /* unique cookie             */
  51         int             irq_flags;      /* flags */
  52         int             irq_share_cnt;  /* num devices sharing IRQ   */
  53         struct list_head        list;   /* list of sn_irq_info structs */
  54         struct rcu_head         rcu;    /* rcu callback list */
  55 };
  56
  57 extern void sn_send_IPI_phys(int, long, int, int);
  58 extern u64 sn_intr_alloc(nasid_t, int,
  59                               struct sn_irq_info *,
  60                               int, nasid_t, int);
  61 extern void sn_intr_free(nasid_t, int, struct sn_irq_info *);
  62 extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int);
  63 extern void sn_set_err_irq_affinity(unsigned int);
  64 extern struct list_head **sn_irq_lh;
  65
  66 #define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
  67
  68 #endif /* _ASM_IA64_SN_INTR_H */