2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
18 # Select the object file format to substitute into the linker script.
20 ifdef CONFIG_CPU_LITTLE_ENDIAN
21 32bit-tool-prefix
= mipsel-linux-
22 64bit-tool-prefix
= mips64el-linux-
23 32bit-bfd
= elf32-tradlittlemips
24 64bit-bfd
= elf64-tradlittlemips
25 32bit-emul
= elf32ltsmip
26 64bit-emul
= elf64ltsmip
28 32bit-tool-prefix
= mips-linux-
29 64bit-tool-prefix
= mips64-linux-
30 32bit-bfd
= elf32-tradbigmips
31 64bit-bfd
= elf64-tradbigmips
32 32bit-emul
= elf32btsmip
33 64bit-emul
= elf64btsmip
37 tool-prefix
= $(32bit-tool-prefix
)
41 tool-prefix
= $(64bit-tool-prefix
)
45 ifdef CONFIG_CROSSCOMPILE
46 CROSS_COMPILE
:= $(tool-prefix
)
50 ld-emul
= $(32bit-emul
)
52 vmlinux-64
= vmlinux
.64
58 ld-emul
= $(64bit-emul
)
59 vmlinux-32
= vmlinux
.32
63 ifdef CONFIG_BUILD_ELF64
64 cflags-y
+= $(call cc-option
,-mno-explicit-relocs
)
66 cflags-y
+= $(call cc-option
,-msym32
)
72 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73 # code since it only slows down the whole thing. At some point we might make
74 # use of global pointer optimizations but their use of $28 conflicts with
75 # the current pointer optimization.
77 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
78 # machines may also. Since BFD is incredibly buggy with respect to
79 # crossformat linking we rely on the elf2ecoff tool for format conversion.
81 cflags-y
+= -G
0 -mno-abicalls
-fno-pic
-pipe
82 cflags-y
+= -msoft-float
83 LDFLAGS_vmlinux
+= -G
0 -static
-n
-nostdlib
84 MODFLAGS
+= -mlong-calls
87 # We explicitly add the endianness specifier if needed, this allows
88 # to compile kernels with a toolchain for the other endianness. We
89 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
90 # when fed the toolchain default!
92 cflags-
$(CONFIG_CPU_BIG_ENDIAN
) += $(shell $(CC
) -dumpmachine |grep
-q
'mips.*el-.*' && echo
-EB
-D__MIPSEB__
)
93 cflags-
$(CONFIG_CPU_LITTLE_ENDIAN
) += $(shell $(CC
) -dumpmachine |grep
-q
'mips.*el-.*' || echo
-EL
-D__MIPSEL__
)
95 cflags-
$(CONFIG_SB1XXX_CORELIS
) += $(call cc-option
,-mno-sched-prolog
) \
96 -fno-omit-frame-pointer
99 # CPU-dependent compiler/assembler options for optimization.
101 cflags-
$(CONFIG_CPU_R3000
) += -march
=r3000
102 cflags-
$(CONFIG_CPU_TX39XX
) += -march
=r3900
103 cflags-
$(CONFIG_CPU_R6000
) += -march
=r6000
-Wa
,--trap
104 cflags-
$(CONFIG_CPU_R4300
) += -march
=r4300
-Wa
,--trap
105 cflags-
$(CONFIG_CPU_VR41XX
) += -march
=r4100
-Wa
,--trap
106 cflags-
$(CONFIG_CPU_R4X00
) += -march
=r4600
-Wa
,--trap
107 cflags-
$(CONFIG_CPU_TX49XX
) += -march
=r4600
-Wa
,--trap
108 cflags-
$(CONFIG_CPU_MIPS32_R1
) += $(call cc-option
,-march
=mips32
,-mips32
-U_MIPS_ISA
-D_MIPS_ISA
=_MIPS_ISA_MIPS32
) \
109 -Wa
,-mips32
-Wa
,--trap
110 cflags-
$(CONFIG_CPU_MIPS32_R2
) += $(call cc-option
,-march
=mips32r2
,-mips32r2
-U_MIPS_ISA
-D_MIPS_ISA
=_MIPS_ISA_MIPS32
) \
111 -Wa
,-mips32r2
-Wa
,--trap
112 cflags-
$(CONFIG_CPU_MIPS64_R1
) += $(call cc-option
,-march
=mips64
,-mips64
-U_MIPS_ISA
-D_MIPS_ISA
=_MIPS_ISA_MIPS64
) \
113 -Wa
,-mips64
-Wa
,--trap
114 cflags-
$(CONFIG_CPU_MIPS64_R2
) += $(call cc-option
,-march
=mips64r2
,-mips64r2
-U_MIPS_ISA
-D_MIPS_ISA
=_MIPS_ISA_MIPS64
) \
115 -Wa
,-mips64r2
-Wa
,--trap
116 cflags-
$(CONFIG_CPU_R5000
) += -march
=r5000
-Wa
,--trap
117 cflags-
$(CONFIG_CPU_R5432
) += $(call cc-option
,-march
=r5400
,-march
=r5000
) \
119 cflags-
$(CONFIG_CPU_NEVADA
) += $(call cc-option
,-march
=rm5200
,-march
=r5000
) \
121 cflags-
$(CONFIG_CPU_RM7000
) += $(call cc-option
,-march
=rm7000
,-march
=r5000
) \
123 cflags-
$(CONFIG_CPU_RM9000
) += $(call cc-option
,-march
=rm9000
,-march
=r5000
) \
125 cflags-
$(CONFIG_CPU_SB1
) += $(call cc-option
,-march
=sb1
,-march
=r5000
) \
127 cflags-
$(CONFIG_CPU_R8000
) += -march
=r8000
-Wa
,--trap
128 cflags-
$(CONFIG_CPU_R10000
) += $(call cc-option
,-march
=r10000
,-march
=r8000
) \
132 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
133 MODFLAGS
+= -msb1-pass1-workarounds
140 libs-
$(CONFIG_ARC
) += arch
/mips
/arc
/
141 libs-
$(CONFIG_SIBYTE_CFE
) += arch
/mips
/sibyte
/cfe
/
144 # Board-dependent options and extra files
148 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
150 core-
$(CONFIG_MACH_JAZZ
) += arch
/mips
/jazz
/
151 cflags-
$(CONFIG_MACH_JAZZ
) += -Iinclude
/asm-mips
/mach-jazz
152 load-
$(CONFIG_MACH_JAZZ
) += 0xffffffff80080000
155 # Common Alchemy Au1x00 stuff
157 core-
$(CONFIG_SOC_AU1X00
) += arch
/mips
/au1000
/common
/
158 cflags-
$(CONFIG_SOC_AU1X00
) += -Iinclude
/asm-mips
/mach-au1x00
161 # AMD Alchemy Pb1000 eval board
163 libs-
$(CONFIG_MIPS_PB1000
) += arch
/mips
/au1000
/pb1000
/
164 cflags-
$(CONFIG_MIPS_PB1000
) += -Iinclude
/asm-mips
/mach-pb1x00
165 load-
$(CONFIG_MIPS_PB1000
) += 0xffffffff80100000
168 # AMD Alchemy Pb1100 eval board
170 libs-
$(CONFIG_MIPS_PB1100
) += arch
/mips
/au1000
/pb1100
/
171 cflags-
$(CONFIG_MIPS_PB1100
) += -Iinclude
/asm-mips
/mach-pb1x00
172 load-
$(CONFIG_MIPS_PB1100
) += 0xffffffff80100000
175 # AMD Alchemy Pb1500 eval board
177 libs-
$(CONFIG_MIPS_PB1500
) += arch
/mips
/au1000
/pb1500
/
178 cflags-
$(CONFIG_MIPS_PB1500
) += -Iinclude
/asm-mips
/mach-pb1x00
179 load-
$(CONFIG_MIPS_PB1500
) += 0xffffffff80100000
182 # AMD Alchemy Pb1550 eval board
184 libs-
$(CONFIG_MIPS_PB1550
) += arch
/mips
/au1000
/pb1550
/
185 cflags-
$(CONFIG_MIPS_PB1550
) += -Iinclude
/asm-mips
/mach-pb1x00
186 load-
$(CONFIG_MIPS_PB1550
) += 0xffffffff80100000
189 # AMD Alchemy Pb1200 eval board
191 libs-
$(CONFIG_MIPS_PB1200
) += arch
/mips
/au1000
/pb1200
/
192 cflags-
$(CONFIG_MIPS_PB1200
) += -Iinclude
/asm-mips
/mach-pb1x00
193 load-
$(CONFIG_MIPS_PB1200
) += 0xffffffff80100000
196 # AMD Alchemy Db1000 eval board
198 libs-
$(CONFIG_MIPS_DB1000
) += arch
/mips
/au1000
/db1x00
/
199 cflags-
$(CONFIG_MIPS_DB1000
) += -Iinclude
/asm-mips
/mach-db1x00
200 load-
$(CONFIG_MIPS_DB1000
) += 0xffffffff80100000
203 # AMD Alchemy Db1100 eval board
205 libs-
$(CONFIG_MIPS_DB1100
) += arch
/mips
/au1000
/db1x00
/
206 cflags-
$(CONFIG_MIPS_DB1100
) += -Iinclude
/asm-mips
/mach-db1x00
207 load-
$(CONFIG_MIPS_DB1100
) += 0xffffffff80100000
210 # AMD Alchemy Db1500 eval board
212 libs-
$(CONFIG_MIPS_DB1500
) += arch
/mips
/au1000
/db1x00
/
213 cflags-
$(CONFIG_MIPS_DB1500
) += -Iinclude
/asm-mips
/mach-db1x00
214 load-
$(CONFIG_MIPS_DB1500
) += 0xffffffff80100000
217 # AMD Alchemy Db1550 eval board
219 libs-
$(CONFIG_MIPS_DB1550
) += arch
/mips
/au1000
/db1x00
/
220 cflags-
$(CONFIG_MIPS_DB1550
) += -Iinclude
/asm-mips
/mach-db1x00
221 load-
$(CONFIG_MIPS_DB1550
) += 0xffffffff80100000
224 # AMD Alchemy Db1200 eval board
226 libs-
$(CONFIG_MIPS_DB1200
) += arch
/mips
/au1000
/pb1200
/
227 cflags-
$(CONFIG_MIPS_DB1200
) += -Iinclude
/asm-mips
/mach-db1x00
228 load-
$(CONFIG_MIPS_DB1200
) += 0xffffffff80100000
231 # AMD Alchemy Bosporus eval board
233 libs-
$(CONFIG_MIPS_BOSPORUS
) += arch
/mips
/au1000
/db1x00
/
234 cflags-
$(CONFIG_MIPS_BOSPORUS
) += -Iinclude
/asm-mips
/mach-db1x00
235 load-
$(CONFIG_MIPS_BOSPORUS
) += 0xffffffff80100000
238 # AMD Alchemy Mirage eval board
240 libs-
$(CONFIG_MIPS_MIRAGE
) += arch
/mips
/au1000
/db1x00
/
241 cflags-
$(CONFIG_MIPS_MIRAGE
) += -Iinclude
/asm-mips
/mach-db1x00
242 load-
$(CONFIG_MIPS_MIRAGE
) += 0xffffffff80100000
245 # 4G-Systems eval board
247 libs-
$(CONFIG_MIPS_MTX1
) += arch
/mips
/au1000
/mtx-1
/
248 load-
$(CONFIG_MIPS_MTX1
) += 0xffffffff80100000
253 libs-
$(CONFIG_MIPS_XXS1500
) += arch
/mips
/au1000
/xxs1500
/
254 load-
$(CONFIG_MIPS_XXS1500
) += 0xffffffff80100000
259 core-
$(CONFIG_MIPS_COBALT
) += arch
/mips
/cobalt
/
260 cflags-
$(CONFIG_MIPS_COBALT
) += -Iinclude
/asm-mips
/mach-cobalt
261 load-
$(CONFIG_MIPS_COBALT
) += 0xffffffff80080000
266 core-
$(CONFIG_MACH_DECSTATION
) += arch
/mips
/dec
/
267 cflags-
$(CONFIG_MACH_DECSTATION
)+= -Iinclude
/asm-mips
/mach-dec
268 libs-
$(CONFIG_MACH_DECSTATION
) += arch
/mips
/dec
/prom
/
269 load-
$(CONFIG_MACH_DECSTATION
) += 0xffffffff80040000
270 CLEAN_FILES
+= drivers
/tc
/lk201-map.c
273 # Galileo EV64120 Board
275 core-
$(CONFIG_MIPS_EV64120
) += arch
/mips
/gt64120
/ev64120
/
276 core-
$(CONFIG_MIPS_EV64120
) += arch
/mips
/gt64120
/common
/
277 cflags-
$(CONFIG_MIPS_EV64120
) += -Iinclude
/asm-mips
/mach-ev64120
278 load-
$(CONFIG_MIPS_EV64120
) += 0xffffffff80100000
281 # Galileo EV96100 Board
283 core-
$(CONFIG_MIPS_EV96100
) += arch
/mips
/galileo-boards
/ev96100
/
284 cflags-
$(CONFIG_MIPS_EV96100
) += -Iinclude
/asm-mips
/mach-ev96100
285 load-
$(CONFIG_MIPS_EV96100
) += 0xffffffff80100000
288 # Globespan IVR eval board with QED 5231 CPU
290 core-
$(CONFIG_ITE_BOARD_GEN
) += arch
/mips
/ite-boards
/generic
/
291 core-
$(CONFIG_MIPS_IVR
) += arch
/mips
/ite-boards
/ivr
/
292 load-
$(CONFIG_MIPS_IVR
) += 0xffffffff80100000
295 # ITE 8172 eval board with QED 5231 CPU
297 core-
$(CONFIG_MIPS_ITE8172
) += arch
/mips
/ite-boards
/qed-4n-s01b
/
298 load-
$(CONFIG_MIPS_ITE8172
) += 0xffffffff80100000
301 # For all MIPS, Inc. eval boards
303 core-
$(CONFIG_MIPS_BOARDS_GEN
) += arch
/mips
/mips-boards
/generic
/
308 core-
$(CONFIG_MIPS_ATLAS
) += arch
/mips
/mips-boards
/atlas
/
309 cflags-
$(CONFIG_MIPS_ATLAS
) += -Iinclude
/asm-mips
/mach-atlas
310 cflags-
$(CONFIG_MIPS_ATLAS
) += -Iinclude
/asm-mips
/mach-mips
311 load-
$(CONFIG_MIPS_ATLAS
) += 0xffffffff80100000
316 core-
$(CONFIG_MIPS_MALTA
) += arch
/mips
/mips-boards
/malta
/
317 cflags-
$(CONFIG_MIPS_MALTA
) += -Iinclude
/asm-mips
/mach-mips
318 load-
$(CONFIG_MIPS_MALTA
) += 0xffffffff80100000
323 core-
$(CONFIG_MIPS_SEAD
) += arch
/mips
/mips-boards
/sead
/
324 load-
$(CONFIG_MIPS_SEAD
) += 0xffffffff80100000
329 core-
$(CONFIG_MIPS_SIM
) += arch
/mips
/mips-boards
/sim
/
330 cflags-
$(CONFIG_MIPS_SIM
) += -Iinclude
/asm-mips
/mach-sim
331 load-
$(CONFIG_MIPS_SIM
) += 0x80100000
334 # Momentum Ocelot board
336 # The Ocelot setup.o must be linked early - it does the ioremap() for the
339 core-
$(CONFIG_MOMENCO_OCELOT
) += arch
/mips
/gt64120
/common
/ \
340 arch
/mips
/gt64120
/momenco_ocelot
/
341 cflags-
$(CONFIG_MOMENCO_OCELOT
) += -Iinclude
/asm-mips
/mach-ocelot
342 load-
$(CONFIG_MOMENCO_OCELOT
) += 0xffffffff80100000
345 # Momentum Ocelot-G board
347 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
350 core-
$(CONFIG_MOMENCO_OCELOT_G
) += arch
/mips
/momentum
/ocelot_g
/
351 load-
$(CONFIG_MOMENCO_OCELOT_G
) += 0xffffffff80100000
354 # Momentum Ocelot-C and -CS boards
356 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
358 core-
$(CONFIG_MOMENCO_OCELOT_C
) += arch
/mips
/momentum
/ocelot_c
/
359 load-
$(CONFIG_MOMENCO_OCELOT_C
) += 0xffffffff80100000
362 # PMC-Sierra Yosemite
364 core-
$(CONFIG_PMC_YOSEMITE
) += arch
/mips
/pmc-sierra
/yosemite
/
365 cflags-
$(CONFIG_PMC_YOSEMITE
) += -Iinclude
/asm-mips
/mach-yosemite
366 load-
$(CONFIG_PMC_YOSEMITE
) += 0xffffffff80100000
368 # Qemu simulating MIPS32 4Kc
370 core-
$(CONFIG_QEMU
) += arch
/mips
/qemu
/
371 cflags-
$(CONFIG_QEMU
) += -Iinclude
/asm-mips
/mach-qemu
372 load-
$(CONFIG_QEMU
) += 0xffffffff80010000
377 core-
$(CONFIG_MOMENCO_OCELOT_3
) += arch
/mips
/momentum
/ocelot_3
/
378 cflags-
$(CONFIG_MOMENCO_OCELOT_3
) += -Iinclude
/asm-mips
/mach-ocelot3
379 load-
$(CONFIG_MOMENCO_OCELOT_3
) += 0xffffffff80100000
382 # Momentum Jaguar ATX
384 core-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += arch
/mips
/momentum
/jaguar_atx
/
385 cflags-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += -Iinclude
/asm-mips
/mach-ja
386 #ifdef CONFIG_JAGUAR_DMALOW
387 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
389 load-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += 0xffffffff80100000
395 core-
$(CONFIG_DDB5XXX_COMMON
) += arch
/mips
/ddb5xxx
/common
/
400 core-
$(CONFIG_DDB5074
) += arch
/mips
/ddb5xxx
/ddb5074
/
401 load-
$(CONFIG_DDB5074
) += 0xffffffff80080000
406 core-
$(CONFIG_DDB5476
) += arch
/mips
/ddb5xxx
/ddb5476
/
407 load-
$(CONFIG_DDB5476
) += 0xffffffff80080000
412 core-
$(CONFIG_DDB5477
) += arch
/mips
/ddb5xxx
/ddb5477
/
413 load-
$(CONFIG_DDB5477
) += 0xffffffff80100000
415 core-
$(CONFIG_LASAT
) += arch
/mips
/lasat
/
416 cflags-
$(CONFIG_LASAT
) += -Iinclude
/asm-mips
/mach-lasat
417 load-
$(CONFIG_LASAT
) += 0xffffffff80000000
422 core-
$(CONFIG_MACH_VR41XX
) += arch
/mips
/vr41xx
/common
/
423 cflags-
$(CONFIG_MACH_VR41XX
) += -Iinclude
/asm-mips
/mach-vr41xx
428 core-
$(CONFIG_NEC_CMBVR4133
) += arch
/mips
/vr41xx
/nec-cmbvr4133
/
429 load-
$(CONFIG_NEC_CMBVR4133
) += 0xffffffff80100000
432 # ZAO Networks Capcella (VR4131)
434 load-
$(CONFIG_ZAO_CAPCELLA
) += 0xffffffff80000000
437 # Victor MP-C303/304 (VR4122)
439 load-
$(CONFIG_VICTOR_MPC30X
) += 0xffffffff80001000
442 # IBM WorkPad z50 (VR4121)
444 core-
$(CONFIG_IBM_WORKPAD
) += arch
/mips
/vr41xx
/ibm-workpad
/
445 load-
$(CONFIG_IBM_WORKPAD
) += 0xffffffff80004000
448 # CASIO CASSIPEIA E-55/65 (VR4111)
450 core-
$(CONFIG_CASIO_E55
) += arch
/mips
/vr41xx
/casio-e55
/
451 load-
$(CONFIG_CASIO_E55
) += 0xffffffff80004000
454 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
456 load-
$(CONFIG_TANBAC_TB022X
) += 0xffffffff80000000
459 # Common Philips PNX8550
461 core-
$(CONFIG_SOC_PNX8550
) += arch
/mips
/philips
/pnx8550
/common
/
462 cflags-
$(CONFIG_SOC_PNX8550
) += -Iinclude
/asm-mips
/mach-pnx8550
465 # Philips PNX8550 JBS board
467 libs-
$(CONFIG_PNX8550_JBS
) += arch
/mips
/philips
/pnx8550
/jbs
/
468 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
469 load-
$(CONFIG_PNX8550_JBS
) += 0xffffffff80060000
472 # SGI IP22 (Indy/Indigo2)
474 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
475 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
476 # be aligned to a multiple of the kernel stack size or the handling of the
477 # current variable will break so for 64-bit kernels we have to raise the start
480 core-
$(CONFIG_SGI_IP22
) += arch
/mips
/sgi-ip22
/
481 cflags-
$(CONFIG_SGI_IP22
) += -Iinclude
/asm-mips
/mach-ip22
483 load-
$(CONFIG_SGI_IP22
) += 0xffffffff88002000
486 load-
$(CONFIG_SGI_IP22
) += 0xffffffff88004000
490 # SGI-IP27 (Origin200/2000)
492 # Set the load address to >= 0xc000000000300000 if you want to leave space for
493 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
494 # be 16kb aligned or the handling of the current variable will break.
496 ifdef CONFIG_SGI_IP27
497 core-
$(CONFIG_SGI_IP27
) += arch
/mips
/sgi-ip27
/
498 cflags-
$(CONFIG_SGI_IP27
) += -Iinclude
/asm-mips
/mach-ip27
499 ifdef CONFIG_MAPPED_KERNEL
500 load-
$(CONFIG_SGI_IP27
) += 0xc00000004001c000
501 OBJCOPYFLAGS
:= --change-addresses
=0x3fffffff80000000
502 dataoffset-
$(CONFIG_SGI_IP27
) += 0x01000000
504 load-
$(CONFIG_SGI_IP27
) += 0xa80000000001c000
505 OBJCOPYFLAGS
:= --change-addresses
=0x57ffffff80000000
512 # Set the load address to >= 80069000 if you want to leave space for symmon,
513 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
514 # a multiple of the kernel stack size or the handling of the current variable
517 core-
$(CONFIG_SGI_IP32
) += arch
/mips
/sgi-ip32
/
518 cflags-
$(CONFIG_SGI_IP32
) += -Iinclude
/asm-mips
/mach-ip32
519 load-
$(CONFIG_SGI_IP32
) += 0xffffffff80004000
524 # This is a LIB so that it links at the end, and initcalls are later
525 # the sequence; but it is built as an object so that modules don't get
526 # removed (as happens, even if they have __initcall/module_init)
528 core-
$(CONFIG_SIBYTE_BCM112X
) += arch
/mips
/sibyte
/sb1250
/
529 cflags-
$(CONFIG_SIBYTE_BCM112X
) += -Iinclude
/asm-mips
/mach-sibyte \
530 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1250_112x_ALL
532 core-
$(CONFIG_SIBYTE_SB1250
) += arch
/mips
/sibyte
/sb1250
/
533 cflags-
$(CONFIG_SIBYTE_SB1250
) += -Iinclude
/asm-mips
/mach-sibyte \
534 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1250_112x_ALL
536 core-
$(CONFIG_SIBYTE_BCM1x55
) += arch
/mips
/sibyte
/bcm1480
/
537 cflags-
$(CONFIG_SIBYTE_BCM1x55
) += -Iinclude
/asm-mips
/mach-sibyte \
538 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1480_ALL
540 core-
$(CONFIG_SIBYTE_BCM1x80
) += arch
/mips
/sibyte
/bcm1480
/
541 cflags-
$(CONFIG_SIBYTE_BCM1x80
) += -Iinclude
/asm-mips
/mach-sibyte \
542 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1480_ALL
545 # Sibyte BCM91120x (Carmel) board
546 # Sibyte BCM91120C (CRhine) board
547 # Sibyte BCM91125C (CRhone) board
548 # Sibyte BCM91125E (Rhone) board
550 # Sibyte BCM91x80 (BigSur) board
552 libs-
$(CONFIG_SIBYTE_CARMEL
) += arch
/mips
/sibyte
/swarm
/
553 load-
$(CONFIG_SIBYTE_CARMEL
) := 0xffffffff80100000
554 libs-
$(CONFIG_SIBYTE_CRHINE
) += arch
/mips
/sibyte
/swarm
/
555 load-
$(CONFIG_SIBYTE_CRHINE
) := 0xffffffff80100000
556 libs-
$(CONFIG_SIBYTE_CRHONE
) += arch
/mips
/sibyte
/swarm
/
557 load-
$(CONFIG_SIBYTE_CRHONE
) := 0xffffffff80100000
558 libs-
$(CONFIG_SIBYTE_RHONE
) += arch
/mips
/sibyte
/swarm
/
559 load-
$(CONFIG_SIBYTE_RHONE
) := 0xffffffff80100000
560 libs-
$(CONFIG_SIBYTE_SENTOSA
) += arch
/mips
/sibyte
/swarm
/
561 load-
$(CONFIG_SIBYTE_SENTOSA
) := 0xffffffff80100000
562 libs-
$(CONFIG_SIBYTE_SWARM
) += arch
/mips
/sibyte
/swarm
/
563 load-
$(CONFIG_SIBYTE_SWARM
) := 0xffffffff80100000
564 libs-
$(CONFIG_SIBYTE_BIGSUR
) += arch
/mips
/sibyte
/swarm
/
565 load-
$(CONFIG_SIBYTE_BIGSUR
) := 0xffffffff80100000
570 core-
$(CONFIG_SNI_RM200_PCI
) += arch
/mips
/sni
/
571 cflags-
$(CONFIG_SNI_RM200_PCI
) += -Iinclude
/asm-mips
/mach-rm200
572 load-
$(CONFIG_SNI_RM200_PCI
) += 0xffffffff80600000
575 # Toshiba JMR-TX3927 board
577 core-
$(CONFIG_TOSHIBA_JMR3927
) += arch
/mips
/jmr3927
/rbhma3100
/ \
578 arch
/mips
/jmr3927
/common
/
579 cflags-
$(CONFIG_TOSHIBA_JMR3927
) += -Iinclude
/asm-mips
/mach-jmr3927
580 load-
$(CONFIG_TOSHIBA_JMR3927
) += 0xffffffff80050000
583 # Toshiba RBTX4927 board or
584 # Toshiba RBTX4937 board
586 core-
$(CONFIG_TOSHIBA_RBTX4927
) += arch
/mips
/tx4927
/toshiba_rbtx4927
/
587 core-
$(CONFIG_TOSHIBA_RBTX4927
) += arch
/mips
/tx4927
/common
/
588 load-
$(CONFIG_TOSHIBA_RBTX4927
) += 0xffffffff80020000
591 # Toshiba RBTX4938 board
593 core-
$(CONFIG_TOSHIBA_RBTX4938
) += arch
/mips
/tx4938
/toshiba_rbtx4938
/
594 core-
$(CONFIG_TOSHIBA_RBTX4938
) += arch
/mips
/tx4938
/common
/
595 load-
$(CONFIG_TOSHIBA_RBTX4938
) += 0xffffffff80100000
597 cflags-y
+= -Iinclude
/asm-mips
/mach-generic
598 drivers-
$(CONFIG_PCI
) += arch
/mips
/pci
/
601 ifdef CONFIG_CPU_LITTLE_ENDIAN
604 JIFFIES
= jiffies_64
+ 4
610 AFLAGS
+= $(cflags-y
)
611 CFLAGS
+= $(cflags-y
)
613 LDFLAGS
+= -m
$(ld-emul
)
616 CHECKFLAGS
+= $(shell $(CC
) $(CFLAGS
) -dM
-E
-xc
/dev
/null | \
617 egrep
-vw
'__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
618 sed
-e
's/^\#define /-D/' -e
"s/ /='/" -e
"s/$$/'/")
624 OBJCOPYFLAGS
+= --remove-section
=.reginfo
627 # Choosing incompatible machines durings configuration will result in
628 # error messages during linking. Select a default linkscript if
629 # none has been choosen above.
632 CPPFLAGS_vmlinux.lds
:= \
634 -D
"LOADADDR=$(load-y)" \
635 -D
"JIFFIES=$(JIFFIES)" \
636 -D
"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
638 head-y
:= arch
/mips
/kernel
/head.o arch
/mips
/kernel
/init_task.o
640 libs-y
+= arch
/mips
/lib
/
641 libs-
$(CONFIG_32BIT
) += arch
/mips
/lib-32
/
642 libs-
$(CONFIG_64BIT
) += arch
/mips
/lib-64
/
644 core-y
+= arch
/mips
/kernel
/ arch
/mips
/mm
/ arch
/mips
/math-emu
/
646 drivers-
$(CONFIG_OPROFILE
) += arch
/mips
/oprofile
/
649 rom.bin rom.sw
: vmlinux
650 $(Q
)$(MAKE
) $(build
)=arch
/mips
/lasat
/image
$@
654 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
655 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
656 # convert to ECOFF using elf2ecoff.
659 $(OBJCOPY
) -O
$(32bit-bfd
) $(OBJCOPYFLAGS
) $< $@
662 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
663 # ELF files from 32-bit files by conversion.
666 $(OBJCOPY
) -O
$(64bit-bfd
) $(OBJCOPYFLAGS
) $< $@
668 makeboot
=$(Q
)$(MAKE
) $(build
)=arch
/mips
/boot VMLINUX
=$(vmlinux-32
) $(1)
670 ifdef CONFIG_BOOT_ELF32
674 ifdef CONFIG_BOOT_ELF64
678 ifdef CONFIG_MIPS_ATLAS
682 ifdef CONFIG_MIPS_MALTA
686 ifdef CONFIG_MIPS_SEAD
694 ifdef CONFIG_SNI_RM200_PCI
698 vmlinux.bin
: $(vmlinux-32
)
699 +@
$(call makeboot
,$@
)
701 vmlinux.ecoff vmlinux.rm200
: $(vmlinux-32
)
702 +@
$(call makeboot
,$@
)
704 vmlinux.srec
: $(vmlinux-32
)
705 +@
$(call makeboot
,$@
)
707 CLEAN_FILES
+= vmlinux.ecoff \
713 @
$(MAKE
) $(clean)=arch
/mips
/boot
714 @
$(MAKE
) $(clean)=arch
/mips
/lasat
716 CLEAN_FILES
+= vmlinux
.32 \