Linux 2.6.17.7
[linux/fpc-iii.git] / arch / mips / galileo-boards / ev96100 / time.c
blobbff5b1c174e4cff4a676b4df3fbde69472416527
1 /*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo EV96100 rtc routines.
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
9 * This file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/atlas/atlas_rtc.c.
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
35 #include <linux/config.h>
36 #include <linux/init.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/module.h>
39 #include <linux/sched.h>
40 #include <linux/spinlock.h>
41 #include <linux/timex.h>
43 #include <asm/mipsregs.h>
44 #include <asm/ptrace.h>
45 #include <asm/time.h>
48 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
50 extern volatile unsigned long wall_jiffies;
51 unsigned long missed_heart_beats = 0;
53 static unsigned long r4k_offset; /* Amount to increment compare reg each time */
54 static unsigned long r4k_cur; /* What counter should be at next timer irq */
56 static inline void ack_r4ktimer(unsigned long newval)
58 write_c0_compare(newval);
62 * There are a lot of conceptually broken versions of the MIPS timer interrupt
63 * handler floating around. This one is rather different, but the algorithm
64 * is probably more robust.
66 void mips_timer_interrupt(struct pt_regs *regs)
68 int irq = 7; /* FIX ME */
70 if (r4k_offset == 0) {
71 goto null;
74 do {
75 kstat_this_cpu.irqs[irq]++;
76 do_timer(regs);
77 #ifndef CONFIG_SMP
78 update_process_times(user_mode(regs));
79 #endif
80 r4k_cur += r4k_offset;
81 ack_r4ktimer(r4k_cur);
83 } while (((unsigned long)read_c0_count()
84 - r4k_cur) < 0x7fffffff);
85 return;
87 null:
88 ack_r4ktimer(0);