arch/mips/mips-boards/atlas/atlas_int.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  * ########################################################################
   6  *
   7  *  This program is free software; you can distribute it and/or modify it
   8  *  under the terms of the GNU General Public License (Version 2) as
   9  *  published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope it will be useful, but WITHOUT
  12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  *  for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License along
  17  *  with this program; if not, write to the Free Software Foundation, Inc.,
  18  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19  *
  20  * ########################################################################
  21  *
  22  * Routines for generic manipulation of the interrupts found on the MIPS
  23  * Atlas board.
  24  *
  25  */
  26 #include <linux/compiler.h>
  27 #include <linux/init.h>
  28 #include <linux/sched.h>
  29 #include <linux/slab.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kernel_stat.h>
  32
  33 #include <asm/irq.h>
  34 #include <asm/io.h>
  35 #include <asm/mips-boards/atlas.h>
  36 #include <asm/mips-boards/atlasint.h>
  37 #include <asm/gdb-stub.h>
  38
  39
  40 static struct atlas_ictrl_regs *atlas_hw0_icregs;
  41
  42 #if 0
  43 #define DEBUG_INT(x...) printk(x)
  44 #else
  45 #define DEBUG_INT(x...)
  46 #endif
  47
  48 void disable_atlas_irq(unsigned int irq_nr)
  49 {
  50         atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE));
  51         iob();
  52 }
  53
  54 void enable_atlas_irq(unsigned int irq_nr)
  55 {
  56         atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE));
  57         iob();
  58 }
  59
  60 static unsigned int startup_atlas_irq(unsigned int irq)
  61 {
  62         enable_atlas_irq(irq);
  63         return 0; /* never anything pending */
  64 }
  65
  66 #define shutdown_atlas_irq      disable_atlas_irq
  67
  68 #define mask_and_ack_atlas_irq disable_atlas_irq
  69
  70 static void end_atlas_irq(unsigned int irq)
  71 {
  72         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  73                 enable_atlas_irq(irq);
  74 }
  75
  76 static struct hw_interrupt_type atlas_irq_type = {
  77         .typename = "Atlas",
  78         .startup = startup_atlas_irq,
  79         .shutdown = shutdown_atlas_irq,
  80         .enable = enable_atlas_irq,
  81         .disable = disable_atlas_irq,
  82         .ack = mask_and_ack_atlas_irq,
  83         .end = end_atlas_irq,
  84 };
  85
  86 static inline int ls1bit32(unsigned int x)
  87 {
  88         int b = 31, s;
  89
  90         s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
  91         s =  8; if (x <<  8 == 0) s = 0; b -= s; x <<= s;
  92         s =  4; if (x <<  4 == 0) s = 0; b -= s; x <<= s;
  93         s =  2; if (x <<  2 == 0) s = 0; b -= s; x <<= s;
  94         s =  1; if (x <<  1 == 0) s = 0; b -= s;
  95
  96         return b;
  97 }
  98
  99 static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
 100 {
 101         unsigned long int_status;
 102         int irq;
 103
 104         int_status = atlas_hw0_icregs->intstatus;
 105
 106         /* if int_status == 0, then the interrupt has already been cleared */
 107         if (unlikely(int_status == 0))
 108                 return;
 109
 110         irq = ATLASINT_BASE + ls1bit32(int_status);
 111
 112         DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
 113
 114         do_IRQ(irq, regs);
 115 }
 116
 117 static inline int clz(unsigned long x)
 118 {
 119         __asm__ (
 120         "       .set    push                                    \n"
 121         "       .set    mips32                                  \n"
 122         "       clz     %0, %1                                  \n"
 123         "       .set    pop                                     \n"
 124         : "=r" (x)
 125         : "r" (x));
 126
 127         return x;
 128 }
 129
 130 /*
 131  * Version of ffs that only looks at bits 12..15.
 132  */
 133 static inline unsigned int irq_ffs(unsigned int pending)
 134 {
 135 #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
 136         return -clz(pending) + 31 - CAUSEB_IP;
 137 #else
 138         unsigned int a0 = 7;
 139         unsigned int t0;
 140
 141         t0 = s0 & 0xf000;
 142         t0 = t0 < 1;
 143         t0 = t0 << 2;
 144         a0 = a0 - t0;
 145         s0 = s0 << t0;
 146
 147         t0 = s0 & 0xc000;
 148         t0 = t0 < 1;
 149         t0 = t0 << 1;
 150         a0 = a0 - t0;
 151         s0 = s0 << t0;
 152
 153         t0 = s0 & 0x8000;
 154         t0 = t0 < 1;
 155         //t0 = t0 << 2;
 156         a0 = a0 - t0;
 157         //s0 = s0 << t0;
 158
 159         return a0;
 160 #endif
 161 }
 162
 163 /*
 164  * IRQs on the Atlas board look basically (barring software IRQs which we
 165  * don't use at all and all external interrupt sources are combined together
 166  * on hardware interrupt 0 (MIPS IRQ 2)) like:
 167  *
 168  *      MIPS IRQ        Source
 169  *      --------        ------
 170  *             0        Software (ignored)
 171  *             1        Software (ignored)
 172  *             2        Combined hardware interrupt (hw0)
 173  *             3        Hardware (ignored)
 174  *             4        Hardware (ignored)
 175  *             5        Hardware (ignored)
 176  *             6        Hardware (ignored)
 177  *             7        R4k timer (what we use)
 178  *
 179  * We handle the IRQ according to _our_ priority which is:
 180  *
 181  * Highest ----     R4k Timer
 182  * Lowest  ----     Combined hardware interrupt
 183  *
 184  * then we just return, if multiple IRQs are pending then we will just take
 185  * another exception, big deal.
 186  */
 187 asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 188 {
 189         unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
 190         int irq;
 191
 192         irq = irq_ffs(pending);
 193
 194         if (irq == MIPSCPU_INT_ATLAS)
 195                 atlas_hw0_irqdispatch(regs);
 196         else if (irq > 0)
 197                 do_IRQ(MIPSCPU_INT_BASE + irq, regs);
 198         else
 199                 spurious_interrupt(regs);
 200 }
 201
 202 void __init arch_init_irq(void)
 203 {
 204         int i;
 205
 206         atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *));
 207
 208         /*
 209          * Mask out all interrupt by writing "1" to all bit position in
 210          * the interrupt reset reg.
 211          */
 212         atlas_hw0_icregs->intrsten = 0xffffffff;
 213
 214         for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) {
 215                 irq_desc[i].status      = IRQ_DISABLED;
 216                 irq_desc[i].action      = 0;
 217                 irq_desc[i].depth       = 1;
 218                 irq_desc[i].handler     = &atlas_irq_type;
 219                 spin_lock_init(&irq_desc[i].lock);
 220         }
 221 }