arch/mips/sgi-ip22/ip22-time.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Time operations for IP22 machines. Original code may come from
   7  * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
   8  *
   9  * Copyright (C) 2001 by Ladislav Michl
  10  * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
  11  */
  12 #include <linux/bcd.h>
  13 #include <linux/ds1286.h>
  14 #include <linux/init.h>
  15 #include <linux/kernel.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/kernel_stat.h>
  18 #include <linux/time.h>
  19
  20 #include <asm/cpu.h>
  21 #include <asm/mipsregs.h>
  22 #include <asm/io.h>
  23 #include <asm/irq.h>
  24 #include <asm/time.h>
  25 #include <asm/sgialib.h>
  26 #include <asm/sgi/ioc.h>
  27 #include <asm/sgi/hpc3.h>
  28 #include <asm/sgi/ip22.h>
  29
  30 /*
  31  * note that mktime uses month from 1 to 12 while to_tm
  32  * uses 0 to 11.
  33  */
  34 static unsigned long indy_rtc_get_time(void)
  35 {
  36         unsigned int yrs, mon, day, hrs, min, sec;
  37         unsigned int save_control;
  38         unsigned long flags;
  39
  40         spin_lock_irqsave(&rtc_lock, flags);
  41         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  42         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  43
  44         sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
  45         min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
  46         hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
  47         day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
  48         mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
  49         yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
  50
  51         hpc3c0->rtcregs[RTC_CMD] = save_control;
  52         spin_unlock_irqrestore(&rtc_lock, flags);
  53
  54         if (yrs < 45)
  55                 yrs += 30;
  56         if ((yrs += 40) < 70)
  57                 yrs += 100;
  58
  59         return mktime(yrs + 1900, mon, day, hrs, min, sec);
  60 }
  61
  62 static int indy_rtc_set_time(unsigned long tim)
  63 {
  64         struct rtc_time tm;
  65         unsigned int save_control;
  66         unsigned long flags;
  67
  68         to_tm(tim, &tm);
  69
  70         tm.tm_mon += 1;         /* tm_mon starts at zero */
  71         tm.tm_year -= 1940;
  72         if (tm.tm_year >= 100)
  73                 tm.tm_year -= 100;
  74
  75         spin_lock_irqsave(&rtc_lock, flags);
  76         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  77         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  78
  79         hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_sec);
  80         hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
  81         hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
  82         hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
  83         hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
  84         hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
  85         hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
  86
  87         hpc3c0->rtcregs[RTC_CMD] = save_control;
  88         spin_unlock_irqrestore(&rtc_lock, flags);
  89
  90         return 0;
  91 }
  92
  93 static unsigned long dosample(void)
  94 {
  95         u32 ct0, ct1;
  96         volatile u8 msb, lsb;
  97
  98         /* Start the counter. */
  99         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
 100                          SGINT_TCWORD_MRGEN);
 101         sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
 102         sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
 103
 104         /* Get initial counter invariant */
 105         ct0 = read_c0_count();
 106
 107         /* Latch and spin until top byte of counter2 is zero */
 108         do {
 109                 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
 110                 lsb = sgint->tcnt2;
 111                 msb = sgint->tcnt2;
 112                 ct1 = read_c0_count();
 113         } while (msb);
 114
 115         /* Stop the counter. */
 116         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
 117                          SGINT_TCWORD_MSWST);
 118         /*
 119          * Return the difference, this is how far the r4k counter increments
 120          * for every 1/HZ seconds. We round off the nearest 1 MHz of master
 121          * clock (= 1000000 / HZ / 2).
 122          */
 123         /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
 124         return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
 125 }
 126
 127 /*
 128  * Here we need to calibrate the cycle counter to at least be close.
 129  */
 130 static __init void indy_time_init(void)
 131 {
 132         unsigned long r4k_ticks[3];
 133         unsigned long r4k_tick;
 134
 135         /*
 136          * Figure out the r4k offset, the algorithm is very simple and works in
 137          * _all_ cases as long as the 8254 counter register itself works ok (as
 138          * an interrupt driving timer it does not because of bug, this is why
 139          * we are using the onchip r4k counter/compare register to serve this
 140          * purpose, but for r4k_offset calculation it will work ok for us).
 141          * There are other very complicated ways of performing this calculation
 142          * but this one works just fine so I am not going to futz around. ;-)
 143          */
 144         printk(KERN_INFO "Calibrating system timer... ");
 145         dosample();     /* Prime cache. */
 146         dosample();     /* Prime cache. */
 147         /* Zero is NOT an option. */
 148         do {
 149                 r4k_ticks[0] = dosample();
 150         } while (!r4k_ticks[0]);
 151         do {
 152                 r4k_ticks[1] = dosample();
 153         } while (!r4k_ticks[1]);
 154
 155         if (r4k_ticks[0] != r4k_ticks[1]) {
 156                 printk("warning: timer counts differ, retrying... ");
 157                 r4k_ticks[2] = dosample();
 158                 if (r4k_ticks[2] == r4k_ticks[0]
 159                     || r4k_ticks[2] == r4k_ticks[1])
 160                         r4k_tick = r4k_ticks[2];
 161                 else {
 162                         printk("disagreement, using average... ");
 163                         r4k_tick = (r4k_ticks[0] + r4k_ticks[1]
 164                                    + r4k_ticks[2]) / 3;
 165                 }
 166         } else
 167                 r4k_tick = r4k_ticks[0];
 168
 169         printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
 170                 (int) (r4k_tick / (500000 / HZ)),
 171                 (int) (r4k_tick % (500000 / HZ)));
 172
 173         mips_hpt_frequency = r4k_tick * HZ;
 174 }
 175
 176 /* Generic SGI handler for (spurious) 8254 interrupts */
 177 void indy_8254timer_irq(struct pt_regs *regs)
 178 {
 179         int irq = SGI_8254_0_IRQ;
 180         ULONG cnt;
 181         char c;
 182
 183         irq_enter();
 184         kstat_this_cpu.irqs[irq]++;
 185         printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
 186         ArcRead(0, &c, 1, &cnt);
 187         ArcEnterInteractiveMode();
 188         irq_exit();
 189 }
 190
 191 void indy_r4k_timer_interrupt(struct pt_regs *regs)
 192 {
 193         int irq = SGI_TIMER_IRQ;
 194
 195         irq_enter();
 196         kstat_this_cpu.irqs[irq]++;
 197         timer_interrupt(irq, NULL, regs);
 198         irq_exit();
 199 }
 200
 201 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
 202
 203 static void indy_timer_setup(struct irqaction *irq)
 204 {
 205         /* over-write the handler, we use our own way */
 206         irq->handler = no_action;
 207
 208         /* setup irqaction */
 209         setup_irq(SGI_TIMER_IRQ, irq);
 210 }
 211
 212 void __init ip22_time_init(void)
 213 {
 214         /* setup hookup functions */
 215         rtc_mips_get_time = indy_rtc_get_time;
 216         rtc_mips_set_time = indy_rtc_set_time;
 217
 218         board_time_init = indy_time_init;
 219         board_timer_setup = indy_timer_setup;
 220 }