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Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / hwmon / w83627hf.c
blob71fb7f1af8f5a44f470552347ba30db1ec4f888b
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
32 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
33
34 For other winbond chips, and for i2c support in the above chips,
35 use w83781d.c.
36
37 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
38 supported yet.
39 */
40
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/i2c.h>
46 #include <linux/i2c-isa.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
51 #include <asm/io.h>
52 #include "lm75.h"
53
54 static u16 force_addr;
55 module_param(force_addr, ushort, 0);
56 MODULE_PARM_DESC(force_addr,
57 "Initialize the base address of the sensors");
58 static u8 force_i2c = 0x1f;
59 module_param(force_i2c, byte, 0);
60 MODULE_PARM_DESC(force_i2c,
61 "Initialize the i2c address of the sensors");
62
63 /* The actual ISA address is read from Super-I/O configuration space */
64 static unsigned short address;
65
66 /* Insmod parameters */
67 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
68
69 static int reset;
70 module_param(reset, bool, 0);
71 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
72
73 static int init = 1;
74 module_param(init, bool, 0);
75 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
76
77 /* modified from kernel/include/traps.c */
78 static int REG; /* The register to read/write */
79 #define DEV 0x07 /* Register: Logical device select */
80 static int VAL; /* The value to read/write */
81
82 /* logical device numbers for superio_select (below) */
83 #define W83627HF_LD_FDC 0x00
84 #define W83627HF_LD_PRT 0x01
85 #define W83627HF_LD_UART1 0x02
86 #define W83627HF_LD_UART2 0x03
87 #define W83627HF_LD_KBC 0x05
88 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
89 #define W83627HF_LD_GAME 0x07
90 #define W83627HF_LD_MIDI 0x07
91 #define W83627HF_LD_GPIO1 0x07
92 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
93 #define W83627HF_LD_GPIO2 0x08
94 #define W83627HF_LD_GPIO3 0x09
95 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
96 #define W83627HF_LD_ACPI 0x0a
97 #define W83627HF_LD_HWM 0x0b
98
99 #define DEVID 0x20 /* Register: Device ID */
100
101 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
102 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
103 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
104
105 #define W83687THF_VID_EN 0x29 /* w83687thf only */
106 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
107 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
108
109 static inline void
110 superio_outb(int reg, int val)
111 {
112 outb(reg, REG);
113 outb(val, VAL);
114 }
115
116 static inline int
117 superio_inb(int reg)
118 {
119 outb(reg, REG);
120 return inb(VAL);
121 }
122
123 static inline void
124 superio_select(int ld)
125 {
126 outb(DEV, REG);
127 outb(ld, VAL);
128 }
129
130 static inline void
131 superio_enter(void)
132 {
133 outb(0x87, REG);
134 outb(0x87, REG);
135 }
136
137 static inline void
138 superio_exit(void)
139 {
140 outb(0xAA, REG);
141 }
142
143 #define W627_DEVID 0x52
144 #define W627THF_DEVID 0x82
145 #define W697_DEVID 0x60
146 #define W637_DEVID 0x70
147 #define W687THF_DEVID 0x85
148 #define WINB_ACT_REG 0x30
149 #define WINB_BASE_REG 0x60
150 /* Constants specified below */
151
152 /* Alignment of the base address */
153 #define WINB_ALIGNMENT ~7
154
155 /* Offset & size of I/O region we are interested in */
156 #define WINB_REGION_OFFSET 5
157 #define WINB_REGION_SIZE 2
158
159 /* Where are the sensors address/data registers relative to the base address */
160 #define W83781D_ADDR_REG_OFFSET 5
161 #define W83781D_DATA_REG_OFFSET 6
162
163 /* The W83781D registers */
164 /* The W83782D registers for nr=7,8 are in bank 5 */
165 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
166 (0x554 + (((nr) - 7) * 2)))
167 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
168 (0x555 + (((nr) - 7) * 2)))
169 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
170 (0x550 + (nr) - 7))
171
172 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
173 #define W83781D_REG_FAN(nr) (0x27 + (nr))
174
175 #define W83781D_REG_TEMP2_CONFIG 0x152
176 #define W83781D_REG_TEMP3_CONFIG 0x252
177 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
178 ((nr == 2) ? (0x0150) : \
179 (0x27)))
180 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
181 ((nr == 2) ? (0x153) : \
182 (0x3A)))
183 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
184 ((nr == 2) ? (0x155) : \
185 (0x39)))
186
187 #define W83781D_REG_BANK 0x4E
188
189 #define W83781D_REG_CONFIG 0x40
190 #define W83781D_REG_ALARM1 0x459
191 #define W83781D_REG_ALARM2 0x45A
192 #define W83781D_REG_ALARM3 0x45B
193
194 #define W83781D_REG_BEEP_CONFIG 0x4D
195 #define W83781D_REG_BEEP_INTS1 0x56
196 #define W83781D_REG_BEEP_INTS2 0x57
197 #define W83781D_REG_BEEP_INTS3 0x453
198
199 #define W83781D_REG_VID_FANDIV 0x47
200
201 #define W83781D_REG_CHIPID 0x49
202 #define W83781D_REG_WCHIPID 0x58
203 #define W83781D_REG_CHIPMAN 0x4F
204 #define W83781D_REG_PIN 0x4B
205
206 #define W83781D_REG_VBAT 0x5D
207
208 #define W83627HF_REG_PWM1 0x5A
209 #define W83627HF_REG_PWM2 0x5B
210
211 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
212 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
213 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
214
215 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
216
217 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
218 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
219 W83627THF_REG_PWM3 };
220 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
221 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
222
223 #define W83781D_REG_I2C_ADDR 0x48
224 #define W83781D_REG_I2C_SUBADDR 0x4A
225
226 /* Sensor selection */
227 #define W83781D_REG_SCFG1 0x5D
228 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
229 #define W83781D_REG_SCFG2 0x59
230 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
231 #define W83781D_DEFAULT_BETA 3435
232
233 /* Conversions. Limit checking is only done on the TO_REG
234 variants. Note that you should be a bit careful with which arguments
235 these macros are called: arguments may be evaluated more than once.
236 Fixing this is just not worth it. */
237 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
238 #define IN_FROM_REG(val) ((val) * 16)
239
240 static inline u8 FAN_TO_REG(long rpm, int div)
241 {
242 if (rpm == 0)
243 return 255;
244 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
245 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
246 254);
247 }
248
249 #define TEMP_MIN (-128000)
250 #define TEMP_MAX ( 127000)
251
252 /* TEMP: 0.001C/bit (-128C to +127C)
253 REG: 1C/bit, two's complement */
254 static u8 TEMP_TO_REG(int temp)
255 {
256 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
257 ntemp += (ntemp<0 ? -500 : 500);
258 return (u8)(ntemp / 1000);
259 }
260
261 static int TEMP_FROM_REG(u8 reg)
262 {
263 return (s8)reg * 1000;
264 }
265
266 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
267
268 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
269
270 #define BEEP_MASK_FROM_REG(val) (val)
271 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
272 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
273 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
274
275 #define DIV_FROM_REG(val) (1 << (val))
276
277 static inline u8 DIV_TO_REG(long val)
278 {
279 int i;
280 val = SENSORS_LIMIT(val, 1, 128) >> 1;
281 for (i = 0; i < 7; i++) {
282 if (val == 0)
283 break;
284 val >>= 1;
285 }
286 return ((u8) i);
287 }
288
289 /* For each registered chip, we need to keep some data in memory. That
290 data is pointed to by w83627hf_list[NR]->data. The structure itself is
291 dynamically allocated, at the same time when a new client is allocated. */
292 struct w83627hf_data {
293 struct i2c_client client;
294 struct class_device *class_dev;
295 struct mutex lock;
296 enum chips type;
297
298 struct mutex update_lock;
299 char valid; /* !=0 if following fields are valid */
300 unsigned long last_updated; /* In jiffies */
301
302 struct i2c_client *lm75; /* for secondary I2C addresses */
303 /* pointer to array of 2 subclients */
304
305 u8 in[9]; /* Register value */
306 u8 in_max[9]; /* Register value */
307 u8 in_min[9]; /* Register value */
308 u8 fan[3]; /* Register value */
309 u8 fan_min[3]; /* Register value */
310 u8 temp;
311 u8 temp_max; /* Register value */
312 u8 temp_max_hyst; /* Register value */
313 u16 temp_add[2]; /* Register value */
314 u16 temp_max_add[2]; /* Register value */
315 u16 temp_max_hyst_add[2]; /* Register value */
316 u8 fan_div[3]; /* Register encoding, shifted right */
317 u8 vid; /* Register encoding, combined */
318 u32 alarms; /* Register encoding, combined */
319 u32 beep_mask; /* Register encoding, combined */
320 u8 beep_enable; /* Boolean */
321 u8 pwm[3]; /* Register value */
322 u16 sens[3]; /* 782D/783S only.
323 1 = pentium diode; 2 = 3904 diode;
324 3000-5000 = thermistor beta.
325 Default = 3435.
326 Other Betas unimplemented */
327 u8 vrm;
328 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
329 };
330
331
332 static int w83627hf_detect(struct i2c_adapter *adapter);
333 static int w83627hf_detach_client(struct i2c_client *client);
334
335 static int w83627hf_read_value(struct i2c_client *client, u16 reg);
336 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value);
337 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
338 static void w83627hf_init_client(struct i2c_client *client);
339
340 static struct i2c_driver w83627hf_driver = {
341 .driver = {
342 .name = "w83627hf",
343 },
344 .attach_adapter = w83627hf_detect,
345 .detach_client = w83627hf_detach_client,
346 };
347
348 /* following are the sysfs callback functions */
349 #define show_in_reg(reg) \
350 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
351 { \
352 struct w83627hf_data *data = w83627hf_update_device(dev); \
353 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
354 }
355 show_in_reg(in)
356 show_in_reg(in_min)
357 show_in_reg(in_max)
358
359 #define store_in_reg(REG, reg) \
360 static ssize_t \
361 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
362 { \
363 struct i2c_client *client = to_i2c_client(dev); \
364 struct w83627hf_data *data = i2c_get_clientdata(client); \
365 u32 val; \
366 \
367 val = simple_strtoul(buf, NULL, 10); \
368 \
369 mutex_lock(&data->update_lock); \
370 data->in_##reg[nr] = IN_TO_REG(val); \
371 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
372 data->in_##reg[nr]); \
373 \
374 mutex_unlock(&data->update_lock); \
375 return count; \
376 }
377 store_in_reg(MIN, min)
378 store_in_reg(MAX, max)
379
380 #define sysfs_in_offset(offset) \
381 static ssize_t \
382 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
383 { \
384 return show_in(dev, buf, offset); \
385 } \
386 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
387
388 #define sysfs_in_reg_offset(reg, offset) \
389 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
390 { \
391 return show_in_##reg (dev, buf, offset); \
392 } \
393 static ssize_t \
394 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
395 const char *buf, size_t count) \
396 { \
397 return store_in_##reg (dev, buf, count, offset); \
398 } \
399 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
400 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
401
402 #define sysfs_in_offsets(offset) \
403 sysfs_in_offset(offset) \
404 sysfs_in_reg_offset(min, offset) \
405 sysfs_in_reg_offset(max, offset)
406
407 sysfs_in_offsets(1);
408 sysfs_in_offsets(2);
409 sysfs_in_offsets(3);
410 sysfs_in_offsets(4);
411 sysfs_in_offsets(5);
412 sysfs_in_offsets(6);
413 sysfs_in_offsets(7);
414 sysfs_in_offsets(8);
415
416 /* use a different set of functions for in0 */
417 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
418 {
419 long in0;
420
421 if ((data->vrm_ovt & 0x01) &&
422 (w83627thf == data->type || w83637hf == data->type
423 || w83687thf == data->type))
424
425 /* use VRM9 calculation */
426 in0 = (long)((reg * 488 + 70000 + 50) / 100);
427 else
428 /* use VRM8 (standard) calculation */
429 in0 = (long)IN_FROM_REG(reg);
430
431 return sprintf(buf,"%ld\n", in0);
432 }
433
434 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
435 {
436 struct w83627hf_data *data = w83627hf_update_device(dev);
437 return show_in_0(data, buf, data->in[0]);
438 }
439
440 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
441 {
442 struct w83627hf_data *data = w83627hf_update_device(dev);
443 return show_in_0(data, buf, data->in_min[0]);
444 }
445
446 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
447 {
448 struct w83627hf_data *data = w83627hf_update_device(dev);
449 return show_in_0(data, buf, data->in_max[0]);
450 }
451
452 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
453 const char *buf, size_t count)
454 {
455 struct i2c_client *client = to_i2c_client(dev);
456 struct w83627hf_data *data = i2c_get_clientdata(client);
457 u32 val;
458
459 val = simple_strtoul(buf, NULL, 10);
460
461 mutex_lock(&data->update_lock);
462
463 if ((data->vrm_ovt & 0x01) &&
464 (w83627thf == data->type || w83637hf == data->type
465 || w83687thf == data->type))
466
467 /* use VRM9 calculation */
468 data->in_min[0] =
469 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
470 255);
471 else
472 /* use VRM8 (standard) calculation */
473 data->in_min[0] = IN_TO_REG(val);
474
475 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
476 mutex_unlock(&data->update_lock);
477 return count;
478 }
479
480 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
481 const char *buf, size_t count)
482 {
483 struct i2c_client *client = to_i2c_client(dev);
484 struct w83627hf_data *data = i2c_get_clientdata(client);
485 u32 val;
486
487 val = simple_strtoul(buf, NULL, 10);
488
489 mutex_lock(&data->update_lock);
490
491 if ((data->vrm_ovt & 0x01) &&
492 (w83627thf == data->type || w83637hf == data->type
493 || w83687thf == data->type))
494
495 /* use VRM9 calculation */
496 data->in_max[0] =
497 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
498 255);
499 else
500 /* use VRM8 (standard) calculation */
501 data->in_max[0] = IN_TO_REG(val);
502
503 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
504 mutex_unlock(&data->update_lock);
505 return count;
506 }
507
508 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
509 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
510 show_regs_in_min0, store_regs_in_min0);
511 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
512 show_regs_in_max0, store_regs_in_max0);
513
514 #define device_create_file_in(client, offset) \
515 do { \
516 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
517 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
518 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
519 } while (0)
520
521 #define show_fan_reg(reg) \
522 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
523 { \
524 struct w83627hf_data *data = w83627hf_update_device(dev); \
525 return sprintf(buf,"%ld\n", \
526 FAN_FROM_REG(data->reg[nr-1], \
527 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
528 }
529 show_fan_reg(fan);
530 show_fan_reg(fan_min);
531
532 static ssize_t
533 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
534 {
535 struct i2c_client *client = to_i2c_client(dev);
536 struct w83627hf_data *data = i2c_get_clientdata(client);
537 u32 val;
538
539 val = simple_strtoul(buf, NULL, 10);
540
541 mutex_lock(&data->update_lock);
542 data->fan_min[nr - 1] =
543 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
544 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
545 data->fan_min[nr - 1]);
546
547 mutex_unlock(&data->update_lock);
548 return count;
549 }
550
551 #define sysfs_fan_offset(offset) \
552 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
553 { \
554 return show_fan(dev, buf, offset); \
555 } \
556 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
557
558 #define sysfs_fan_min_offset(offset) \
559 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
560 { \
561 return show_fan_min(dev, buf, offset); \
562 } \
563 static ssize_t \
564 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
565 { \
566 return store_fan_min(dev, buf, count, offset); \
567 } \
568 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
569 show_regs_fan_min##offset, store_regs_fan_min##offset);
570
571 sysfs_fan_offset(1);
572 sysfs_fan_min_offset(1);
573 sysfs_fan_offset(2);
574 sysfs_fan_min_offset(2);
575 sysfs_fan_offset(3);
576 sysfs_fan_min_offset(3);
577
578 #define device_create_file_fan(client, offset) \
579 do { \
580 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
581 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
582 } while (0)
583
584 #define show_temp_reg(reg) \
585 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
586 { \
587 struct w83627hf_data *data = w83627hf_update_device(dev); \
588 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
589 return sprintf(buf,"%ld\n", \
590 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
591 } else { /* TEMP1 */ \
592 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
593 } \
594 }
595 show_temp_reg(temp);
596 show_temp_reg(temp_max);
597 show_temp_reg(temp_max_hyst);
598
599 #define store_temp_reg(REG, reg) \
600 static ssize_t \
601 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
602 { \
603 struct i2c_client *client = to_i2c_client(dev); \
604 struct w83627hf_data *data = i2c_get_clientdata(client); \
605 u32 val; \
606 \
607 val = simple_strtoul(buf, NULL, 10); \
608 \
609 mutex_lock(&data->update_lock); \
610 \
611 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
612 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
613 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
614 data->temp_##reg##_add[nr-2]); \
615 } else { /* TEMP1 */ \
616 data->temp_##reg = TEMP_TO_REG(val); \
617 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
618 data->temp_##reg); \
619 } \
620 \
621 mutex_unlock(&data->update_lock); \
622 return count; \
623 }
624 store_temp_reg(OVER, max);
625 store_temp_reg(HYST, max_hyst);
626
627 #define sysfs_temp_offset(offset) \
628 static ssize_t \
629 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
630 { \
631 return show_temp(dev, buf, offset); \
632 } \
633 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
634
635 #define sysfs_temp_reg_offset(reg, offset) \
636 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
637 { \
638 return show_temp_##reg (dev, buf, offset); \
639 } \
640 static ssize_t \
641 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
642 const char *buf, size_t count) \
643 { \
644 return store_temp_##reg (dev, buf, count, offset); \
645 } \
646 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
647 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
648
649 #define sysfs_temp_offsets(offset) \
650 sysfs_temp_offset(offset) \
651 sysfs_temp_reg_offset(max, offset) \
652 sysfs_temp_reg_offset(max_hyst, offset)
653
654 sysfs_temp_offsets(1);
655 sysfs_temp_offsets(2);
656 sysfs_temp_offsets(3);
657
658 #define device_create_file_temp(client, offset) \
659 do { \
660 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
661 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
662 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
663 } while (0)
664
665 static ssize_t
666 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
667 {
668 struct w83627hf_data *data = w83627hf_update_device(dev);
669 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
670 }
671 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
672 #define device_create_file_vid(client) \
673 device_create_file(&client->dev, &dev_attr_cpu0_vid)
674
675 static ssize_t
676 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
677 {
678 struct w83627hf_data *data = w83627hf_update_device(dev);
679 return sprintf(buf, "%ld\n", (long) data->vrm);
680 }
681 static ssize_t
682 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
683 {
684 struct i2c_client *client = to_i2c_client(dev);
685 struct w83627hf_data *data = i2c_get_clientdata(client);
686 u32 val;
687
688 val = simple_strtoul(buf, NULL, 10);
689 data->vrm = val;
690
691 return count;
692 }
693 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
694 #define device_create_file_vrm(client) \
695 device_create_file(&client->dev, &dev_attr_vrm)
696
697 static ssize_t
698 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
699 {
700 struct w83627hf_data *data = w83627hf_update_device(dev);
701 return sprintf(buf, "%ld\n", (long) data->alarms);
702 }
703 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
704 #define device_create_file_alarms(client) \
705 device_create_file(&client->dev, &dev_attr_alarms)
706
707 #define show_beep_reg(REG, reg) \
708 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
709 { \
710 struct w83627hf_data *data = w83627hf_update_device(dev); \
711 return sprintf(buf,"%ld\n", \
712 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
713 }
714 show_beep_reg(ENABLE, enable)
715 show_beep_reg(MASK, mask)
716
717 #define BEEP_ENABLE 0 /* Store beep_enable */
718 #define BEEP_MASK 1 /* Store beep_mask */
719
720 static ssize_t
721 store_beep_reg(struct device *dev, const char *buf, size_t count,
722 int update_mask)
723 {
724 struct i2c_client *client = to_i2c_client(dev);
725 struct w83627hf_data *data = i2c_get_clientdata(client);
726 u32 val, val2;
727
728 val = simple_strtoul(buf, NULL, 10);
729
730 mutex_lock(&data->update_lock);
731
732 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
733 data->beep_mask = BEEP_MASK_TO_REG(val);
734 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
735 data->beep_mask & 0xff);
736 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
737 ((data->beep_mask) >> 16) & 0xff);
738 val2 = (data->beep_mask >> 8) & 0x7f;
739 } else { /* We are storing beep_enable */
740 val2 =
741 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
742 data->beep_enable = BEEP_ENABLE_TO_REG(val);
743 }
744
745 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
746 val2 | data->beep_enable << 7);
747
748 mutex_unlock(&data->update_lock);
749 return count;
750 }
751
752 #define sysfs_beep(REG, reg) \
753 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
754 { \
755 return show_beep_##reg(dev, attr, buf); \
756 } \
757 static ssize_t \
758 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
759 { \
760 return store_beep_reg(dev, buf, count, BEEP_##REG); \
761 } \
762 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
763 show_regs_beep_##reg, store_regs_beep_##reg);
764
765 sysfs_beep(ENABLE, enable);
766 sysfs_beep(MASK, mask);
767
768 #define device_create_file_beep(client) \
769 do { \
770 device_create_file(&client->dev, &dev_attr_beep_enable); \
771 device_create_file(&client->dev, &dev_attr_beep_mask); \
772 } while (0)
773
774 static ssize_t
775 show_fan_div_reg(struct device *dev, char *buf, int nr)
776 {
777 struct w83627hf_data *data = w83627hf_update_device(dev);
778 return sprintf(buf, "%ld\n",
779 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
780 }
781
782 /* Note: we save and restore the fan minimum here, because its value is
783 determined in part by the fan divisor. This follows the principle of
784 least suprise; the user doesn't expect the fan minimum to change just
785 because the divisor changed. */
786 static ssize_t
787 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
788 {
789 struct i2c_client *client = to_i2c_client(dev);
790 struct w83627hf_data *data = i2c_get_clientdata(client);
791 unsigned long min;
792 u8 reg;
793 unsigned long val = simple_strtoul(buf, NULL, 10);
794
795 mutex_lock(&data->update_lock);
796
797 /* Save fan_min */
798 min = FAN_FROM_REG(data->fan_min[nr],
799 DIV_FROM_REG(data->fan_div[nr]));
800
801 data->fan_div[nr] = DIV_TO_REG(val);
802
803 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
804 & (nr==0 ? 0xcf : 0x3f))
805 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
806 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
807
808 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
809 & ~(1 << (5 + nr)))
810 | ((data->fan_div[nr] & 0x04) << (3 + nr));
811 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
812
813 /* Restore fan_min */
814 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
815 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
816
817 mutex_unlock(&data->update_lock);
818 return count;
819 }
820
821 #define sysfs_fan_div(offset) \
822 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
823 { \
824 return show_fan_div_reg(dev, buf, offset); \
825 } \
826 static ssize_t \
827 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
828 const char *buf, size_t count) \
829 { \
830 return store_fan_div_reg(dev, buf, count, offset - 1); \
831 } \
832 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
833 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
834
835 sysfs_fan_div(1);
836 sysfs_fan_div(2);
837 sysfs_fan_div(3);
838
839 #define device_create_file_fan_div(client, offset) \
840 do { \
841 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
842 } while (0)
843
844 static ssize_t
845 show_pwm_reg(struct device *dev, char *buf, int nr)
846 {
847 struct w83627hf_data *data = w83627hf_update_device(dev);
848 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
849 }
850
851 static ssize_t
852 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
853 {
854 struct i2c_client *client = to_i2c_client(dev);
855 struct w83627hf_data *data = i2c_get_clientdata(client);
856 u32 val;
857
858 val = simple_strtoul(buf, NULL, 10);
859
860 mutex_lock(&data->update_lock);
861
862 if (data->type == w83627thf) {
863 /* bits 0-3 are reserved in 627THF */
864 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
865 w83627hf_write_value(client,
866 W836X7HF_REG_PWM(data->type, nr),
867 data->pwm[nr - 1] |
868 (w83627hf_read_value(client,
869 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
870 } else {
871 data->pwm[nr - 1] = PWM_TO_REG(val);
872 w83627hf_write_value(client,
873 W836X7HF_REG_PWM(data->type, nr),
874 data->pwm[nr - 1]);
875 }
876
877 mutex_unlock(&data->update_lock);
878 return count;
879 }
880
881 #define sysfs_pwm(offset) \
882 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
883 { \
884 return show_pwm_reg(dev, buf, offset); \
885 } \
886 static ssize_t \
887 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
888 { \
889 return store_pwm_reg(dev, buf, count, offset); \
890 } \
891 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
892 show_regs_pwm_##offset, store_regs_pwm_##offset);
893
894 sysfs_pwm(1);
895 sysfs_pwm(2);
896 sysfs_pwm(3);
897
898 #define device_create_file_pwm(client, offset) \
899 do { \
900 device_create_file(&client->dev, &dev_attr_pwm##offset); \
901 } while (0)
902
903 static ssize_t
904 show_sensor_reg(struct device *dev, char *buf, int nr)
905 {
906 struct w83627hf_data *data = w83627hf_update_device(dev);
907 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
908 }
909
910 static ssize_t
911 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
912 {
913 struct i2c_client *client = to_i2c_client(dev);
914 struct w83627hf_data *data = i2c_get_clientdata(client);
915 u32 val, tmp;
916
917 val = simple_strtoul(buf, NULL, 10);
918
919 mutex_lock(&data->update_lock);
920
921 switch (val) {
922 case 1: /* PII/Celeron diode */
923 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
924 w83627hf_write_value(client, W83781D_REG_SCFG1,
925 tmp | BIT_SCFG1[nr - 1]);
926 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
927 w83627hf_write_value(client, W83781D_REG_SCFG2,
928 tmp | BIT_SCFG2[nr - 1]);
929 data->sens[nr - 1] = val;
930 break;
931 case 2: /* 3904 */
932 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
933 w83627hf_write_value(client, W83781D_REG_SCFG1,
934 tmp | BIT_SCFG1[nr - 1]);
935 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
936 w83627hf_write_value(client, W83781D_REG_SCFG2,
937 tmp & ~BIT_SCFG2[nr - 1]);
938 data->sens[nr - 1] = val;
939 break;
940 case W83781D_DEFAULT_BETA: /* thermistor */
941 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
942 w83627hf_write_value(client, W83781D_REG_SCFG1,
943 tmp & ~BIT_SCFG1[nr - 1]);
944 data->sens[nr - 1] = val;
945 break;
946 default:
947 dev_err(&client->dev,
948 "Invalid sensor type %ld; must be 1, 2, or %d\n",
949 (long) val, W83781D_DEFAULT_BETA);
950 break;
951 }
952
953 mutex_unlock(&data->update_lock);
954 return count;
955 }
956
957 #define sysfs_sensor(offset) \
958 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
959 { \
960 return show_sensor_reg(dev, buf, offset); \
961 } \
962 static ssize_t \
963 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
964 { \
965 return store_sensor_reg(dev, buf, count, offset); \
966 } \
967 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
968 show_regs_sensor_##offset, store_regs_sensor_##offset);
969
970 sysfs_sensor(1);
971 sysfs_sensor(2);
972 sysfs_sensor(3);
973
974 #define device_create_file_sensor(client, offset) \
975 do { \
976 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
977 } while (0)
978
979
980 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
981 {
982 u16 val;
983
984 REG = sioaddr;
985 VAL = sioaddr + 1;
986
987 superio_enter();
988 val= superio_inb(DEVID);
989 if(val != W627_DEVID &&
990 val != W627THF_DEVID &&
991 val != W697_DEVID &&
992 val != W637_DEVID &&
993 val != W687THF_DEVID) {
994 superio_exit();
995 return -ENODEV;
996 }
997
998 superio_select(W83627HF_LD_HWM);
999 val = (superio_inb(WINB_BASE_REG) << 8) |
1000 superio_inb(WINB_BASE_REG + 1);
1001 *addr = val & WINB_ALIGNMENT;
1002 if (*addr == 0 && force_addr == 0) {
1003 superio_exit();
1004 return -ENODEV;
1005 }
1006
1007 superio_exit();
1008 return 0;
1009 }
1010
1011 static int w83627hf_detect(struct i2c_adapter *adapter)
1012 {
1013 int val, kind;
1014 struct i2c_client *new_client;
1015 struct w83627hf_data *data;
1016 int err = 0;
1017 const char *client_name = "";
1018
1019 if(force_addr)
1020 address = force_addr & WINB_ALIGNMENT;
1021
1022 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1023 w83627hf_driver.driver.name)) {
1024 err = -EBUSY;
1025 goto ERROR0;
1026 }
1027
1028 if(force_addr) {
1029 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1030 superio_enter();
1031 superio_select(W83627HF_LD_HWM);
1032 superio_outb(WINB_BASE_REG, address >> 8);
1033 superio_outb(WINB_BASE_REG+1, address & 0xff);
1034 superio_exit();
1035 }
1036
1037 superio_enter();
1038 val= superio_inb(DEVID);
1039 if(val == W627_DEVID)
1040 kind = w83627hf;
1041 else if(val == W697_DEVID)
1042 kind = w83697hf;
1043 else if(val == W627THF_DEVID)
1044 kind = w83627thf;
1045 else if(val == W637_DEVID)
1046 kind = w83637hf;
1047 else if (val == W687THF_DEVID)
1048 kind = w83687thf;
1049 else {
1050 dev_info(&adapter->dev,
1051 "Unsupported chip (dev_id=0x%02X).\n", val);
1052 goto ERROR1;
1053 }
1054
1055 superio_select(W83627HF_LD_HWM);
1056 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1057 superio_outb(WINB_ACT_REG, 1);
1058 superio_exit();
1059
1060 /* OK. For now, we presume we have a valid client. We now create the
1061 client structure, even though we cannot fill it completely yet.
1062 But it allows us to access w83627hf_{read,write}_value. */
1063
1064 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1065 err = -ENOMEM;
1066 goto ERROR1;
1067 }
1068
1069 new_client = &data->client;
1070 i2c_set_clientdata(new_client, data);
1071 new_client->addr = address;
1072 mutex_init(&data->lock);
1073 new_client->adapter = adapter;
1074 new_client->driver = &w83627hf_driver;
1075 new_client->flags = 0;
1076
1077
1078 if (kind == w83627hf) {
1079 client_name = "w83627hf";
1080 } else if (kind == w83627thf) {
1081 client_name = "w83627thf";
1082 } else if (kind == w83697hf) {
1083 client_name = "w83697hf";
1084 } else if (kind == w83637hf) {
1085 client_name = "w83637hf";
1086 } else if (kind == w83687thf) {
1087 client_name = "w83687thf";
1088 }
1089
1090 /* Fill in the remaining client fields and put into the global list */
1091 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1092 data->type = kind;
1093 data->valid = 0;
1094 mutex_init(&data->update_lock);
1095
1096 /* Tell the I2C layer a new client has arrived */
1097 if ((err = i2c_attach_client(new_client)))
1098 goto ERROR2;
1099
1100 data->lm75 = NULL;
1101
1102 /* Initialize the chip */
1103 w83627hf_init_client(new_client);
1104
1105 /* A few vars need to be filled upon startup */
1106 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1107 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1108 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1109
1110 /* Register sysfs hooks */
1111 data->class_dev = hwmon_device_register(&new_client->dev);
1112 if (IS_ERR(data->class_dev)) {
1113 err = PTR_ERR(data->class_dev);
1114 goto ERROR3;
1115 }
1116
1117 device_create_file_in(new_client, 0);
1118 if (kind != w83697hf)
1119 device_create_file_in(new_client, 1);
1120 device_create_file_in(new_client, 2);
1121 device_create_file_in(new_client, 3);
1122 device_create_file_in(new_client, 4);
1123 if (kind == w83627hf || kind == w83697hf) {
1124 device_create_file_in(new_client, 5);
1125 device_create_file_in(new_client, 6);
1126 }
1127 device_create_file_in(new_client, 7);
1128 device_create_file_in(new_client, 8);
1129
1130 device_create_file_fan(new_client, 1);
1131 device_create_file_fan(new_client, 2);
1132 if (kind != w83697hf)
1133 device_create_file_fan(new_client, 3);
1134
1135 device_create_file_temp(new_client, 1);
1136 device_create_file_temp(new_client, 2);
1137 if (kind != w83697hf)
1138 device_create_file_temp(new_client, 3);
1139
1140 if (kind != w83697hf && data->vid != 0xff) {
1141 device_create_file_vid(new_client);
1142 device_create_file_vrm(new_client);
1143 }
1144
1145 device_create_file_fan_div(new_client, 1);
1146 device_create_file_fan_div(new_client, 2);
1147 if (kind != w83697hf)
1148 device_create_file_fan_div(new_client, 3);
1149
1150 device_create_file_alarms(new_client);
1151
1152 device_create_file_beep(new_client);
1153
1154 device_create_file_pwm(new_client, 1);
1155 device_create_file_pwm(new_client, 2);
1156 if (kind == w83627thf || kind == w83637hf || kind == w83687thf)
1157 device_create_file_pwm(new_client, 3);
1158
1159 device_create_file_sensor(new_client, 1);
1160 device_create_file_sensor(new_client, 2);
1161 if (kind != w83697hf)
1162 device_create_file_sensor(new_client, 3);
1163
1164 return 0;
1165
1166 ERROR3:
1167 i2c_detach_client(new_client);
1168 ERROR2:
1169 kfree(data);
1170 ERROR1:
1171 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1172 ERROR0:
1173 return err;
1174 }
1175
1176 static int w83627hf_detach_client(struct i2c_client *client)
1177 {
1178 struct w83627hf_data *data = i2c_get_clientdata(client);
1179 int err;
1180
1181 hwmon_device_unregister(data->class_dev);
1182
1183 if ((err = i2c_detach_client(client)))
1184 return err;
1185
1186 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1187 kfree(data);
1188
1189 return 0;
1190 }
1191
1192
1193 /*
1194 ISA access must always be locked explicitly!
1195 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1196 would slow down the W83781D access and should not be necessary.
1197 There are some ugly typecasts here, but the good news is - they should
1198 nowhere else be necessary! */
1199 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1200 {
1201 struct w83627hf_data *data = i2c_get_clientdata(client);
1202 int res, word_sized;
1203
1204 mutex_lock(&data->lock);
1205 word_sized = (((reg & 0xff00) == 0x100)
1206 || ((reg & 0xff00) == 0x200))
1207 && (((reg & 0x00ff) == 0x50)
1208 || ((reg & 0x00ff) == 0x53)
1209 || ((reg & 0x00ff) == 0x55));
1210 if (reg & 0xff00) {
1211 outb_p(W83781D_REG_BANK,
1212 client->addr + W83781D_ADDR_REG_OFFSET);
1213 outb_p(reg >> 8,
1214 client->addr + W83781D_DATA_REG_OFFSET);
1215 }
1216 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1217 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1218 if (word_sized) {
1219 outb_p((reg & 0xff) + 1,
1220 client->addr + W83781D_ADDR_REG_OFFSET);
1221 res =
1222 (res << 8) + inb_p(client->addr +
1223 W83781D_DATA_REG_OFFSET);
1224 }
1225 if (reg & 0xff00) {
1226 outb_p(W83781D_REG_BANK,
1227 client->addr + W83781D_ADDR_REG_OFFSET);
1228 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1229 }
1230 mutex_unlock(&data->lock);
1231 return res;
1232 }
1233
1234 static int w83627thf_read_gpio5(struct i2c_client *client)
1235 {
1236 int res = 0xff, sel;
1237
1238 superio_enter();
1239 superio_select(W83627HF_LD_GPIO5);
1240
1241 /* Make sure these GPIO pins are enabled */
1242 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1243 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1244 goto exit;
1245 }
1246
1247 /* Make sure the pins are configured for input
1248 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1249 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1250 if ((sel & 0x1f) != 0x1f) {
1251 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1252 "function\n");
1253 goto exit;
1254 }
1255
1256 dev_info(&client->dev, "Reading VID from GPIO5\n");
1257 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1258
1259 exit:
1260 superio_exit();
1261 return res;
1262 }
1263
1264 static int w83687thf_read_vid(struct i2c_client *client)
1265 {
1266 int res = 0xff;
1267
1268 superio_enter();
1269 superio_select(W83627HF_LD_HWM);
1270
1271 /* Make sure these GPIO pins are enabled */
1272 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1273 dev_dbg(&client->dev, "VID disabled, no VID function\n");
1274 goto exit;
1275 }
1276
1277 /* Make sure the pins are configured for input */
1278 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1279 dev_dbg(&client->dev, "VID configured as output, "
1280 "no VID function\n");
1281 goto exit;
1282 }
1283
1284 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1285
1286 exit:
1287 superio_exit();
1288 return res;
1289 }
1290
1291 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1292 {
1293 struct w83627hf_data *data = i2c_get_clientdata(client);
1294 int word_sized;
1295
1296 mutex_lock(&data->lock);
1297 word_sized = (((reg & 0xff00) == 0x100)
1298 || ((reg & 0xff00) == 0x200))
1299 && (((reg & 0x00ff) == 0x53)
1300 || ((reg & 0x00ff) == 0x55));
1301 if (reg & 0xff00) {
1302 outb_p(W83781D_REG_BANK,
1303 client->addr + W83781D_ADDR_REG_OFFSET);
1304 outb_p(reg >> 8,
1305 client->addr + W83781D_DATA_REG_OFFSET);
1306 }
1307 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1308 if (word_sized) {
1309 outb_p(value >> 8,
1310 client->addr + W83781D_DATA_REG_OFFSET);
1311 outb_p((reg & 0xff) + 1,
1312 client->addr + W83781D_ADDR_REG_OFFSET);
1313 }
1314 outb_p(value & 0xff,
1315 client->addr + W83781D_DATA_REG_OFFSET);
1316 if (reg & 0xff00) {
1317 outb_p(W83781D_REG_BANK,
1318 client->addr + W83781D_ADDR_REG_OFFSET);
1319 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1320 }
1321 mutex_unlock(&data->lock);
1322 return 0;
1323 }
1324
1325 static void w83627hf_init_client(struct i2c_client *client)
1326 {
1327 struct w83627hf_data *data = i2c_get_clientdata(client);
1328 int i;
1329 int type = data->type;
1330 u8 tmp;
1331
1332 if (reset) {
1333 /* Resetting the chip has been the default for a long time,
1334 but repeatedly caused problems (fans going to full
1335 speed...) so it is now optional. It might even go away if
1336 nobody reports it as being useful, as I see very little
1337 reason why this would be needed at all. */
1338 dev_info(&client->dev, "If reset=1 solved a problem you were "
1339 "having, please report!\n");
1340
1341 /* save this register */
1342 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1343 /* Reset all except Watchdog values and last conversion values
1344 This sets fan-divs to 2, among others */
1345 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1346 /* Restore the register and disable power-on abnormal beep.
1347 This saves FAN 1/2/3 input/output values set by BIOS. */
1348 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1349 /* Disable master beep-enable (reset turns it on).
1350 Individual beeps should be reset to off but for some reason
1351 disabling this bit helps some people not get beeped */
1352 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1353 }
1354
1355 /* Minimize conflicts with other winbond i2c-only clients... */
1356 /* disable i2c subclients... how to disable main i2c client?? */
1357 /* force i2c address to relatively uncommon address */
1358 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1359 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1360
1361 /* Read VID only once */
1362 if (w83627hf == data->type || w83637hf == data->type) {
1363 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1364 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1365 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1366 } else if (w83627thf == data->type) {
1367 data->vid = w83627thf_read_gpio5(client);
1368 } else if (w83687thf == data->type) {
1369 data->vid = w83687thf_read_vid(client);
1370 }
1371
1372 /* Read VRM & OVT Config only once */
1373 if (w83627thf == data->type || w83637hf == data->type
1374 || w83687thf == data->type) {
1375 data->vrm_ovt =
1376 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1377 }
1378
1379 /* Convert VID to voltage based on VRM */
1380 data->vrm = vid_which_vrm();
1381
1382 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1383 for (i = 1; i <= 3; i++) {
1384 if (!(tmp & BIT_SCFG1[i - 1])) {
1385 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1386 } else {
1387 if (w83627hf_read_value
1388 (client,
1389 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1390 data->sens[i - 1] = 1;
1391 else
1392 data->sens[i - 1] = 2;
1393 }
1394 if ((type == w83697hf) && (i == 2))
1395 break;
1396 }
1397
1398 if(init) {
1399 /* Enable temp2 */
1400 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1401 if (tmp & 0x01) {
1402 dev_warn(&client->dev, "Enabling temp2, readings "
1403 "might not make sense\n");
1404 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1405 tmp & 0xfe);
1406 }
1407
1408 /* Enable temp3 */
1409 if (type != w83697hf) {
1410 tmp = w83627hf_read_value(client,
1411 W83781D_REG_TEMP3_CONFIG);
1412 if (tmp & 0x01) {
1413 dev_warn(&client->dev, "Enabling temp3, "
1414 "readings might not make sense\n");
1415 w83627hf_write_value(client,
1416 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1417 }
1418 }
1419 }
1420
1421 /* Start monitoring */
1422 w83627hf_write_value(client, W83781D_REG_CONFIG,
1423 (w83627hf_read_value(client,
1424 W83781D_REG_CONFIG) & 0xf7)
1425 | 0x01);
1426 }
1427
1428 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1429 {
1430 struct i2c_client *client = to_i2c_client(dev);
1431 struct w83627hf_data *data = i2c_get_clientdata(client);
1432 int i;
1433
1434 mutex_lock(&data->update_lock);
1435
1436 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1437 || !data->valid) {
1438 for (i = 0; i <= 8; i++) {
1439 /* skip missing sensors */
1440 if (((data->type == w83697hf) && (i == 1)) ||
1441 ((data->type != w83627hf && data->type != w83697hf)
1442 && (i == 5 || i == 6)))
1443 continue;
1444 data->in[i] =
1445 w83627hf_read_value(client, W83781D_REG_IN(i));
1446 data->in_min[i] =
1447 w83627hf_read_value(client,
1448 W83781D_REG_IN_MIN(i));
1449 data->in_max[i] =
1450 w83627hf_read_value(client,
1451 W83781D_REG_IN_MAX(i));
1452 }
1453 for (i = 1; i <= 3; i++) {
1454 data->fan[i - 1] =
1455 w83627hf_read_value(client, W83781D_REG_FAN(i));
1456 data->fan_min[i - 1] =
1457 w83627hf_read_value(client,
1458 W83781D_REG_FAN_MIN(i));
1459 }
1460 for (i = 1; i <= 3; i++) {
1461 u8 tmp = w83627hf_read_value(client,
1462 W836X7HF_REG_PWM(data->type, i));
1463 /* bits 0-3 are reserved in 627THF */
1464 if (data->type == w83627thf)
1465 tmp &= 0xf0;
1466 data->pwm[i - 1] = tmp;
1467 if(i == 2 &&
1468 (data->type == w83627hf || data->type == w83697hf))
1469 break;
1470 }
1471
1472 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1473 data->temp_max =
1474 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1475 data->temp_max_hyst =
1476 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1477 data->temp_add[0] =
1478 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1479 data->temp_max_add[0] =
1480 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1481 data->temp_max_hyst_add[0] =
1482 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1483 if (data->type != w83697hf) {
1484 data->temp_add[1] =
1485 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1486 data->temp_max_add[1] =
1487 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1488 data->temp_max_hyst_add[1] =
1489 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1490 }
1491
1492 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1493 data->fan_div[0] = (i >> 4) & 0x03;
1494 data->fan_div[1] = (i >> 6) & 0x03;
1495 if (data->type != w83697hf) {
1496 data->fan_div[2] = (w83627hf_read_value(client,
1497 W83781D_REG_PIN) >> 6) & 0x03;
1498 }
1499 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1500 data->fan_div[0] |= (i >> 3) & 0x04;
1501 data->fan_div[1] |= (i >> 4) & 0x04;
1502 if (data->type != w83697hf)
1503 data->fan_div[2] |= (i >> 5) & 0x04;
1504 data->alarms =
1505 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1506 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1507 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1508 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1509 data->beep_enable = i >> 7;
1510 data->beep_mask = ((i & 0x7f) << 8) |
1511 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1512 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1513 data->last_updated = jiffies;
1514 data->valid = 1;
1515 }
1516
1517 mutex_unlock(&data->update_lock);
1518
1519 return data;
1520 }
1521
1522 static int __init sensors_w83627hf_init(void)
1523 {
1524 if (w83627hf_find(0x2e, &address)
1525 && w83627hf_find(0x4e, &address)) {
1526 return -ENODEV;
1527 }
1528
1529 return i2c_isa_add_driver(&w83627hf_driver);
1530 }
1531
1532 static void __exit sensors_w83627hf_exit(void)
1533 {
1534 i2c_isa_del_driver(&w83627hf_driver);
1535 }
1536
1537 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1538 "Philip Edelbrock <phil@netroedge.com>, "
1539 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1540 MODULE_DESCRIPTION("W83627HF driver");
1541 MODULE_LICENSE("GPL");
1542
1543 module_init(sensors_w83627hf_init);
1544 module_exit(sensors_w83627hf_exit);
Linux with added FPC-III support