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Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / i2c / busses / scx200_acb.c
blob766cc969c4d0c784abd0ef926363f2c37c7d735f
1 /*
2 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
3
4 National Semiconductor SCx200 ACCESS.bus support
5 Also supports the AMD CS5535 and AMD CS5536
6
7 Based on i2c-keywest.c which is:
8 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
9 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
10
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2 of the
14 License, or (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/i2c.h>
31 #include <linux/smp_lock.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/mutex.h>
35 #include <asm/io.h>
36 #include <asm/msr.h>
37
38 #include <linux/scx200.h>
39
40 #define NAME "scx200_acb"
41
42 MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
43 MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
44 MODULE_LICENSE("GPL");
45
46 #define MAX_DEVICES 4
47 static int base[MAX_DEVICES] = { 0x820, 0x840 };
48 module_param_array(base, int, NULL, 0);
49 MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
50
51 #define POLL_TIMEOUT (HZ/5)
52
53 enum scx200_acb_state {
54 state_idle,
55 state_address,
56 state_command,
57 state_repeat_start,
58 state_quick,
59 state_read,
60 state_write,
61 };
62
63 static const char *scx200_acb_state_name[] = {
64 "idle",
65 "address",
66 "command",
67 "repeat_start",
68 "quick",
69 "read",
70 "write",
71 };
72
73 /* Physical interface */
74 struct scx200_acb_iface {
75 struct scx200_acb_iface *next;
76 struct i2c_adapter adapter;
77 unsigned base;
78 struct mutex mutex;
79
80 /* State machine data */
81 enum scx200_acb_state state;
82 int result;
83 u8 address_byte;
84 u8 command;
85 u8 *ptr;
86 char needs_reset;
87 unsigned len;
88 };
89
90 /* Register Definitions */
91 #define ACBSDA (iface->base + 0)
92 #define ACBST (iface->base + 1)
93 #define ACBST_SDAST 0x40 /* SDA Status */
94 #define ACBST_BER 0x20
95 #define ACBST_NEGACK 0x10 /* Negative Acknowledge */
96 #define ACBST_STASTR 0x08 /* Stall After Start */
97 #define ACBST_MASTER 0x02
98 #define ACBCST (iface->base + 2)
99 #define ACBCST_BB 0x02
100 #define ACBCTL1 (iface->base + 3)
101 #define ACBCTL1_STASTRE 0x80
102 #define ACBCTL1_NMINTE 0x40
103 #define ACBCTL1_ACK 0x10
104 #define ACBCTL1_STOP 0x02
105 #define ACBCTL1_START 0x01
106 #define ACBADDR (iface->base + 4)
107 #define ACBCTL2 (iface->base + 5)
108 #define ACBCTL2_ENABLE 0x01
109
110 /************************************************************************/
111
112 static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
113 {
114 const char *errmsg;
115
116 dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
117 scx200_acb_state_name[iface->state], status);
118
119 if (status & ACBST_BER) {
120 errmsg = "bus error";
121 goto error;
122 }
123 if (!(status & ACBST_MASTER)) {
124 errmsg = "not master";
125 goto error;
126 }
127 if (status & ACBST_NEGACK) {
128 dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
129 scx200_acb_state_name[iface->state]);
130
131 iface->state = state_idle;
132 iface->result = -ENXIO;
133
134 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
135 outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
136
137 /* Reset the status register */
138 outb(0, ACBST);
139 return;
140 }
141
142 switch (iface->state) {
143 case state_idle:
144 dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
145 break;
146
147 case state_address:
148 /* Do a pointer write first */
149 outb(iface->address_byte & ~1, ACBSDA);
150
151 iface->state = state_command;
152 break;
153
154 case state_command:
155 outb(iface->command, ACBSDA);
156
157 if (iface->address_byte & 1)
158 iface->state = state_repeat_start;
159 else
160 iface->state = state_write;
161 break;
162
163 case state_repeat_start:
164 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
165 /* fallthrough */
166
167 case state_quick:
168 if (iface->address_byte & 1) {
169 if (iface->len == 1)
170 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
171 else
172 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
173 outb(iface->address_byte, ACBSDA);
174
175 iface->state = state_read;
176 } else {
177 outb(iface->address_byte, ACBSDA);
178
179 iface->state = state_write;
180 }
181 break;
182
183 case state_read:
184 /* Set ACK if receiving the last byte */
185 if (iface->len == 1)
186 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
187 else
188 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
189
190 *iface->ptr++ = inb(ACBSDA);
191 --iface->len;
192
193 if (iface->len == 0) {
194 iface->result = 0;
195 iface->state = state_idle;
196 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
197 }
198
199 break;
200
201 case state_write:
202 if (iface->len == 0) {
203 iface->result = 0;
204 iface->state = state_idle;
205 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
206 break;
207 }
208
209 outb(*iface->ptr++, ACBSDA);
210 --iface->len;
211
212 break;
213 }
214
215 return;
216
217 error:
218 dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
219 scx200_acb_state_name[iface->state]);
220
221 iface->state = state_idle;
222 iface->result = -EIO;
223 iface->needs_reset = 1;
224 }
225
226 static void scx200_acb_poll(struct scx200_acb_iface *iface)
227 {
228 u8 status;
229 unsigned long timeout;
230
231 timeout = jiffies + POLL_TIMEOUT;
232 while (time_before(jiffies, timeout)) {
233 status = inb(ACBST);
234
235 /* Reset the status register to avoid the hang */
236 outb(0, ACBST);
237
238 if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
239 scx200_acb_machine(iface, status);
240 return;
241 }
242 yield();
243 }
244
245 dev_err(&iface->adapter.dev, "timeout in state %s\n",
246 scx200_acb_state_name[iface->state]);
247
248 iface->state = state_idle;
249 iface->result = -EIO;
250 iface->needs_reset = 1;
251 }
252
253 static void scx200_acb_reset(struct scx200_acb_iface *iface)
254 {
255 /* Disable the ACCESS.bus device and Configure the SCL
256 frequency: 16 clock cycles */
257 outb(0x70, ACBCTL2);
258 /* Polling mode */
259 outb(0, ACBCTL1);
260 /* Disable slave address */
261 outb(0, ACBADDR);
262 /* Enable the ACCESS.bus device */
263 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
264 /* Free STALL after START */
265 outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
266 /* Send a STOP */
267 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
268 /* Clear BER, NEGACK and STASTR bits */
269 outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
270 /* Clear BB bit */
271 outb(inb(ACBCST) | ACBCST_BB, ACBCST);
272 }
273
274 static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
275 u16 address, unsigned short flags,
276 char rw, u8 command, int size,
277 union i2c_smbus_data *data)
278 {
279 struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
280 int len;
281 u8 *buffer;
282 u16 cur_word;
283 int rc;
284
285 switch (size) {
286 case I2C_SMBUS_QUICK:
287 len = 0;
288 buffer = NULL;
289 break;
290
291 case I2C_SMBUS_BYTE:
292 len = 1;
293 buffer = rw ? &data->byte : &command;
294 break;
295
296 case I2C_SMBUS_BYTE_DATA:
297 len = 1;
298 buffer = &data->byte;
299 break;
300
301 case I2C_SMBUS_WORD_DATA:
302 len = 2;
303 cur_word = cpu_to_le16(data->word);
304 buffer = (u8 *)&cur_word;
305 break;
306
307 case I2C_SMBUS_BLOCK_DATA:
308 len = data->block[0];
309 buffer = &data->block[1];
310 break;
311
312 default:
313 return -EINVAL;
314 }
315
316 dev_dbg(&adapter->dev,
317 "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
318 size, address, command, len, rw);
319
320 if (!len && rw == I2C_SMBUS_READ) {
321 dev_dbg(&adapter->dev, "zero length read\n");
322 return -EINVAL;
323 }
324
325 mutex_lock(&iface->mutex);
326
327 iface->address_byte = (address << 1) | rw;
328 iface->command = command;
329 iface->ptr = buffer;
330 iface->len = len;
331 iface->result = -EINVAL;
332 iface->needs_reset = 0;
333
334 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
335
336 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
337 iface->state = state_quick;
338 else
339 iface->state = state_address;
340
341 while (iface->state != state_idle)
342 scx200_acb_poll(iface);
343
344 if (iface->needs_reset)
345 scx200_acb_reset(iface);
346
347 rc = iface->result;
348
349 mutex_unlock(&iface->mutex);
350
351 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
352 data->word = le16_to_cpu(cur_word);
353
354 #ifdef DEBUG
355 dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
356 if (buffer) {
357 int i;
358 printk(" data:");
359 for (i = 0; i < len; ++i)
360 printk(" %02x", buffer[i]);
361 }
362 printk("\n");
363 #endif
364
365 return rc;
366 }
367
368 static u32 scx200_acb_func(struct i2c_adapter *adapter)
369 {
370 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
371 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
372 I2C_FUNC_SMBUS_BLOCK_DATA;
373 }
374
375 /* For now, we only handle combined mode (smbus) */
376 static struct i2c_algorithm scx200_acb_algorithm = {
377 .smbus_xfer = scx200_acb_smbus_xfer,
378 .functionality = scx200_acb_func,
379 };
380
381 static struct scx200_acb_iface *scx200_acb_list;
382 static DECLARE_MUTEX(scx200_acb_list_mutex);
383
384 static int scx200_acb_probe(struct scx200_acb_iface *iface)
385 {
386 u8 val;
387
388 /* Disable the ACCESS.bus device and Configure the SCL
389 frequency: 16 clock cycles */
390 outb(0x70, ACBCTL2);
391
392 if (inb(ACBCTL2) != 0x70) {
393 pr_debug(NAME ": ACBCTL2 readback failed\n");
394 return -ENXIO;
395 }
396
397 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
398
399 val = inb(ACBCTL1);
400 if (val) {
401 pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
402 val);
403 return -ENXIO;
404 }
405
406 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
407
408 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
409
410 val = inb(ACBCTL1);
411 if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
412 pr_debug(NAME ": enabled, but NMINTE won't be set, "
413 "ACBCTL1=0x%02x\n", val);
414 return -ENXIO;
415 }
416
417 return 0;
418 }
419
420 static int __init scx200_acb_create(const char *text, int base, int index)
421 {
422 struct scx200_acb_iface *iface;
423 struct i2c_adapter *adapter;
424 int rc;
425
426 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
427 if (!iface) {
428 printk(KERN_ERR NAME ": can't allocate memory\n");
429 rc = -ENOMEM;
430 goto errout;
431 }
432
433 adapter = &iface->adapter;
434 i2c_set_adapdata(adapter, iface);
435 snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
436 adapter->owner = THIS_MODULE;
437 adapter->id = I2C_HW_SMBUS_SCX200;
438 adapter->algo = &scx200_acb_algorithm;
439 adapter->class = I2C_CLASS_HWMON;
440
441 mutex_init(&iface->mutex);
442
443 if (!request_region(base, 8, adapter->name)) {
444 printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
445 base, base + 8-1);
446 rc = -EBUSY;
447 goto errout_free;
448 }
449 iface->base = base;
450
451 rc = scx200_acb_probe(iface);
452 if (rc) {
453 printk(KERN_WARNING NAME ": probe failed\n");
454 goto errout_release;
455 }
456
457 scx200_acb_reset(iface);
458
459 if (i2c_add_adapter(adapter) < 0) {
460 printk(KERN_ERR NAME ": failed to register\n");
461 rc = -ENODEV;
462 goto errout_release;
463 }
464
465 down(&scx200_acb_list_mutex);
466 iface->next = scx200_acb_list;
467 scx200_acb_list = iface;
468 up(&scx200_acb_list_mutex);
469
470 return 0;
471
472 errout_release:
473 release_region(iface->base, 8);
474 errout_free:
475 kfree(iface);
476 errout:
477 return rc;
478 }
479
480 static struct pci_device_id scx200[] = {
481 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
482 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
483 { },
484 };
485
486 static struct pci_device_id divil_pci[] = {
487 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
488 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
489 { } /* NULL entry */
490 };
491
492 #define MSR_LBAR_SMB 0x5140000B
493
494 static __init int scx200_add_cs553x(void)
495 {
496 u32 low, hi;
497 u32 smb_base;
498
499 /* Grab & reserve the SMB I/O range */
500 rdmsr(MSR_LBAR_SMB, low, hi);
501
502 /* Check the IO mask and whether SMB is enabled */
503 if (hi != 0x0000F001) {
504 printk(KERN_WARNING NAME ": SMBus not enabled\n");
505 return -ENODEV;
506 }
507
508 /* SMBus IO size is 8 bytes */
509 smb_base = low & 0x0000FFF8;
510
511 return scx200_acb_create("CS5535", smb_base, 0);
512 }
513
514 static int __init scx200_acb_init(void)
515 {
516 int i;
517 int rc = -ENODEV;
518
519 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
520
521 /* Verify that this really is a SCx200 processor */
522 if (pci_dev_present(scx200)) {
523 for (i = 0; i < MAX_DEVICES; ++i) {
524 if (base[i] > 0)
525 rc = scx200_acb_create("SCx200", base[i], i);
526 }
527 } else if (pci_dev_present(divil_pci))
528 rc = scx200_add_cs553x();
529
530 /* If at least one bus was created, init must succeed */
531 if (scx200_acb_list)
532 return 0;
533 return rc;
534 }
535
536 static void __exit scx200_acb_cleanup(void)
537 {
538 struct scx200_acb_iface *iface;
539
540 down(&scx200_acb_list_mutex);
541 while ((iface = scx200_acb_list) != NULL) {
542 scx200_acb_list = iface->next;
543 up(&scx200_acb_list_mutex);
544
545 i2c_del_adapter(&iface->adapter);
546 release_region(iface->base, 8);
547 kfree(iface);
548 down(&scx200_acb_list_mutex);
549 }
550 up(&scx200_acb_list_mutex);
551 }
552
553 module_init(scx200_acb_init);
554 module_exit(scx200_acb_cleanup);
Linux with added FPC-III support