Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / input / serio / i8042.c
bloba7d91d5356a55c67035cf8ab5c0b183a1fffa05a
1 /*
2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
5 */
7 /*
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/config.h>
19 #include <linux/init.h>
20 #include <linux/serio.h>
21 #include <linux/err.h>
22 #include <linux/rcupdate.h>
23 #include <linux/platform_device.h>
25 #include <asm/io.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static unsigned int i8042_nokbd;
32 module_param_named(nokbd, i8042_nokbd, bool, 0);
33 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
35 static unsigned int i8042_noaux;
36 module_param_named(noaux, i8042_noaux, bool, 0);
37 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
39 static unsigned int i8042_nomux;
40 module_param_named(nomux, i8042_nomux, bool, 0);
41 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
43 static unsigned int i8042_unlock;
44 module_param_named(unlock, i8042_unlock, bool, 0);
45 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
47 static unsigned int i8042_reset;
48 module_param_named(reset, i8042_reset, bool, 0);
49 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
51 static unsigned int i8042_direct;
52 module_param_named(direct, i8042_direct, bool, 0);
53 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
55 static unsigned int i8042_dumbkbd;
56 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
57 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
59 static unsigned int i8042_noloop;
60 module_param_named(noloop, i8042_noloop, bool, 0);
61 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency = 500;
64 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
65 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
67 #ifdef CONFIG_PNP
68 static int i8042_nopnp;
69 module_param_named(nopnp, i8042_nopnp, bool, 0);
70 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
71 #endif
73 #define DEBUG
74 #ifdef DEBUG
75 static int i8042_debug;
76 module_param_named(debug, i8042_debug, bool, 0600);
77 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
78 #endif
80 __obsolete_setup("i8042_noaux");
81 __obsolete_setup("i8042_nomux");
82 __obsolete_setup("i8042_unlock");
83 __obsolete_setup("i8042_reset");
84 __obsolete_setup("i8042_direct");
85 __obsolete_setup("i8042_dumbkbd");
87 #include "i8042.h"
89 static DEFINE_SPINLOCK(i8042_lock);
91 struct i8042_port {
92 struct serio *serio;
93 int irq;
94 unsigned char disable;
95 unsigned char irqen;
96 unsigned char exists;
97 signed char mux;
98 char name[8];
101 #define I8042_KBD_PORT_NO 0
102 #define I8042_AUX_PORT_NO 1
103 #define I8042_MUX_PORT_NO 2
104 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
105 static struct i8042_port i8042_ports[I8042_NUM_PORTS] = {
107 .disable = I8042_CTR_KBDDIS,
108 .irqen = I8042_CTR_KBDINT,
109 .mux = -1,
110 .name = "KBD",
113 .disable = I8042_CTR_AUXDIS,
114 .irqen = I8042_CTR_AUXINT,
115 .mux = -1,
116 .name = "AUX",
120 static unsigned char i8042_initial_ctr;
121 static unsigned char i8042_ctr;
122 static unsigned char i8042_mux_open;
123 static unsigned char i8042_mux_present;
124 static struct timer_list i8042_timer;
125 static struct platform_device *i8042_platform_device;
129 * Shared IRQ's require a device pointer, but this driver doesn't support
130 * multiple devices
132 #define i8042_request_irq_cookie (&i8042_timer)
134 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
137 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
138 * be ready for reading values from it / writing values to it.
139 * Called always with i8042_lock held.
142 static int i8042_wait_read(void)
144 int i = 0;
145 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
146 udelay(50);
147 i++;
149 return -(i == I8042_CTL_TIMEOUT);
152 static int i8042_wait_write(void)
154 int i = 0;
155 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
156 udelay(50);
157 i++;
159 return -(i == I8042_CTL_TIMEOUT);
163 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
164 * of the i8042 down the toilet.
167 static int i8042_flush(void)
169 unsigned long flags;
170 unsigned char data, str;
171 int i = 0;
173 spin_lock_irqsave(&i8042_lock, flags);
175 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
176 udelay(50);
177 data = i8042_read_data();
178 i++;
179 dbg("%02x <- i8042 (flush, %s)", data,
180 str & I8042_STR_AUXDATA ? "aux" : "kbd");
183 spin_unlock_irqrestore(&i8042_lock, flags);
185 return i;
189 * i8042_command() executes a command on the i8042. It also sends the input
190 * parameter(s) of the commands to it, and receives the output value(s). The
191 * parameters are to be stored in the param array, and the output is placed
192 * into the same array. The number of the parameters and output values is
193 * encoded in bits 8-11 of the command number.
196 static int i8042_command(unsigned char *param, int command)
198 unsigned long flags;
199 int i, retval, auxerr = 0;
201 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
202 return -1;
204 spin_lock_irqsave(&i8042_lock, flags);
206 if ((retval = i8042_wait_write()))
207 goto out;
209 dbg("%02x -> i8042 (command)", command & 0xff);
210 i8042_write_command(command & 0xff);
212 for (i = 0; i < ((command >> 12) & 0xf); i++) {
213 if ((retval = i8042_wait_write()))
214 goto out;
215 dbg("%02x -> i8042 (parameter)", param[i]);
216 i8042_write_data(param[i]);
219 for (i = 0; i < ((command >> 8) & 0xf); i++) {
220 if ((retval = i8042_wait_read()))
221 goto out;
223 if (command == I8042_CMD_AUX_LOOP &&
224 !(i8042_read_status() & I8042_STR_AUXDATA)) {
225 retval = auxerr = -1;
226 goto out;
229 param[i] = i8042_read_data();
230 dbg("%02x <- i8042 (return)", param[i]);
233 if (retval)
234 dbg(" -- i8042 (%s)", auxerr ? "auxerr" : "timeout");
236 out:
237 spin_unlock_irqrestore(&i8042_lock, flags);
238 return retval;
242 * i8042_kbd_write() sends a byte out through the keyboard interface.
245 static int i8042_kbd_write(struct serio *port, unsigned char c)
247 unsigned long flags;
248 int retval = 0;
250 spin_lock_irqsave(&i8042_lock, flags);
252 if(!(retval = i8042_wait_write())) {
253 dbg("%02x -> i8042 (kbd-data)", c);
254 i8042_write_data(c);
257 spin_unlock_irqrestore(&i8042_lock, flags);
259 return retval;
263 * i8042_aux_write() sends a byte out through the aux interface.
266 static int i8042_aux_write(struct serio *serio, unsigned char c)
268 struct i8042_port *port = serio->port_data;
269 int retval;
272 * Send the byte out.
275 if (port->mux == -1)
276 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
277 else
278 retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux);
281 * Make sure the interrupt happens and the character is received even
282 * in the case the IRQ isn't wired, so that we can receive further
283 * characters later.
286 i8042_interrupt(0, NULL, NULL);
287 return retval;
291 * i8042_activate_port() enables port on a chip.
294 static int i8042_activate_port(struct i8042_port *port)
296 if (!port->serio)
297 return -1;
299 i8042_flush();
302 * Enable port again here because it is disabled if we are
303 * resuming (normally it is enabled already).
305 i8042_ctr &= ~port->disable;
307 i8042_ctr |= port->irqen;
309 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
310 i8042_ctr &= ~port->irqen;
311 return -1;
314 return 0;
319 * i8042_open() is called when a port is open by the higher layer.
320 * It allocates the interrupt and calls i8042_enable_port.
323 static int i8042_open(struct serio *serio)
325 struct i8042_port *port = serio->port_data;
327 if (port->mux != -1)
328 if (i8042_mux_open++)
329 return 0;
331 if (request_irq(port->irq, i8042_interrupt,
332 SA_SHIRQ, "i8042", i8042_request_irq_cookie)) {
333 printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", port->irq, port->name);
334 goto irq_fail;
337 if (i8042_activate_port(port)) {
338 printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", port->name);
339 goto activate_fail;
342 i8042_interrupt(0, NULL, NULL);
344 return 0;
346 activate_fail:
347 free_irq(port->irq, i8042_request_irq_cookie);
349 irq_fail:
350 serio_unregister_port_delayed(serio);
352 return -1;
356 * i8042_close() frees the interrupt, so that it can possibly be used
357 * by another driver. We never know - if the user doesn't have a mouse,
358 * the BIOS could have used the AUX interrupt for PCI.
361 static void i8042_close(struct serio *serio)
363 struct i8042_port *port = serio->port_data;
365 if (port->mux != -1)
366 if (--i8042_mux_open)
367 return;
369 i8042_ctr &= ~port->irqen;
371 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
372 printk(KERN_WARNING "i8042.c: Can't write CTR while closing %s.\n", port->name);
374 * We still want to continue and free IRQ so if more data keeps coming in
375 * kernel will just ignore the irq.
379 free_irq(port->irq, i8042_request_irq_cookie);
381 i8042_flush();
385 * i8042_start() is called by serio core when port is about to finish
386 * registering. It will mark port as existing so i8042_interrupt can
387 * start sending data through it.
389 static int i8042_start(struct serio *serio)
391 struct i8042_port *port = serio->port_data;
393 port->exists = 1;
394 mb();
395 return 0;
399 * i8042_stop() marks serio port as non-existing so i8042_interrupt
400 * will not try to send data to the port that is about to go away.
401 * The function is called by serio core as part of unregister procedure.
403 static void i8042_stop(struct serio *serio)
405 struct i8042_port *port = serio->port_data;
407 port->exists = 0;
408 synchronize_sched();
409 port->serio = NULL;
413 * i8042_interrupt() is the most important function in this driver -
414 * it handles the interrupts from the i8042, and sends incoming bytes
415 * to the upper layers.
418 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
420 struct i8042_port *port;
421 unsigned long flags;
422 unsigned char str, data;
423 unsigned int dfl;
424 unsigned int port_no;
425 int ret;
427 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
429 spin_lock_irqsave(&i8042_lock, flags);
430 str = i8042_read_status();
431 if (unlikely(~str & I8042_STR_OBF)) {
432 spin_unlock_irqrestore(&i8042_lock, flags);
433 if (irq) dbg("Interrupt %d, without any data", irq);
434 ret = 0;
435 goto out;
437 data = i8042_read_data();
438 spin_unlock_irqrestore(&i8042_lock, flags);
440 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
441 static unsigned long last_transmit;
442 static unsigned char last_str;
444 dfl = 0;
445 if (str & I8042_STR_MUXERR) {
446 dbg("MUX error, status is %02x, data is %02x", str, data);
447 switch (data) {
448 default:
450 * When MUXERR condition is signalled the data register can only contain
451 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
452 * it is not always the case. Some KBC just get confused which port the
453 * data came from and signal error leaving the data intact. They _do not_
454 * revert to legacy mode (actually I've never seen KBC reverting to legacy
455 * mode yet, when we see one we'll add proper handling).
456 * Anyway, we will assume that the data came from the same serio last byte
457 * was transmitted (if transmission happened not too long ago).
459 if (time_before(jiffies, last_transmit + HZ/10)) {
460 str = last_str;
461 break;
463 /* fall through - report timeout */
464 case 0xfd:
465 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
466 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
470 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
471 last_str = str;
472 last_transmit = jiffies;
473 } else {
475 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
476 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
478 port_no = (str & I8042_STR_AUXDATA) ?
479 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
482 port = &i8042_ports[port_no];
484 dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
485 data, port->name, irq,
486 dfl & SERIO_PARITY ? ", bad parity" : "",
487 dfl & SERIO_TIMEOUT ? ", timeout" : "");
489 if (likely(port->exists))
490 serio_interrupt(port->serio, data, dfl, regs);
492 ret = 1;
493 out:
494 return IRQ_RETVAL(ret);
498 * i8042_set_mux_mode checks whether the controller has an active
499 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
502 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
505 unsigned char param;
507 * Get rid of bytes in the queue.
510 i8042_flush();
513 * Internal loopback test - send three bytes, they should come back from the
514 * mouse interface, the last should be version. Note that we negate mouseport
515 * command responses for the i8042_check_aux() routine.
518 param = 0xf0;
519 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
520 return -1;
521 param = mode ? 0x56 : 0xf6;
522 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
523 return -1;
524 param = mode ? 0xa4 : 0xa5;
525 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
526 return -1;
528 if (mux_version)
529 *mux_version = param;
531 return 0;
536 * i8042_enable_mux_ports enables 4 individual AUX ports after
537 * the controller has been switched into Multiplexed mode
540 static int i8042_enable_mux_ports(void)
542 unsigned char param;
543 int i;
545 * Disable all muxed ports by disabling AUX.
548 i8042_ctr |= I8042_CTR_AUXDIS;
549 i8042_ctr &= ~I8042_CTR_AUXINT;
551 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
552 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
553 return -1;
557 * Enable all muxed ports.
560 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
561 i8042_command(&param, I8042_CMD_MUX_PFX + i);
562 i8042_command(&param, I8042_CMD_AUX_ENABLE);
565 return 0;
570 * i8042_check_mux() checks whether the controller supports the PS/2 Active
571 * Multiplexing specification by Synaptics, Phoenix, Insyde and
572 * LCS/Telegraphics.
575 static int __devinit i8042_check_mux(void)
577 unsigned char mux_version;
579 if (i8042_set_mux_mode(1, &mux_version))
580 return -1;
582 /* Workaround for interference with USB Legacy emulation */
583 /* that causes a v10.12 MUX to be found. */
584 if (mux_version == 0xAC)
585 return -1;
587 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
588 (mux_version >> 4) & 0xf, mux_version & 0xf);
590 if (i8042_enable_mux_ports())
591 return -1;
593 i8042_mux_present = 1;
594 return 0;
599 * i8042_check_aux() applies as much paranoia as it can at detecting
600 * the presence of an AUX interface.
603 static int __devinit i8042_check_aux(void)
605 unsigned char param;
606 static int i8042_check_aux_cookie;
609 * Check if AUX irq is available. If it isn't, then there is no point
610 * in trying to detect AUX presence.
613 if (request_irq(i8042_ports[I8042_AUX_PORT_NO].irq, i8042_interrupt,
614 SA_SHIRQ, "i8042", &i8042_check_aux_cookie))
615 return -1;
616 free_irq(i8042_ports[I8042_AUX_PORT_NO].irq, &i8042_check_aux_cookie);
619 * Get rid of bytes in the queue.
622 i8042_flush();
625 * Internal loopback test - filters out AT-type i8042's. Unfortunately
626 * SiS screwed up and their 5597 doesn't support the LOOP command even
627 * though it has an AUX port.
630 param = 0x5a;
631 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0x5a) {
634 * External connection test - filters out AT-soldered PS/2 i8042's
635 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
636 * 0xfa - no error on some notebooks which ignore the spec
637 * Because it's common for chipsets to return error on perfectly functioning
638 * AUX ports, we test for this only when the LOOP command failed.
641 if (i8042_command(&param, I8042_CMD_AUX_TEST)
642 || (param && param != 0xfa && param != 0xff))
643 return -1;
647 * Bit assignment test - filters out PS/2 i8042's in AT mode
650 if (i8042_command(&param, I8042_CMD_AUX_DISABLE))
651 return -1;
652 if (i8042_command(&param, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
653 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
654 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
657 if (i8042_command(&param, I8042_CMD_AUX_ENABLE))
658 return -1;
659 if (i8042_command(&param, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
660 return -1;
663 * Disable the interface.
666 i8042_ctr |= I8042_CTR_AUXDIS;
667 i8042_ctr &= ~I8042_CTR_AUXINT;
669 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
670 return -1;
672 return 0;
677 * i8042_port_register() marks the device as existing,
678 * registers it, and reports to the user.
681 static int __devinit i8042_port_register(struct i8042_port *port)
683 i8042_ctr &= ~port->disable;
685 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
686 printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
687 kfree(port->serio);
688 port->serio = NULL;
689 i8042_ctr |= port->disable;
690 return -EIO;
693 printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
694 port->name,
695 (unsigned long) I8042_DATA_REG,
696 (unsigned long) I8042_COMMAND_REG,
697 port->irq);
699 serio_register_port(port->serio);
701 return 0;
705 static void i8042_timer_func(unsigned long data)
707 i8042_interrupt(0, NULL, NULL);
710 static int i8042_ctl_test(void)
712 unsigned char param;
714 if (!i8042_reset)
715 return 0;
717 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
718 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
719 return -1;
722 if (param != I8042_RET_CTL_TEST) {
723 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
724 param, I8042_RET_CTL_TEST);
725 return -1;
728 return 0;
732 * i8042_controller init initializes the i8042 controller, and,
733 * most importantly, sets it into non-xlated mode if that's
734 * desired.
737 static int i8042_controller_init(void)
739 unsigned long flags;
742 * Test the i8042. We need to know if it thinks it's working correctly
743 * before doing anything else.
746 if (i8042_flush() == I8042_BUFFER_SIZE) {
747 printk(KERN_ERR "i8042.c: No controller found.\n");
748 return -1;
751 if (i8042_ctl_test())
752 return -1;
755 * Save the CTR for restoral on unload / reboot.
758 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
759 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
760 return -1;
763 i8042_initial_ctr = i8042_ctr;
766 * Disable the keyboard interface and interrupt.
769 i8042_ctr |= I8042_CTR_KBDDIS;
770 i8042_ctr &= ~I8042_CTR_KBDINT;
773 * Handle keylock.
776 spin_lock_irqsave(&i8042_lock, flags);
777 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
778 if (i8042_unlock)
779 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
780 else
781 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
783 spin_unlock_irqrestore(&i8042_lock, flags);
786 * If the chip is configured into nontranslated mode by the BIOS, don't
787 * bother enabling translating and be happy.
790 if (~i8042_ctr & I8042_CTR_XLATE)
791 i8042_direct = 1;
794 * Set nontranslated mode for the kbd interface if requested by an option.
795 * After this the kbd interface becomes a simple serial in/out, like the aux
796 * interface is. We don't do this by default, since it can confuse notebook
797 * BIOSes.
800 if (i8042_direct)
801 i8042_ctr &= ~I8042_CTR_XLATE;
804 * Write CTR back.
807 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
808 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
809 return -1;
812 return 0;
817 * Reset the controller.
819 static void i8042_controller_reset(void)
822 * Reset the controller if requested.
825 i8042_ctl_test();
828 * Disable MUX mode if present.
831 if (i8042_mux_present)
832 i8042_set_mux_mode(0, NULL);
835 * Restore the original control register setting.
838 i8042_ctr = i8042_initial_ctr;
840 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
841 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
846 * Here we try to reset everything back to a state in which the BIOS will be
847 * able to talk to the hardware when rebooting.
850 static void i8042_controller_cleanup(void)
852 int i;
854 i8042_flush();
857 * Reset anything that is connected to the ports.
860 for (i = 0; i < I8042_NUM_PORTS; i++)
861 if (i8042_ports[i].exists)
862 serio_cleanup(i8042_ports[i].serio);
864 i8042_controller_reset();
869 * i8042_panic_blink() will flash the keyboard LEDs and is called when
870 * kernel panics. Flashing LEDs is useful for users running X who may
871 * not see the console and will help distingushing panics from "real"
872 * lockups.
874 * Note that DELAY has a limit of 10ms so we will not get stuck here
875 * waiting for KBC to free up even if KBD interrupt is off
878 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
880 static long i8042_panic_blink(long count)
882 long delay = 0;
883 static long last_blink;
884 static char led;
887 * We expect frequency to be about 1/2s. KDB uses about 1s.
888 * Make sure they are different.
890 if (!i8042_blink_frequency)
891 return 0;
892 if (count - last_blink < i8042_blink_frequency)
893 return 0;
895 led ^= 0x01 | 0x04;
896 while (i8042_read_status() & I8042_STR_IBF)
897 DELAY;
898 i8042_write_data(0xed); /* set leds */
899 DELAY;
900 while (i8042_read_status() & I8042_STR_IBF)
901 DELAY;
902 DELAY;
903 i8042_write_data(led);
904 DELAY;
905 last_blink = count;
906 return delay;
909 #undef DELAY
912 * Here we try to restore the original BIOS settings
915 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
917 del_timer_sync(&i8042_timer);
918 i8042_controller_reset();
920 return 0;
925 * Here we try to reset everything back to a state in which suspended
928 static int i8042_resume(struct platform_device *dev)
930 int i;
932 if (i8042_ctl_test())
933 return -1;
935 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
936 printk(KERN_ERR "i8042: Can't write CTR\n");
937 return -1;
940 if (i8042_mux_present)
941 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
942 printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
945 * Activate all ports.
948 for (i = 0; i < I8042_NUM_PORTS; i++)
949 i8042_activate_port(&i8042_ports[i]);
952 * Restart timer (for polling "stuck" data)
954 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
956 panic_blink = i8042_panic_blink;
958 return 0;
962 * We need to reset the 8042 back to original mode on system shutdown,
963 * because otherwise BIOSes will be confused.
966 static void i8042_shutdown(struct platform_device *dev)
968 i8042_controller_cleanup();
971 static int __devinit i8042_create_kbd_port(void)
973 struct serio *serio;
974 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
976 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
977 if (!serio)
978 return -ENOMEM;
980 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
981 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
982 serio->open = i8042_open;
983 serio->close = i8042_close;
984 serio->start = i8042_start;
985 serio->stop = i8042_stop;
986 serio->port_data = port;
987 serio->dev.parent = &i8042_platform_device->dev;
988 strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
989 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
991 port->serio = serio;
993 return i8042_port_register(port);
996 static int __devinit i8042_create_aux_port(void)
998 struct serio *serio;
999 struct i8042_port *port = &i8042_ports[I8042_AUX_PORT_NO];
1001 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1002 if (!serio)
1003 return -ENOMEM;
1005 serio->id.type = SERIO_8042;
1006 serio->write = i8042_aux_write;
1007 serio->open = i8042_open;
1008 serio->close = i8042_close;
1009 serio->start = i8042_start;
1010 serio->stop = i8042_stop;
1011 serio->port_data = port;
1012 serio->dev.parent = &i8042_platform_device->dev;
1013 strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
1014 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1016 port->serio = serio;
1018 return i8042_port_register(port);
1021 static int __devinit i8042_create_mux_port(int index)
1023 struct serio *serio;
1024 struct i8042_port *port = &i8042_ports[I8042_MUX_PORT_NO + index];
1026 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1027 if (!serio)
1028 return -ENOMEM;
1030 serio->id.type = SERIO_8042;
1031 serio->write = i8042_aux_write;
1032 serio->open = i8042_open;
1033 serio->close = i8042_close;
1034 serio->start = i8042_start;
1035 serio->stop = i8042_stop;
1036 serio->port_data = port;
1037 serio->dev.parent = &i8042_platform_device->dev;
1038 snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
1039 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
1041 *port = i8042_ports[I8042_AUX_PORT_NO];
1042 port->exists = 0;
1043 snprintf(port->name, sizeof(port->name), "AUX%d", index);
1044 port->mux = index;
1045 port->serio = serio;
1047 return i8042_port_register(port);
1050 static int __devinit i8042_probe(struct platform_device *dev)
1052 int i, have_ports = 0;
1053 int err;
1055 init_timer(&i8042_timer);
1056 i8042_timer.function = i8042_timer_func;
1058 if (i8042_controller_init())
1059 return -ENODEV;
1061 if (!i8042_noaux && !i8042_check_aux()) {
1062 if (!i8042_nomux && !i8042_check_mux()) {
1063 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1064 err = i8042_create_mux_port(i);
1065 if (err)
1066 goto err_unregister_ports;
1068 } else {
1069 err = i8042_create_aux_port();
1070 if (err)
1071 goto err_unregister_ports;
1073 have_ports = 1;
1076 if (!i8042_nokbd) {
1077 err = i8042_create_kbd_port();
1078 if (err)
1079 goto err_unregister_ports;
1080 have_ports = 1;
1083 if (!have_ports) {
1084 err = -ENODEV;
1085 goto err_controller_cleanup;
1088 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
1089 return 0;
1091 err_unregister_ports:
1092 for (i = 0; i < I8042_NUM_PORTS; i++)
1093 if (i8042_ports[i].serio)
1094 serio_unregister_port(i8042_ports[i].serio);
1095 err_controller_cleanup:
1096 i8042_controller_cleanup();
1098 return err;
1101 static int __devexit i8042_remove(struct platform_device *dev)
1103 int i;
1105 i8042_controller_cleanup();
1107 for (i = 0; i < I8042_NUM_PORTS; i++)
1108 if (i8042_ports[i].exists)
1109 serio_unregister_port(i8042_ports[i].serio);
1111 del_timer_sync(&i8042_timer);
1113 return 0;
1116 static struct platform_driver i8042_driver = {
1117 .driver = {
1118 .name = "i8042",
1119 .owner = THIS_MODULE,
1121 .probe = i8042_probe,
1122 .remove = __devexit_p(i8042_remove),
1123 .suspend = i8042_suspend,
1124 .resume = i8042_resume,
1125 .shutdown = i8042_shutdown,
1128 static int __init i8042_init(void)
1130 int err;
1132 dbg_init();
1134 err = i8042_platform_init();
1135 if (err)
1136 return err;
1138 i8042_ports[I8042_AUX_PORT_NO].irq = I8042_AUX_IRQ;
1139 i8042_ports[I8042_KBD_PORT_NO].irq = I8042_KBD_IRQ;
1141 err = platform_driver_register(&i8042_driver);
1142 if (err)
1143 goto err_platform_exit;
1145 i8042_platform_device = platform_device_alloc("i8042", -1);
1146 if (!i8042_platform_device) {
1147 err = -ENOMEM;
1148 goto err_unregister_driver;
1151 err = platform_device_add(i8042_platform_device);
1152 if (err)
1153 goto err_free_device;
1155 return 0;
1157 err_free_device:
1158 platform_device_put(i8042_platform_device);
1159 err_unregister_driver:
1160 platform_driver_unregister(&i8042_driver);
1161 err_platform_exit:
1162 i8042_platform_exit();
1164 return err;
1167 static void __exit i8042_exit(void)
1169 platform_device_unregister(i8042_platform_device);
1170 platform_driver_unregister(&i8042_driver);
1172 i8042_platform_exit();
1174 panic_blink = NULL;
1177 module_init(i8042_init);
1178 module_exit(i8042_exit);