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Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / mmc / pxamci.c
blobb49368fd96b82b051d59fe85ec00c9127ca05390
1 /*
2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
14 * Yuck!
15 *
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
18 */
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/protocol.h>
29
30 #include <asm/dma.h>
31 #include <asm/io.h>
32 #include <asm/scatterlist.h>
33 #include <asm/sizes.h>
34
35 #include <asm/arch/pxa-regs.h>
36 #include <asm/arch/mmc.h>
37
38 #include "pxamci.h"
39
40 #define DRIVER_NAME "pxa2xx-mci"
41
42 #define NR_SG 1
43
44 struct pxamci_host {
45 struct mmc_host *mmc;
46 spinlock_t lock;
47 struct resource *res;
48 void __iomem *base;
49 int irq;
50 int dma;
51 unsigned int clkrt;
52 unsigned int cmdat;
53 unsigned int imask;
54 unsigned int power_mode;
55 struct pxamci_platform_data *pdata;
56
57 struct mmc_request *mrq;
58 struct mmc_command *cmd;
59 struct mmc_data *data;
60
61 dma_addr_t sg_dma;
62 struct pxa_dma_desc *sg_cpu;
63 unsigned int dma_len;
64
65 unsigned int dma_dir;
66 };
67
68 static void pxamci_stop_clock(struct pxamci_host *host)
69 {
70 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
71 unsigned long timeout = 10000;
72 unsigned int v;
73
74 writel(STOP_CLOCK, host->base + MMC_STRPCL);
75
76 do {
77 v = readl(host->base + MMC_STAT);
78 if (!(v & STAT_CLK_EN))
79 break;
80 udelay(1);
81 } while (timeout--);
82
83 if (v & STAT_CLK_EN)
84 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
85 }
86 }
87
88 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
89 {
90 unsigned long flags;
91
92 spin_lock_irqsave(&host->lock, flags);
93 host->imask &= ~mask;
94 writel(host->imask, host->base + MMC_I_MASK);
95 spin_unlock_irqrestore(&host->lock, flags);
96 }
97
98 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
99 {
100 unsigned long flags;
101
102 spin_lock_irqsave(&host->lock, flags);
103 host->imask |= mask;
104 writel(host->imask, host->base + MMC_I_MASK);
105 spin_unlock_irqrestore(&host->lock, flags);
106 }
107
108 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
109 {
110 unsigned int nob = data->blocks;
111 unsigned long long clks;
112 unsigned int timeout;
113 u32 dcmd;
114 int i;
115
116 host->data = data;
117
118 if (data->flags & MMC_DATA_STREAM)
119 nob = 0xffff;
120
121 writel(nob, host->base + MMC_NOB);
122 writel(data->blksz, host->base + MMC_BLKLEN);
123
124 clks = (unsigned long long)data->timeout_ns * CLOCKRATE;
125 do_div(clks, 1000000000UL);
126 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
127 writel((timeout + 255) / 256, host->base + MMC_RDTO);
128
129 if (data->flags & MMC_DATA_READ) {
130 host->dma_dir = DMA_FROM_DEVICE;
131 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
132 DRCMRTXMMC = 0;
133 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
134 } else {
135 host->dma_dir = DMA_TO_DEVICE;
136 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
137 DRCMRRXMMC = 0;
138 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
139 }
140
141 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
142
143 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
144 host->dma_dir);
145
146 for (i = 0; i < host->dma_len; i++) {
147 if (data->flags & MMC_DATA_READ) {
148 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
149 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
150 } else {
151 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
152 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
153 }
154 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
155 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
156 sizeof(struct pxa_dma_desc);
157 }
158 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
159 wmb();
160
161 DDADR(host->dma) = host->sg_dma;
162 DCSR(host->dma) = DCSR_RUN;
163 }
164
165 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
166 {
167 WARN_ON(host->cmd != NULL);
168 host->cmd = cmd;
169
170 if (cmd->flags & MMC_RSP_BUSY)
171 cmdat |= CMDAT_BUSY;
172
173 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
174 switch (RSP_TYPE(mmc_resp_type(cmd))) {
175 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6 */
176 cmdat |= CMDAT_RESP_SHORT;
177 break;
178 case RSP_TYPE(MMC_RSP_R3):
179 cmdat |= CMDAT_RESP_R3;
180 break;
181 case RSP_TYPE(MMC_RSP_R2):
182 cmdat |= CMDAT_RESP_R2;
183 break;
184 default:
185 break;
186 }
187
188 writel(cmd->opcode, host->base + MMC_CMD);
189 writel(cmd->arg >> 16, host->base + MMC_ARGH);
190 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
191 writel(cmdat, host->base + MMC_CMDAT);
192 writel(host->clkrt, host->base + MMC_CLKRT);
193
194 writel(START_CLOCK, host->base + MMC_STRPCL);
195
196 pxamci_enable_irq(host, END_CMD_RES);
197 }
198
199 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
200 {
201 host->mrq = NULL;
202 host->cmd = NULL;
203 host->data = NULL;
204 mmc_request_done(host->mmc, mrq);
205 }
206
207 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
208 {
209 struct mmc_command *cmd = host->cmd;
210 int i;
211 u32 v;
212
213 if (!cmd)
214 return 0;
215
216 host->cmd = NULL;
217
218 /*
219 * Did I mention this is Sick. We always need to
220 * discard the upper 8 bits of the first 16-bit word.
221 */
222 v = readl(host->base + MMC_RES) & 0xffff;
223 for (i = 0; i < 4; i++) {
224 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
225 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
226 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
227 v = w2;
228 }
229
230 if (stat & STAT_TIME_OUT_RESPONSE) {
231 cmd->error = MMC_ERR_TIMEOUT;
232 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
233 #ifdef CONFIG_PXA27x
234 /*
235 * workaround for erratum #42:
236 * Intel PXA27x Family Processor Specification Update Rev 001
237 */
238 if (cmd->opcode == MMC_ALL_SEND_CID ||
239 cmd->opcode == MMC_SEND_CSD ||
240 cmd->opcode == MMC_SEND_CID) {
241 /* a bogus CRC error can appear if the msb of
242 the 15 byte response is a one */
243 if ((cmd->resp[0] & 0x80000000) == 0)
244 cmd->error = MMC_ERR_BADCRC;
245 } else {
246 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
247 }
248 #else
249 cmd->error = MMC_ERR_BADCRC;
250 #endif
251 }
252
253 pxamci_disable_irq(host, END_CMD_RES);
254 if (host->data && cmd->error == MMC_ERR_NONE) {
255 pxamci_enable_irq(host, DATA_TRAN_DONE);
256 } else {
257 pxamci_finish_request(host, host->mrq);
258 }
259
260 return 1;
261 }
262
263 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
264 {
265 struct mmc_data *data = host->data;
266
267 if (!data)
268 return 0;
269
270 DCSR(host->dma) = 0;
271 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
272 host->dma_dir);
273
274 if (stat & STAT_READ_TIME_OUT)
275 data->error = MMC_ERR_TIMEOUT;
276 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
277 data->error = MMC_ERR_BADCRC;
278
279 /*
280 * There appears to be a hardware design bug here. There seems to
281 * be no way to find out how much data was transferred to the card.
282 * This means that if there was an error on any block, we mark all
283 * data blocks as being in error.
284 */
285 if (data->error == MMC_ERR_NONE)
286 data->bytes_xfered = data->blocks * data->blksz;
287 else
288 data->bytes_xfered = 0;
289
290 pxamci_disable_irq(host, DATA_TRAN_DONE);
291
292 host->data = NULL;
293 if (host->mrq->stop) {
294 pxamci_stop_clock(host);
295 pxamci_start_cmd(host, host->mrq->stop, 0);
296 } else {
297 pxamci_finish_request(host, host->mrq);
298 }
299
300 return 1;
301 }
302
303 static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
304 {
305 struct pxamci_host *host = devid;
306 unsigned int ireg;
307 int handled = 0;
308
309 ireg = readl(host->base + MMC_I_REG);
310
311 if (ireg) {
312 unsigned stat = readl(host->base + MMC_STAT);
313
314 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
315
316 if (ireg & END_CMD_RES)
317 handled |= pxamci_cmd_done(host, stat);
318 if (ireg & DATA_TRAN_DONE)
319 handled |= pxamci_data_done(host, stat);
320 }
321
322 return IRQ_RETVAL(handled);
323 }
324
325 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
326 {
327 struct pxamci_host *host = mmc_priv(mmc);
328 unsigned int cmdat;
329
330 WARN_ON(host->mrq != NULL);
331
332 host->mrq = mrq;
333
334 pxamci_stop_clock(host);
335
336 cmdat = host->cmdat;
337 host->cmdat &= ~CMDAT_INIT;
338
339 if (mrq->data) {
340 pxamci_setup_data(host, mrq->data);
341
342 cmdat &= ~CMDAT_BUSY;
343 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
344 if (mrq->data->flags & MMC_DATA_WRITE)
345 cmdat |= CMDAT_WRITE;
346
347 if (mrq->data->flags & MMC_DATA_STREAM)
348 cmdat |= CMDAT_STREAM;
349 }
350
351 pxamci_start_cmd(host, mrq->cmd, cmdat);
352 }
353
354 static int pxamci_get_ro(struct mmc_host *mmc)
355 {
356 struct pxamci_host *host = mmc_priv(mmc);
357
358 if (host->pdata && host->pdata->get_ro)
359 return host->pdata->get_ro(mmc->dev);
360 /* Host doesn't support read only detection so assume writeable */
361 return 0;
362 }
363
364 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
365 {
366 struct pxamci_host *host = mmc_priv(mmc);
367
368 if (ios->clock) {
369 unsigned int clk = CLOCKRATE / ios->clock;
370 if (CLOCKRATE / clk > ios->clock)
371 clk <<= 1;
372 host->clkrt = fls(clk) - 1;
373 pxa_set_cken(CKEN12_MMC, 1);
374
375 /*
376 * we write clkrt on the next command
377 */
378 } else {
379 pxamci_stop_clock(host);
380 pxa_set_cken(CKEN12_MMC, 0);
381 }
382
383 if (host->power_mode != ios->power_mode) {
384 host->power_mode = ios->power_mode;
385
386 if (host->pdata && host->pdata->setpower)
387 host->pdata->setpower(mmc->dev, ios->vdd);
388
389 if (ios->power_mode == MMC_POWER_ON)
390 host->cmdat |= CMDAT_INIT;
391 }
392
393 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
394 host->clkrt, host->cmdat);
395 }
396
397 static struct mmc_host_ops pxamci_ops = {
398 .request = pxamci_request,
399 .get_ro = pxamci_get_ro,
400 .set_ios = pxamci_set_ios,
401 };
402
403 static void pxamci_dma_irq(int dma, void *devid, struct pt_regs *regs)
404 {
405 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
406 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
407 }
408
409 static irqreturn_t pxamci_detect_irq(int irq, void *devid, struct pt_regs *regs)
410 {
411 struct pxamci_host *host = mmc_priv(devid);
412
413 mmc_detect_change(devid, host->pdata->detect_delay);
414 return IRQ_HANDLED;
415 }
416
417 static int pxamci_probe(struct platform_device *pdev)
418 {
419 struct mmc_host *mmc;
420 struct pxamci_host *host = NULL;
421 struct resource *r;
422 int ret, irq;
423
424 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
425 irq = platform_get_irq(pdev, 0);
426 if (!r || irq < 0)
427 return -ENXIO;
428
429 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
430 if (!r)
431 return -EBUSY;
432
433 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
434 if (!mmc) {
435 ret = -ENOMEM;
436 goto out;
437 }
438
439 mmc->ops = &pxamci_ops;
440 mmc->f_min = CLOCKRATE_MIN;
441 mmc->f_max = CLOCKRATE_MAX;
442
443 /*
444 * We can do SG-DMA, but we don't because we never know how much
445 * data we successfully wrote to the card.
446 */
447 mmc->max_phys_segs = NR_SG;
448
449 /*
450 * Our hardware DMA can handle a maximum of one page per SG entry.
451 */
452 mmc->max_seg_size = PAGE_SIZE;
453
454 host = mmc_priv(mmc);
455 host->mmc = mmc;
456 host->dma = -1;
457 host->pdata = pdev->dev.platform_data;
458 mmc->ocr_avail = host->pdata ?
459 host->pdata->ocr_mask :
460 MMC_VDD_32_33|MMC_VDD_33_34;
461
462 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
463 if (!host->sg_cpu) {
464 ret = -ENOMEM;
465 goto out;
466 }
467
468 spin_lock_init(&host->lock);
469 host->res = r;
470 host->irq = irq;
471 host->imask = MMC_I_MASK_ALL;
472
473 host->base = ioremap(r->start, SZ_4K);
474 if (!host->base) {
475 ret = -ENOMEM;
476 goto out;
477 }
478
479 /*
480 * Ensure that the host controller is shut down, and setup
481 * with our defaults.
482 */
483 pxamci_stop_clock(host);
484 writel(0, host->base + MMC_SPI);
485 writel(64, host->base + MMC_RESTO);
486 writel(host->imask, host->base + MMC_I_MASK);
487
488 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
489 pxamci_dma_irq, host);
490 if (host->dma < 0) {
491 ret = -EBUSY;
492 goto out;
493 }
494
495 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
496 if (ret)
497 goto out;
498
499 platform_set_drvdata(pdev, mmc);
500
501 if (host->pdata && host->pdata->init)
502 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
503
504 mmc_add_host(mmc);
505
506 return 0;
507
508 out:
509 if (host) {
510 if (host->dma >= 0)
511 pxa_free_dma(host->dma);
512 if (host->base)
513 iounmap(host->base);
514 if (host->sg_cpu)
515 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
516 }
517 if (mmc)
518 mmc_free_host(mmc);
519 release_resource(r);
520 return ret;
521 }
522
523 static int pxamci_remove(struct platform_device *pdev)
524 {
525 struct mmc_host *mmc = platform_get_drvdata(pdev);
526
527 platform_set_drvdata(pdev, NULL);
528
529 if (mmc) {
530 struct pxamci_host *host = mmc_priv(mmc);
531
532 if (host->pdata && host->pdata->exit)
533 host->pdata->exit(&pdev->dev, mmc);
534
535 mmc_remove_host(mmc);
536
537 pxamci_stop_clock(host);
538 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
539 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
540 host->base + MMC_I_MASK);
541
542 DRCMRRXMMC = 0;
543 DRCMRTXMMC = 0;
544
545 free_irq(host->irq, host);
546 pxa_free_dma(host->dma);
547 iounmap(host->base);
548 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
549
550 release_resource(host->res);
551
552 mmc_free_host(mmc);
553 }
554 return 0;
555 }
556
557 #ifdef CONFIG_PM
558 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
559 {
560 struct mmc_host *mmc = platform_get_drvdata(dev);
561 int ret = 0;
562
563 if (mmc)
564 ret = mmc_suspend_host(mmc, state);
565
566 return ret;
567 }
568
569 static int pxamci_resume(struct platform_device *dev)
570 {
571 struct mmc_host *mmc = platform_get_drvdata(dev);
572 int ret = 0;
573
574 if (mmc)
575 ret = mmc_resume_host(mmc);
576
577 return ret;
578 }
579 #else
580 #define pxamci_suspend NULL
581 #define pxamci_resume NULL
582 #endif
583
584 static struct platform_driver pxamci_driver = {
585 .probe = pxamci_probe,
586 .remove = pxamci_remove,
587 .suspend = pxamci_suspend,
588 .resume = pxamci_resume,
589 .driver = {
590 .name = DRIVER_NAME,
591 },
592 };
593
594 static int __init pxamci_init(void)
595 {
596 return platform_driver_register(&pxamci_driver);
597 }
598
599 static void __exit pxamci_exit(void)
600 {
601 platform_driver_unregister(&pxamci_driver);
602 }
603
604 module_init(pxamci_init);
605 module_exit(pxamci_exit);
606
607 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
608 MODULE_LICENSE("GPL");
Linux with added FPC-III support