drivers/mmc/pxamci.h

   1 #undef MMC_STRPCL
   2 #undef MMC_STAT
   3 #undef MMC_CLKRT
   4 #undef MMC_SPI
   5 #undef MMC_CMDAT
   6 #undef MMC_RESTO
   7 #undef MMC_RDTO
   8 #undef MMC_BLKLEN
   9 #undef MMC_NOB
  10 #undef MMC_PRTBUF
  11 #undef MMC_I_MASK
  12 #undef END_CMD_RES
  13 #undef PRG_DONE
  14 #undef DATA_TRAN_DONE
  15 #undef MMC_I_REG
  16 #undef MMC_CMD
  17 #undef MMC_ARGH
  18 #undef MMC_ARGL
  19 #undef MMC_RES
  20 #undef MMC_RXFIFO
  21 #undef MMC_TXFIFO
  22
  23 #define MMC_STRPCL      0x0000
  24 #define STOP_CLOCK              (1 << 0)
  25 #define START_CLOCK             (2 << 0)
  26
  27 #define MMC_STAT        0x0004
  28 #define STAT_END_CMD_RES                (1 << 13)
  29 #define STAT_PRG_DONE                   (1 << 12)
  30 #define STAT_DATA_TRAN_DONE             (1 << 11)
  31 #define STAT_CLK_EN                     (1 << 8)
  32 #define STAT_RECV_FIFO_FULL             (1 << 7)
  33 #define STAT_XMIT_FIFO_EMPTY            (1 << 6)
  34 #define STAT_RES_CRC_ERR                (1 << 5)
  35 #define STAT_SPI_READ_ERROR_TOKEN       (1 << 4)
  36 #define STAT_CRC_READ_ERROR             (1 << 3)
  37 #define STAT_CRC_WRITE_ERROR            (1 << 2)
  38 #define STAT_TIME_OUT_RESPONSE          (1 << 1)
  39 #define STAT_READ_TIME_OUT              (1 << 0)
  40
  41 #define MMC_CLKRT       0x0008          /* 3 bit */
  42
  43 #define MMC_SPI         0x000c
  44 #define SPI_CS_ADDRESS          (1 << 3)
  45 #define SPI_CS_EN               (1 << 2)
  46 #define CRC_ON                  (1 << 1)
  47 #define SPI_EN                  (1 << 0)
  48
  49 #define MMC_CMDAT       0x0010
  50 #define CMDAT_DMAEN             (1 << 7)
  51 #define CMDAT_INIT              (1 << 6)
  52 #define CMDAT_BUSY              (1 << 5)
  53 #define CMDAT_STREAM            (1 << 4)        /* 1 = stream */
  54 #define CMDAT_WRITE             (1 << 3)        /* 1 = write */
  55 #define CMDAT_DATAEN            (1 << 2)
  56 #define CMDAT_RESP_NONE         (0 << 0)
  57 #define CMDAT_RESP_SHORT        (1 << 0)
  58 #define CMDAT_RESP_R2           (2 << 0)
  59 #define CMDAT_RESP_R3           (3 << 0)
  60
  61 #define MMC_RESTO       0x0014  /* 7 bit */
  62
  63 #define MMC_RDTO        0x0018  /* 16 bit */
  64
  65 #define MMC_BLKLEN      0x001c  /* 10 bit */
  66
  67 #define MMC_NOB         0x0020  /* 16 bit */
  68
  69 #define MMC_PRTBUF      0x0024
  70 #define BUF_PART_FULL           (1 << 0)
  71
  72 #define MMC_I_MASK      0x0028
  73
  74 /*PXA27x MMC interrupts*/
  75 #define SDIO_SUSPEND_ACK        (1 << 12)
  76 #define SDIO_INT                (1 << 11)
  77 #define RD_STALLED              (1 << 10)
  78 #define RES_ERR                 (1 << 9)
  79 #define DAT_ERR                 (1 << 8)
  80 #define TINT                    (1 << 7)
  81
  82 /*PXA2xx MMC interrupts*/
  83 #define TXFIFO_WR_REQ           (1 << 6)
  84 #define RXFIFO_RD_REQ           (1 << 5)
  85 #define CLK_IS_OFF              (1 << 4)
  86 #define STOP_CMD                (1 << 3)
  87 #define END_CMD_RES             (1 << 2)
  88 #define PRG_DONE                (1 << 1)
  89 #define DATA_TRAN_DONE          (1 << 0)
  90
  91 #ifdef CONFIG_PXA27x
  92 #define MMC_I_MASK_ALL          0x00001fff
  93 #else
  94 #define MMC_I_MASK_ALL          0x0000007f
  95 #endif
  96
  97 #define MMC_I_REG       0x002c
  98 /* same as MMC_I_MASK */
  99
 100 #define MMC_CMD         0x0030
 101
 102 #define MMC_ARGH        0x0034  /* 16 bit */
 103
 104 #define MMC_ARGL        0x0038  /* 16 bit */
 105
 106 #define MMC_RES         0x003c  /* 16 bit */
 107
 108 #define MMC_RXFIFO      0x0040  /* 8 bit */
 109
 110 #define MMC_TXFIFO      0x0044  /* 8 bit */
 111
 112 /*
 113  * The base MMC clock rate
 114  */
 115 #ifdef CONFIG_PXA27x
 116 #define CLOCKRATE_MIN   304688
 117 #define CLOCKRATE_MAX   19500000
 118 #else
 119 #define CLOCKRATE_MIN   312500
 120 #define CLOCKRATE_MAX   20000000
 121 #endif
 122
 123 #define CLOCKRATE       CLOCKRATE_MAX
 124