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[linux/fpc-iii.git] / drivers / net / smc91x.c
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1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/platform_device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
90 #include <asm/io.h>
92 #include "smc91x.h"
94 #ifdef CONFIG_ISA
96 * the LAN91C111 can be at any of the following port addresses. To change,
97 * for a slightly different card, you can add it to the array. Keep in
98 * mind that the array must end in zero.
100 static unsigned int smc_portlist[] __initdata = {
101 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
102 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 #ifndef SMC_IOADDR
106 # define SMC_IOADDR -1
107 #endif
108 static unsigned long io = SMC_IOADDR;
109 module_param(io, ulong, 0400);
110 MODULE_PARM_DESC(io, "I/O base address");
112 #ifndef SMC_IRQ
113 # define SMC_IRQ -1
114 #endif
115 static int irq = SMC_IRQ;
116 module_param(irq, int, 0400);
117 MODULE_PARM_DESC(irq, "IRQ number");
119 #endif /* CONFIG_ISA */
121 #ifndef SMC_NOWAIT
122 # define SMC_NOWAIT 0
123 #endif
124 static int nowait = SMC_NOWAIT;
125 module_param(nowait, int, 0400);
126 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
129 * Transmit timeout, default 5 seconds.
131 static int watchdog = 1000;
132 module_param(watchdog, int, 0400);
133 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135 MODULE_LICENSE("GPL");
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
142 #define CARDNAME "smc91x"
145 * Use power-down feature of the chip
147 #define POWER_DOWN 1
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
152 * in the system
154 #define MEMORY_WAIT_TIME 16
157 * The maximum number of processing loops allowed for each call to the
158 * IRQ handler.
160 #define MAX_IRQ_LOOPS 8
163 * This selects whether TX packets are sent one by one to the SMC91x internal
164 * memory and throttled until transmission completes. This may prevent
165 * RX overruns a litle by keeping much of the memory free for RX packets
166 * but to the expense of reduced TX throughput and increased IRQ overhead.
167 * Note this is not a cure for a too slow data bus or too high IRQ latency.
169 #define THROTTLE_TX_PKTS 0
172 * The MII clock high/low times. 2x this number gives the MII clock period
173 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
175 #define MII_DELAY 1
177 /* store this information for the driver.. */
178 struct smc_local {
180 * If I have to wait until memory is available to send a
181 * packet, I will store the skbuff here, until I get the
182 * desired memory. Then, I'll send it out and free it.
184 struct sk_buff *pending_tx_skb;
185 struct tasklet_struct tx_task;
188 * these are things that the kernel wants me to keep, so users
189 * can find out semi-useless statistics of how well the card is
190 * performing
192 struct net_device_stats stats;
194 /* version/revision of the SMC91x chip */
195 int version;
197 /* Contains the current active transmission mode */
198 int tcr_cur_mode;
200 /* Contains the current active receive mode */
201 int rcr_cur_mode;
203 /* Contains the current active receive/phy mode */
204 int rpc_cur_mode;
205 int ctl_rfduplx;
206 int ctl_rspeed;
208 u32 msg_enable;
209 u32 phy_type;
210 struct mii_if_info mii;
212 /* work queue */
213 struct work_struct phy_configure;
214 int work_pending;
216 spinlock_t lock;
218 #ifdef SMC_USE_PXA_DMA
219 /* DMA needs the physical address of the chip */
220 u_long physaddr;
221 #endif
222 void __iomem *base;
223 void __iomem *datacs;
226 #if SMC_DEBUG > 0
227 #define DBG(n, args...) \
228 do { \
229 if (SMC_DEBUG >= (n)) \
230 printk(args); \
231 } while (0)
233 #define PRINTK(args...) printk(args)
234 #else
235 #define DBG(n, args...) do { } while(0)
236 #define PRINTK(args...) printk(KERN_DEBUG args)
237 #endif
239 #if SMC_DEBUG > 3
240 static void PRINT_PKT(u_char *buf, int length)
242 int i;
243 int remainder;
244 int lines;
246 lines = length / 16;
247 remainder = length % 16;
249 for (i = 0; i < lines ; i ++) {
250 int cur;
251 for (cur = 0; cur < 8; cur++) {
252 u_char a, b;
253 a = *buf++;
254 b = *buf++;
255 printk("%02x%02x ", a, b);
257 printk("\n");
259 for (i = 0; i < remainder/2 ; i++) {
260 u_char a, b;
261 a = *buf++;
262 b = *buf++;
263 printk("%02x%02x ", a, b);
265 printk("\n");
267 #else
268 #define PRINT_PKT(x...) do { } while(0)
269 #endif
272 /* this enables an interrupt in the interrupt mask register */
273 #define SMC_ENABLE_INT(x) do { \
274 unsigned char mask; \
275 spin_lock_irq(&lp->lock); \
276 mask = SMC_GET_INT_MASK(); \
277 mask |= (x); \
278 SMC_SET_INT_MASK(mask); \
279 spin_unlock_irq(&lp->lock); \
280 } while (0)
282 /* this disables an interrupt from the interrupt mask register */
283 #define SMC_DISABLE_INT(x) do { \
284 unsigned char mask; \
285 spin_lock_irq(&lp->lock); \
286 mask = SMC_GET_INT_MASK(); \
287 mask &= ~(x); \
288 SMC_SET_INT_MASK(mask); \
289 spin_unlock_irq(&lp->lock); \
290 } while (0)
293 * Wait while MMU is busy. This is usually in the order of a few nanosecs
294 * if at all, but let's avoid deadlocking the system if the hardware
295 * decides to go south.
297 #define SMC_WAIT_MMU_BUSY() do { \
298 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
299 unsigned long timeout = jiffies + 2; \
300 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
301 if (time_after(jiffies, timeout)) { \
302 printk("%s: timeout %s line %d\n", \
303 dev->name, __FILE__, __LINE__); \
304 break; \
306 cpu_relax(); \
309 } while (0)
313 * this does a soft reset on the device
315 static void smc_reset(struct net_device *dev)
317 struct smc_local *lp = netdev_priv(dev);
318 void __iomem *ioaddr = lp->base;
319 unsigned int ctl, cfg;
320 struct sk_buff *pending_skb;
322 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
324 /* Disable all interrupts, block TX tasklet */
325 spin_lock(&lp->lock);
326 SMC_SELECT_BANK(2);
327 SMC_SET_INT_MASK(0);
328 pending_skb = lp->pending_tx_skb;
329 lp->pending_tx_skb = NULL;
330 spin_unlock(&lp->lock);
332 /* free any pending tx skb */
333 if (pending_skb) {
334 dev_kfree_skb(pending_skb);
335 lp->stats.tx_errors++;
336 lp->stats.tx_aborted_errors++;
340 * This resets the registers mostly to defaults, but doesn't
341 * affect EEPROM. That seems unnecessary
343 SMC_SELECT_BANK(0);
344 SMC_SET_RCR(RCR_SOFTRST);
347 * Setup the Configuration Register
348 * This is necessary because the CONFIG_REG is not affected
349 * by a soft reset
351 SMC_SELECT_BANK(1);
353 cfg = CONFIG_DEFAULT;
356 * Setup for fast accesses if requested. If the card/system
357 * can't handle it then there will be no recovery except for
358 * a hard reset or power cycle
360 if (nowait)
361 cfg |= CONFIG_NO_WAIT;
364 * Release from possible power-down state
365 * Configuration register is not affected by Soft Reset
367 cfg |= CONFIG_EPH_POWER_EN;
369 SMC_SET_CONFIG(cfg);
371 /* this should pause enough for the chip to be happy */
373 * elaborate? What does the chip _need_? --jgarzik
375 * This seems to be undocumented, but something the original
376 * driver(s) have always done. Suspect undocumented timing
377 * info/determined empirically. --rmk
379 udelay(1);
381 /* Disable transmit and receive functionality */
382 SMC_SELECT_BANK(0);
383 SMC_SET_RCR(RCR_CLEAR);
384 SMC_SET_TCR(TCR_CLEAR);
386 SMC_SELECT_BANK(1);
387 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
390 * Set the control register to automatically release successfully
391 * transmitted packets, to make the best use out of our limited
392 * memory
394 if(!THROTTLE_TX_PKTS)
395 ctl |= CTL_AUTO_RELEASE;
396 else
397 ctl &= ~CTL_AUTO_RELEASE;
398 SMC_SET_CTL(ctl);
400 /* Reset the MMU */
401 SMC_SELECT_BANK(2);
402 SMC_SET_MMU_CMD(MC_RESET);
403 SMC_WAIT_MMU_BUSY();
407 * Enable Interrupts, Receive, and Transmit
409 static void smc_enable(struct net_device *dev)
411 struct smc_local *lp = netdev_priv(dev);
412 void __iomem *ioaddr = lp->base;
413 int mask;
415 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
417 /* see the header file for options in TCR/RCR DEFAULT */
418 SMC_SELECT_BANK(0);
419 SMC_SET_TCR(lp->tcr_cur_mode);
420 SMC_SET_RCR(lp->rcr_cur_mode);
422 SMC_SELECT_BANK(1);
423 SMC_SET_MAC_ADDR(dev->dev_addr);
425 /* now, enable interrupts */
426 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
427 if (lp->version >= (CHIP_91100 << 4))
428 mask |= IM_MDINT;
429 SMC_SELECT_BANK(2);
430 SMC_SET_INT_MASK(mask);
433 * From this point the register bank must _NOT_ be switched away
434 * to something else than bank 2 without proper locking against
435 * races with any tasklet or interrupt handlers until smc_shutdown()
436 * or smc_reset() is called.
441 * this puts the device in an inactive state
443 static void smc_shutdown(struct net_device *dev)
445 struct smc_local *lp = netdev_priv(dev);
446 void __iomem *ioaddr = lp->base;
447 struct sk_buff *pending_skb;
449 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
451 /* no more interrupts for me */
452 spin_lock(&lp->lock);
453 SMC_SELECT_BANK(2);
454 SMC_SET_INT_MASK(0);
455 pending_skb = lp->pending_tx_skb;
456 lp->pending_tx_skb = NULL;
457 spin_unlock(&lp->lock);
458 if (pending_skb)
459 dev_kfree_skb(pending_skb);
461 /* and tell the card to stay away from that nasty outside world */
462 SMC_SELECT_BANK(0);
463 SMC_SET_RCR(RCR_CLEAR);
464 SMC_SET_TCR(TCR_CLEAR);
466 #ifdef POWER_DOWN
467 /* finally, shut the chip down */
468 SMC_SELECT_BANK(1);
469 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
470 #endif
474 * This is the procedure to handle the receipt of a packet.
476 static inline void smc_rcv(struct net_device *dev)
478 struct smc_local *lp = netdev_priv(dev);
479 void __iomem *ioaddr = lp->base;
480 unsigned int packet_number, status, packet_len;
482 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
484 packet_number = SMC_GET_RXFIFO();
485 if (unlikely(packet_number & RXFIFO_REMPTY)) {
486 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
487 return;
490 /* read from start of packet */
491 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
493 /* First two words are status and packet length */
494 SMC_GET_PKT_HDR(status, packet_len);
495 packet_len &= 0x07ff; /* mask off top bits */
496 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
497 dev->name, packet_number, status,
498 packet_len, packet_len);
500 back:
501 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
502 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
503 /* accept VLAN packets */
504 status &= ~RS_TOOLONG;
505 goto back;
507 if (packet_len < 6) {
508 /* bloody hardware */
509 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
510 dev->name, packet_len, status);
511 status |= RS_TOOSHORT;
513 SMC_WAIT_MMU_BUSY();
514 SMC_SET_MMU_CMD(MC_RELEASE);
515 lp->stats.rx_errors++;
516 if (status & RS_ALGNERR)
517 lp->stats.rx_frame_errors++;
518 if (status & (RS_TOOSHORT | RS_TOOLONG))
519 lp->stats.rx_length_errors++;
520 if (status & RS_BADCRC)
521 lp->stats.rx_crc_errors++;
522 } else {
523 struct sk_buff *skb;
524 unsigned char *data;
525 unsigned int data_len;
527 /* set multicast stats */
528 if (status & RS_MULTICAST)
529 lp->stats.multicast++;
532 * Actual payload is packet_len - 6 (or 5 if odd byte).
533 * We want skb_reserve(2) and the final ctrl word
534 * (2 bytes, possibly containing the payload odd byte).
535 * Furthermore, we add 2 bytes to allow rounding up to
536 * multiple of 4 bytes on 32 bit buses.
537 * Hence packet_len - 6 + 2 + 2 + 2.
539 skb = dev_alloc_skb(packet_len);
540 if (unlikely(skb == NULL)) {
541 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
542 dev->name);
543 SMC_WAIT_MMU_BUSY();
544 SMC_SET_MMU_CMD(MC_RELEASE);
545 lp->stats.rx_dropped++;
546 return;
549 /* Align IP header to 32 bits */
550 skb_reserve(skb, 2);
552 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
553 if (lp->version == 0x90)
554 status |= RS_ODDFRAME;
557 * If odd length: packet_len - 5,
558 * otherwise packet_len - 6.
559 * With the trailing ctrl byte it's packet_len - 4.
561 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
562 data = skb_put(skb, data_len);
563 SMC_PULL_DATA(data, packet_len - 4);
565 SMC_WAIT_MMU_BUSY();
566 SMC_SET_MMU_CMD(MC_RELEASE);
568 PRINT_PKT(data, packet_len - 4);
570 dev->last_rx = jiffies;
571 skb->dev = dev;
572 skb->protocol = eth_type_trans(skb, dev);
573 netif_rx(skb);
574 lp->stats.rx_packets++;
575 lp->stats.rx_bytes += data_len;
579 #ifdef CONFIG_SMP
581 * On SMP we have the following problem:
583 * A = smc_hardware_send_pkt()
584 * B = smc_hard_start_xmit()
585 * C = smc_interrupt()
587 * A and B can never be executed simultaneously. However, at least on UP,
588 * it is possible (and even desirable) for C to interrupt execution of
589 * A or B in order to have better RX reliability and avoid overruns.
590 * C, just like A and B, must have exclusive access to the chip and
591 * each of them must lock against any other concurrent access.
592 * Unfortunately this is not possible to have C suspend execution of A or
593 * B taking place on another CPU. On UP this is no an issue since A and B
594 * are run from softirq context and C from hard IRQ context, and there is
595 * no other CPU where concurrent access can happen.
596 * If ever there is a way to force at least B and C to always be executed
597 * on the same CPU then we could use read/write locks to protect against
598 * any other concurrent access and C would always interrupt B. But life
599 * isn't that easy in a SMP world...
601 #define smc_special_trylock(lock) \
602 ({ \
603 int __ret; \
604 local_irq_disable(); \
605 __ret = spin_trylock(lock); \
606 if (!__ret) \
607 local_irq_enable(); \
608 __ret; \
610 #define smc_special_lock(lock) spin_lock_irq(lock)
611 #define smc_special_unlock(lock) spin_unlock_irq(lock)
612 #else
613 #define smc_special_trylock(lock) (1)
614 #define smc_special_lock(lock) do { } while (0)
615 #define smc_special_unlock(lock) do { } while (0)
616 #endif
619 * This is called to actually send a packet to the chip.
621 static void smc_hardware_send_pkt(unsigned long data)
623 struct net_device *dev = (struct net_device *)data;
624 struct smc_local *lp = netdev_priv(dev);
625 void __iomem *ioaddr = lp->base;
626 struct sk_buff *skb;
627 unsigned int packet_no, len;
628 unsigned char *buf;
630 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
632 if (!smc_special_trylock(&lp->lock)) {
633 netif_stop_queue(dev);
634 tasklet_schedule(&lp->tx_task);
635 return;
638 skb = lp->pending_tx_skb;
639 if (unlikely(!skb)) {
640 smc_special_unlock(&lp->lock);
641 return;
643 lp->pending_tx_skb = NULL;
645 packet_no = SMC_GET_AR();
646 if (unlikely(packet_no & AR_FAILED)) {
647 printk("%s: Memory allocation failed.\n", dev->name);
648 lp->stats.tx_errors++;
649 lp->stats.tx_fifo_errors++;
650 smc_special_unlock(&lp->lock);
651 goto done;
654 /* point to the beginning of the packet */
655 SMC_SET_PN(packet_no);
656 SMC_SET_PTR(PTR_AUTOINC);
658 buf = skb->data;
659 len = skb->len;
660 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
661 dev->name, packet_no, len, len, buf);
662 PRINT_PKT(buf, len);
665 * Send the packet length (+6 for status words, length, and ctl.
666 * The card will pad to 64 bytes with zeroes if packet is too small.
668 SMC_PUT_PKT_HDR(0, len + 6);
670 /* send the actual data */
671 SMC_PUSH_DATA(buf, len & ~1);
673 /* Send final ctl word with the last byte if there is one */
674 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
677 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
678 * have the effect of having at most one packet queued for TX
679 * in the chip's memory at all time.
681 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
682 * when memory allocation (MC_ALLOC) does not succeed right away.
684 if (THROTTLE_TX_PKTS)
685 netif_stop_queue(dev);
687 /* queue the packet for TX */
688 SMC_SET_MMU_CMD(MC_ENQUEUE);
689 smc_special_unlock(&lp->lock);
691 dev->trans_start = jiffies;
692 lp->stats.tx_packets++;
693 lp->stats.tx_bytes += len;
695 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
697 done: if (!THROTTLE_TX_PKTS)
698 netif_wake_queue(dev);
700 dev_kfree_skb(skb);
704 * Since I am not sure if I will have enough room in the chip's ram
705 * to store the packet, I call this routine which either sends it
706 * now, or set the card to generates an interrupt when ready
707 * for the packet.
709 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
711 struct smc_local *lp = netdev_priv(dev);
712 void __iomem *ioaddr = lp->base;
713 unsigned int numPages, poll_count, status;
715 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
717 BUG_ON(lp->pending_tx_skb != NULL);
720 * The MMU wants the number of pages to be the number of 256 bytes
721 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
723 * The 91C111 ignores the size bits, but earlier models don't.
725 * Pkt size for allocating is data length +6 (for additional status
726 * words, length and ctl)
728 * If odd size then last byte is included in ctl word.
730 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
731 if (unlikely(numPages > 7)) {
732 printk("%s: Far too big packet error.\n", dev->name);
733 lp->stats.tx_errors++;
734 lp->stats.tx_dropped++;
735 dev_kfree_skb(skb);
736 return 0;
739 smc_special_lock(&lp->lock);
741 /* now, try to allocate the memory */
742 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
745 * Poll the chip for a short amount of time in case the
746 * allocation succeeds quickly.
748 poll_count = MEMORY_WAIT_TIME;
749 do {
750 status = SMC_GET_INT();
751 if (status & IM_ALLOC_INT) {
752 SMC_ACK_INT(IM_ALLOC_INT);
753 break;
755 } while (--poll_count);
757 smc_special_unlock(&lp->lock);
759 lp->pending_tx_skb = skb;
760 if (!poll_count) {
761 /* oh well, wait until the chip finds memory later */
762 netif_stop_queue(dev);
763 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
764 SMC_ENABLE_INT(IM_ALLOC_INT);
765 } else {
767 * Allocation succeeded: push packet to the chip's own memory
768 * immediately.
770 smc_hardware_send_pkt((unsigned long)dev);
773 return 0;
777 * This handles a TX interrupt, which is only called when:
778 * - a TX error occurred, or
779 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
781 static void smc_tx(struct net_device *dev)
783 struct smc_local *lp = netdev_priv(dev);
784 void __iomem *ioaddr = lp->base;
785 unsigned int saved_packet, packet_no, tx_status, pkt_len;
787 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
789 /* If the TX FIFO is empty then nothing to do */
790 packet_no = SMC_GET_TXFIFO();
791 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
792 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
793 return;
796 /* select packet to read from */
797 saved_packet = SMC_GET_PN();
798 SMC_SET_PN(packet_no);
800 /* read the first word (status word) from this packet */
801 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
802 SMC_GET_PKT_HDR(tx_status, pkt_len);
803 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
804 dev->name, tx_status, packet_no);
806 if (!(tx_status & ES_TX_SUC))
807 lp->stats.tx_errors++;
809 if (tx_status & ES_LOSTCARR)
810 lp->stats.tx_carrier_errors++;
812 if (tx_status & (ES_LATCOL | ES_16COL)) {
813 PRINTK("%s: %s occurred on last xmit\n", dev->name,
814 (tx_status & ES_LATCOL) ?
815 "late collision" : "too many collisions");
816 lp->stats.tx_window_errors++;
817 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
818 printk(KERN_INFO "%s: unexpectedly large number of "
819 "bad collisions. Please check duplex "
820 "setting.\n", dev->name);
824 /* kill the packet */
825 SMC_WAIT_MMU_BUSY();
826 SMC_SET_MMU_CMD(MC_FREEPKT);
828 /* Don't restore Packet Number Reg until busy bit is cleared */
829 SMC_WAIT_MMU_BUSY();
830 SMC_SET_PN(saved_packet);
832 /* re-enable transmit */
833 SMC_SELECT_BANK(0);
834 SMC_SET_TCR(lp->tcr_cur_mode);
835 SMC_SELECT_BANK(2);
839 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
841 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
843 struct smc_local *lp = netdev_priv(dev);
844 void __iomem *ioaddr = lp->base;
845 unsigned int mii_reg, mask;
847 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
848 mii_reg |= MII_MDOE;
850 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
851 if (val & mask)
852 mii_reg |= MII_MDO;
853 else
854 mii_reg &= ~MII_MDO;
856 SMC_SET_MII(mii_reg);
857 udelay(MII_DELAY);
858 SMC_SET_MII(mii_reg | MII_MCLK);
859 udelay(MII_DELAY);
863 static unsigned int smc_mii_in(struct net_device *dev, int bits)
865 struct smc_local *lp = netdev_priv(dev);
866 void __iomem *ioaddr = lp->base;
867 unsigned int mii_reg, mask, val;
869 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
870 SMC_SET_MII(mii_reg);
872 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
873 if (SMC_GET_MII() & MII_MDI)
874 val |= mask;
876 SMC_SET_MII(mii_reg);
877 udelay(MII_DELAY);
878 SMC_SET_MII(mii_reg | MII_MCLK);
879 udelay(MII_DELAY);
882 return val;
886 * Reads a register from the MII Management serial interface
888 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
890 struct smc_local *lp = netdev_priv(dev);
891 void __iomem *ioaddr = lp->base;
892 unsigned int phydata;
894 SMC_SELECT_BANK(3);
896 /* Idle - 32 ones */
897 smc_mii_out(dev, 0xffffffff, 32);
899 /* Start code (01) + read (10) + phyaddr + phyreg */
900 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
902 /* Turnaround (2bits) + phydata */
903 phydata = smc_mii_in(dev, 18);
905 /* Return to idle state */
906 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
908 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
909 __FUNCTION__, phyaddr, phyreg, phydata);
911 SMC_SELECT_BANK(2);
912 return phydata;
916 * Writes a register to the MII Management serial interface
918 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
919 int phydata)
921 struct smc_local *lp = netdev_priv(dev);
922 void __iomem *ioaddr = lp->base;
924 SMC_SELECT_BANK(3);
926 /* Idle - 32 ones */
927 smc_mii_out(dev, 0xffffffff, 32);
929 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
930 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
932 /* Return to idle state */
933 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
935 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
936 __FUNCTION__, phyaddr, phyreg, phydata);
938 SMC_SELECT_BANK(2);
942 * Finds and reports the PHY address
944 static void smc_phy_detect(struct net_device *dev)
946 struct smc_local *lp = netdev_priv(dev);
947 int phyaddr;
949 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
951 lp->phy_type = 0;
954 * Scan all 32 PHY addresses if necessary, starting at
955 * PHY#1 to PHY#31, and then PHY#0 last.
957 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
958 unsigned int id1, id2;
960 /* Read the PHY identifiers */
961 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
962 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
964 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
965 dev->name, id1, id2);
967 /* Make sure it is a valid identifier */
968 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
969 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
970 /* Save the PHY's address */
971 lp->mii.phy_id = phyaddr & 31;
972 lp->phy_type = id1 << 16 | id2;
973 break;
979 * Sets the PHY to a configuration as determined by the user
981 static int smc_phy_fixed(struct net_device *dev)
983 struct smc_local *lp = netdev_priv(dev);
984 void __iomem *ioaddr = lp->base;
985 int phyaddr = lp->mii.phy_id;
986 int bmcr, cfg1;
988 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
990 /* Enter Link Disable state */
991 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
992 cfg1 |= PHY_CFG1_LNKDIS;
993 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
996 * Set our fixed capabilities
997 * Disable auto-negotiation
999 bmcr = 0;
1001 if (lp->ctl_rfduplx)
1002 bmcr |= BMCR_FULLDPLX;
1004 if (lp->ctl_rspeed == 100)
1005 bmcr |= BMCR_SPEED100;
1007 /* Write our capabilities to the phy control register */
1008 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1010 /* Re-Configure the Receive/Phy Control register */
1011 SMC_SELECT_BANK(0);
1012 SMC_SET_RPC(lp->rpc_cur_mode);
1013 SMC_SELECT_BANK(2);
1015 return 1;
1019 * smc_phy_reset - reset the phy
1020 * @dev: net device
1021 * @phy: phy address
1023 * Issue a software reset for the specified PHY and
1024 * wait up to 100ms for the reset to complete. We should
1025 * not access the PHY for 50ms after issuing the reset.
1027 * The time to wait appears to be dependent on the PHY.
1029 * Must be called with lp->lock locked.
1031 static int smc_phy_reset(struct net_device *dev, int phy)
1033 struct smc_local *lp = netdev_priv(dev);
1034 unsigned int bmcr;
1035 int timeout;
1037 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1039 for (timeout = 2; timeout; timeout--) {
1040 spin_unlock_irq(&lp->lock);
1041 msleep(50);
1042 spin_lock_irq(&lp->lock);
1044 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1045 if (!(bmcr & BMCR_RESET))
1046 break;
1049 return bmcr & BMCR_RESET;
1053 * smc_phy_powerdown - powerdown phy
1054 * @dev: net device
1056 * Power down the specified PHY
1058 static void smc_phy_powerdown(struct net_device *dev)
1060 struct smc_local *lp = netdev_priv(dev);
1061 unsigned int bmcr;
1062 int phy = lp->mii.phy_id;
1064 if (lp->phy_type == 0)
1065 return;
1067 /* We need to ensure that no calls to smc_phy_configure are
1068 pending.
1070 flush_scheduled_work() cannot be called because we are
1071 running with the netlink semaphore held (from
1072 devinet_ioctl()) and the pending work queue contains
1073 linkwatch_event() (scheduled by netif_carrier_off()
1074 above). linkwatch_event() also wants the netlink semaphore.
1076 while(lp->work_pending)
1077 yield();
1079 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1080 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1084 * smc_phy_check_media - check the media status and adjust TCR
1085 * @dev: net device
1086 * @init: set true for initialisation
1088 * Select duplex mode depending on negotiation state. This
1089 * also updates our carrier state.
1091 static void smc_phy_check_media(struct net_device *dev, int init)
1093 struct smc_local *lp = netdev_priv(dev);
1094 void __iomem *ioaddr = lp->base;
1096 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1097 /* duplex state has changed */
1098 if (lp->mii.full_duplex) {
1099 lp->tcr_cur_mode |= TCR_SWFDUP;
1100 } else {
1101 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1104 SMC_SELECT_BANK(0);
1105 SMC_SET_TCR(lp->tcr_cur_mode);
1110 * Configures the specified PHY through the MII management interface
1111 * using Autonegotiation.
1112 * Calls smc_phy_fixed() if the user has requested a certain config.
1113 * If RPC ANEG bit is set, the media selection is dependent purely on
1114 * the selection by the MII (either in the MII BMCR reg or the result
1115 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1116 * is controlled by the RPC SPEED and RPC DPLX bits.
1118 static void smc_phy_configure(void *data)
1120 struct net_device *dev = data;
1121 struct smc_local *lp = netdev_priv(dev);
1122 void __iomem *ioaddr = lp->base;
1123 int phyaddr = lp->mii.phy_id;
1124 int my_phy_caps; /* My PHY capabilities */
1125 int my_ad_caps; /* My Advertised capabilities */
1126 int status;
1128 DBG(3, "%s:smc_program_phy()\n", dev->name);
1130 spin_lock_irq(&lp->lock);
1133 * We should not be called if phy_type is zero.
1135 if (lp->phy_type == 0)
1136 goto smc_phy_configure_exit;
1138 if (smc_phy_reset(dev, phyaddr)) {
1139 printk("%s: PHY reset timed out\n", dev->name);
1140 goto smc_phy_configure_exit;
1144 * Enable PHY Interrupts (for register 18)
1145 * Interrupts listed here are disabled
1147 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1148 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1149 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1150 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1152 /* Configure the Receive/Phy Control register */
1153 SMC_SELECT_BANK(0);
1154 SMC_SET_RPC(lp->rpc_cur_mode);
1156 /* If the user requested no auto neg, then go set his request */
1157 if (lp->mii.force_media) {
1158 smc_phy_fixed(dev);
1159 goto smc_phy_configure_exit;
1162 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1163 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1165 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1166 printk(KERN_INFO "Auto negotiation NOT supported\n");
1167 smc_phy_fixed(dev);
1168 goto smc_phy_configure_exit;
1171 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1173 if (my_phy_caps & BMSR_100BASE4)
1174 my_ad_caps |= ADVERTISE_100BASE4;
1175 if (my_phy_caps & BMSR_100FULL)
1176 my_ad_caps |= ADVERTISE_100FULL;
1177 if (my_phy_caps & BMSR_100HALF)
1178 my_ad_caps |= ADVERTISE_100HALF;
1179 if (my_phy_caps & BMSR_10FULL)
1180 my_ad_caps |= ADVERTISE_10FULL;
1181 if (my_phy_caps & BMSR_10HALF)
1182 my_ad_caps |= ADVERTISE_10HALF;
1184 /* Disable capabilities not selected by our user */
1185 if (lp->ctl_rspeed != 100)
1186 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1188 if (!lp->ctl_rfduplx)
1189 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1191 /* Update our Auto-Neg Advertisement Register */
1192 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1193 lp->mii.advertising = my_ad_caps;
1196 * Read the register back. Without this, it appears that when
1197 * auto-negotiation is restarted, sometimes it isn't ready and
1198 * the link does not come up.
1200 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1202 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1203 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1205 /* Restart auto-negotiation process in order to advertise my caps */
1206 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1208 smc_phy_check_media(dev, 1);
1210 smc_phy_configure_exit:
1211 SMC_SELECT_BANK(2);
1212 spin_unlock_irq(&lp->lock);
1213 lp->work_pending = 0;
1217 * smc_phy_interrupt
1219 * Purpose: Handle interrupts relating to PHY register 18. This is
1220 * called from the "hard" interrupt handler under our private spinlock.
1222 static void smc_phy_interrupt(struct net_device *dev)
1224 struct smc_local *lp = netdev_priv(dev);
1225 int phyaddr = lp->mii.phy_id;
1226 int phy18;
1228 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1230 if (lp->phy_type == 0)
1231 return;
1233 for(;;) {
1234 smc_phy_check_media(dev, 0);
1236 /* Read PHY Register 18, Status Output */
1237 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1238 if ((phy18 & PHY_INT_INT) == 0)
1239 break;
1243 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1245 static void smc_10bt_check_media(struct net_device *dev, int init)
1247 struct smc_local *lp = netdev_priv(dev);
1248 void __iomem *ioaddr = lp->base;
1249 unsigned int old_carrier, new_carrier;
1251 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1253 SMC_SELECT_BANK(0);
1254 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1255 SMC_SELECT_BANK(2);
1257 if (init || (old_carrier != new_carrier)) {
1258 if (!new_carrier) {
1259 netif_carrier_off(dev);
1260 } else {
1261 netif_carrier_on(dev);
1263 if (netif_msg_link(lp))
1264 printk(KERN_INFO "%s: link %s\n", dev->name,
1265 new_carrier ? "up" : "down");
1269 static void smc_eph_interrupt(struct net_device *dev)
1271 struct smc_local *lp = netdev_priv(dev);
1272 void __iomem *ioaddr = lp->base;
1273 unsigned int ctl;
1275 smc_10bt_check_media(dev, 0);
1277 SMC_SELECT_BANK(1);
1278 ctl = SMC_GET_CTL();
1279 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1280 SMC_SET_CTL(ctl);
1281 SMC_SELECT_BANK(2);
1285 * This is the main routine of the driver, to handle the device when
1286 * it needs some attention.
1288 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1290 struct net_device *dev = dev_id;
1291 struct smc_local *lp = netdev_priv(dev);
1292 void __iomem *ioaddr = lp->base;
1293 int status, mask, timeout, card_stats;
1294 int saved_pointer;
1296 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1298 spin_lock(&lp->lock);
1300 /* A preamble may be used when there is a potential race
1301 * between the interruptible transmit functions and this
1302 * ISR. */
1303 SMC_INTERRUPT_PREAMBLE;
1305 saved_pointer = SMC_GET_PTR();
1306 mask = SMC_GET_INT_MASK();
1307 SMC_SET_INT_MASK(0);
1309 /* set a timeout value, so I don't stay here forever */
1310 timeout = MAX_IRQ_LOOPS;
1312 do {
1313 status = SMC_GET_INT();
1315 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1316 dev->name, status, mask,
1317 ({ int meminfo; SMC_SELECT_BANK(0);
1318 meminfo = SMC_GET_MIR();
1319 SMC_SELECT_BANK(2); meminfo; }),
1320 SMC_GET_FIFO());
1322 status &= mask;
1323 if (!status)
1324 break;
1326 if (status & IM_TX_INT) {
1327 /* do this before RX as it will free memory quickly */
1328 DBG(3, "%s: TX int\n", dev->name);
1329 smc_tx(dev);
1330 SMC_ACK_INT(IM_TX_INT);
1331 if (THROTTLE_TX_PKTS)
1332 netif_wake_queue(dev);
1333 } else if (status & IM_RCV_INT) {
1334 DBG(3, "%s: RX irq\n", dev->name);
1335 smc_rcv(dev);
1336 } else if (status & IM_ALLOC_INT) {
1337 DBG(3, "%s: Allocation irq\n", dev->name);
1338 tasklet_hi_schedule(&lp->tx_task);
1339 mask &= ~IM_ALLOC_INT;
1340 } else if (status & IM_TX_EMPTY_INT) {
1341 DBG(3, "%s: TX empty\n", dev->name);
1342 mask &= ~IM_TX_EMPTY_INT;
1344 /* update stats */
1345 SMC_SELECT_BANK(0);
1346 card_stats = SMC_GET_COUNTER();
1347 SMC_SELECT_BANK(2);
1349 /* single collisions */
1350 lp->stats.collisions += card_stats & 0xF;
1351 card_stats >>= 4;
1353 /* multiple collisions */
1354 lp->stats.collisions += card_stats & 0xF;
1355 } else if (status & IM_RX_OVRN_INT) {
1356 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1357 ({ int eph_st; SMC_SELECT_BANK(0);
1358 eph_st = SMC_GET_EPH_STATUS();
1359 SMC_SELECT_BANK(2); eph_st; }) );
1360 SMC_ACK_INT(IM_RX_OVRN_INT);
1361 lp->stats.rx_errors++;
1362 lp->stats.rx_fifo_errors++;
1363 } else if (status & IM_EPH_INT) {
1364 smc_eph_interrupt(dev);
1365 } else if (status & IM_MDINT) {
1366 SMC_ACK_INT(IM_MDINT);
1367 smc_phy_interrupt(dev);
1368 } else if (status & IM_ERCV_INT) {
1369 SMC_ACK_INT(IM_ERCV_INT);
1370 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1372 } while (--timeout);
1374 /* restore register states */
1375 SMC_SET_PTR(saved_pointer);
1376 SMC_SET_INT_MASK(mask);
1377 spin_unlock(&lp->lock);
1379 if (timeout == MAX_IRQ_LOOPS)
1380 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1381 dev->name, mask);
1382 DBG(3, "%s: Interrupt done (%d loops)\n",
1383 dev->name, MAX_IRQ_LOOPS - timeout);
1386 * We return IRQ_HANDLED unconditionally here even if there was
1387 * nothing to do. There is a possibility that a packet might
1388 * get enqueued into the chip right after TX_EMPTY_INT is raised
1389 * but just before the CPU acknowledges the IRQ.
1390 * Better take an unneeded IRQ in some occasions than complexifying
1391 * the code for all cases.
1393 return IRQ_HANDLED;
1396 #ifdef CONFIG_NET_POLL_CONTROLLER
1398 * Polling receive - used by netconsole and other diagnostic tools
1399 * to allow network i/o with interrupts disabled.
1401 static void smc_poll_controller(struct net_device *dev)
1403 disable_irq(dev->irq);
1404 smc_interrupt(dev->irq, dev, NULL);
1405 enable_irq(dev->irq);
1407 #endif
1409 /* Our watchdog timed out. Called by the networking layer */
1410 static void smc_timeout(struct net_device *dev)
1412 struct smc_local *lp = netdev_priv(dev);
1413 void __iomem *ioaddr = lp->base;
1414 int status, mask, eph_st, meminfo, fifo;
1416 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1418 spin_lock_irq(&lp->lock);
1419 status = SMC_GET_INT();
1420 mask = SMC_GET_INT_MASK();
1421 fifo = SMC_GET_FIFO();
1422 SMC_SELECT_BANK(0);
1423 eph_st = SMC_GET_EPH_STATUS();
1424 meminfo = SMC_GET_MIR();
1425 SMC_SELECT_BANK(2);
1426 spin_unlock_irq(&lp->lock);
1427 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1428 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1429 dev->name, status, mask, meminfo, fifo, eph_st );
1431 smc_reset(dev);
1432 smc_enable(dev);
1435 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1436 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1437 * which calls schedule(). Hence we use a work queue.
1439 if (lp->phy_type != 0) {
1440 if (schedule_work(&lp->phy_configure)) {
1441 lp->work_pending = 1;
1445 /* We can accept TX packets again */
1446 dev->trans_start = jiffies;
1447 netif_wake_queue(dev);
1451 * This routine will, depending on the values passed to it,
1452 * either make it accept multicast packets, go into
1453 * promiscuous mode (for TCPDUMP and cousins) or accept
1454 * a select set of multicast packets
1456 static void smc_set_multicast_list(struct net_device *dev)
1458 struct smc_local *lp = netdev_priv(dev);
1459 void __iomem *ioaddr = lp->base;
1460 unsigned char multicast_table[8];
1461 int update_multicast = 0;
1463 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1465 if (dev->flags & IFF_PROMISC) {
1466 DBG(2, "%s: RCR_PRMS\n", dev->name);
1467 lp->rcr_cur_mode |= RCR_PRMS;
1470 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1471 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1472 when promiscuous mode is turned on.
1476 * Here, I am setting this to accept all multicast packets.
1477 * I don't need to zero the multicast table, because the flag is
1478 * checked before the table is
1480 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1481 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1482 lp->rcr_cur_mode |= RCR_ALMUL;
1486 * This sets the internal hardware table to filter out unwanted
1487 * multicast packets before they take up memory.
1489 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1490 * address are the offset into the table. If that bit is 1, then the
1491 * multicast packet is accepted. Otherwise, it's dropped silently.
1493 * To use the 6 bits as an offset into the table, the high 3 bits are
1494 * the number of the 8 bit register, while the low 3 bits are the bit
1495 * within that register.
1497 else if (dev->mc_count) {
1498 int i;
1499 struct dev_mc_list *cur_addr;
1501 /* table for flipping the order of 3 bits */
1502 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1504 /* start with a table of all zeros: reject all */
1505 memset(multicast_table, 0, sizeof(multicast_table));
1507 cur_addr = dev->mc_list;
1508 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1509 int position;
1511 /* do we have a pointer here? */
1512 if (!cur_addr)
1513 break;
1514 /* make sure this is a multicast address -
1515 shouldn't this be a given if we have it here ? */
1516 if (!(*cur_addr->dmi_addr & 1))
1517 continue;
1519 /* only use the low order bits */
1520 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1522 /* do some messy swapping to put the bit in the right spot */
1523 multicast_table[invert3[position&7]] |=
1524 (1<<invert3[(position>>3)&7]);
1527 /* be sure I get rid of flags I might have set */
1528 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1530 /* now, the table can be loaded into the chipset */
1531 update_multicast = 1;
1532 } else {
1533 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1534 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1537 * since I'm disabling all multicast entirely, I need to
1538 * clear the multicast list
1540 memset(multicast_table, 0, sizeof(multicast_table));
1541 update_multicast = 1;
1544 spin_lock_irq(&lp->lock);
1545 SMC_SELECT_BANK(0);
1546 SMC_SET_RCR(lp->rcr_cur_mode);
1547 if (update_multicast) {
1548 SMC_SELECT_BANK(3);
1549 SMC_SET_MCAST(multicast_table);
1551 SMC_SELECT_BANK(2);
1552 spin_unlock_irq(&lp->lock);
1557 * Open and Initialize the board
1559 * Set up everything, reset the card, etc..
1561 static int
1562 smc_open(struct net_device *dev)
1564 struct smc_local *lp = netdev_priv(dev);
1566 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1569 * Check that the address is valid. If its not, refuse
1570 * to bring the device up. The user must specify an
1571 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1573 if (!is_valid_ether_addr(dev->dev_addr)) {
1574 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1575 return -EINVAL;
1578 /* Setup the default Register Modes */
1579 lp->tcr_cur_mode = TCR_DEFAULT;
1580 lp->rcr_cur_mode = RCR_DEFAULT;
1581 lp->rpc_cur_mode = RPC_DEFAULT;
1584 * If we are not using a MII interface, we need to
1585 * monitor our own carrier signal to detect faults.
1587 if (lp->phy_type == 0)
1588 lp->tcr_cur_mode |= TCR_MON_CSN;
1590 /* reset the hardware */
1591 smc_reset(dev);
1592 smc_enable(dev);
1594 /* Configure the PHY, initialize the link state */
1595 if (lp->phy_type != 0)
1596 smc_phy_configure(dev);
1597 else {
1598 spin_lock_irq(&lp->lock);
1599 smc_10bt_check_media(dev, 1);
1600 spin_unlock_irq(&lp->lock);
1603 netif_start_queue(dev);
1604 return 0;
1608 * smc_close
1610 * this makes the board clean up everything that it can
1611 * and not talk to the outside world. Caused by
1612 * an 'ifconfig ethX down'
1614 static int smc_close(struct net_device *dev)
1616 struct smc_local *lp = netdev_priv(dev);
1618 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1620 netif_stop_queue(dev);
1621 netif_carrier_off(dev);
1623 /* clear everything */
1624 smc_shutdown(dev);
1625 tasklet_kill(&lp->tx_task);
1626 smc_phy_powerdown(dev);
1627 return 0;
1631 * Get the current statistics.
1632 * This may be called with the card open or closed.
1634 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1636 struct smc_local *lp = netdev_priv(dev);
1638 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1640 return &lp->stats;
1644 * Ethtool support
1646 static int
1647 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1649 struct smc_local *lp = netdev_priv(dev);
1650 int ret;
1652 cmd->maxtxpkt = 1;
1653 cmd->maxrxpkt = 1;
1655 if (lp->phy_type != 0) {
1656 spin_lock_irq(&lp->lock);
1657 ret = mii_ethtool_gset(&lp->mii, cmd);
1658 spin_unlock_irq(&lp->lock);
1659 } else {
1660 cmd->supported = SUPPORTED_10baseT_Half |
1661 SUPPORTED_10baseT_Full |
1662 SUPPORTED_TP | SUPPORTED_AUI;
1664 if (lp->ctl_rspeed == 10)
1665 cmd->speed = SPEED_10;
1666 else if (lp->ctl_rspeed == 100)
1667 cmd->speed = SPEED_100;
1669 cmd->autoneg = AUTONEG_DISABLE;
1670 cmd->transceiver = XCVR_INTERNAL;
1671 cmd->port = 0;
1672 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1674 ret = 0;
1677 return ret;
1680 static int
1681 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1683 struct smc_local *lp = netdev_priv(dev);
1684 int ret;
1686 if (lp->phy_type != 0) {
1687 spin_lock_irq(&lp->lock);
1688 ret = mii_ethtool_sset(&lp->mii, cmd);
1689 spin_unlock_irq(&lp->lock);
1690 } else {
1691 if (cmd->autoneg != AUTONEG_DISABLE ||
1692 cmd->speed != SPEED_10 ||
1693 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1694 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1695 return -EINVAL;
1697 // lp->port = cmd->port;
1698 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1700 // if (netif_running(dev))
1701 // smc_set_port(dev);
1703 ret = 0;
1706 return ret;
1709 static void
1710 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1712 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1713 strncpy(info->version, version, sizeof(info->version));
1714 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1717 static int smc_ethtool_nwayreset(struct net_device *dev)
1719 struct smc_local *lp = netdev_priv(dev);
1720 int ret = -EINVAL;
1722 if (lp->phy_type != 0) {
1723 spin_lock_irq(&lp->lock);
1724 ret = mii_nway_restart(&lp->mii);
1725 spin_unlock_irq(&lp->lock);
1728 return ret;
1731 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1733 struct smc_local *lp = netdev_priv(dev);
1734 return lp->msg_enable;
1737 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1739 struct smc_local *lp = netdev_priv(dev);
1740 lp->msg_enable = level;
1743 static struct ethtool_ops smc_ethtool_ops = {
1744 .get_settings = smc_ethtool_getsettings,
1745 .set_settings = smc_ethtool_setsettings,
1746 .get_drvinfo = smc_ethtool_getdrvinfo,
1748 .get_msglevel = smc_ethtool_getmsglevel,
1749 .set_msglevel = smc_ethtool_setmsglevel,
1750 .nway_reset = smc_ethtool_nwayreset,
1751 .get_link = ethtool_op_get_link,
1752 // .get_eeprom = smc_ethtool_geteeprom,
1753 // .set_eeprom = smc_ethtool_seteeprom,
1757 * smc_findirq
1759 * This routine has a simple purpose -- make the SMC chip generate an
1760 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1763 * does this still work?
1765 * I just deleted auto_irq.c, since it was never built...
1766 * --jgarzik
1768 static int __init smc_findirq(void __iomem *ioaddr)
1770 int timeout = 20;
1771 unsigned long cookie;
1773 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1775 cookie = probe_irq_on();
1778 * What I try to do here is trigger an ALLOC_INT. This is done
1779 * by allocating a small chunk of memory, which will give an interrupt
1780 * when done.
1782 /* enable ALLOCation interrupts ONLY */
1783 SMC_SELECT_BANK(2);
1784 SMC_SET_INT_MASK(IM_ALLOC_INT);
1787 * Allocate 512 bytes of memory. Note that the chip was just
1788 * reset so all the memory is available
1790 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1793 * Wait until positive that the interrupt has been generated
1795 do {
1796 int int_status;
1797 udelay(10);
1798 int_status = SMC_GET_INT();
1799 if (int_status & IM_ALLOC_INT)
1800 break; /* got the interrupt */
1801 } while (--timeout);
1804 * there is really nothing that I can do here if timeout fails,
1805 * as autoirq_report will return a 0 anyway, which is what I
1806 * want in this case. Plus, the clean up is needed in both
1807 * cases.
1810 /* and disable all interrupts again */
1811 SMC_SET_INT_MASK(0);
1813 /* and return what I found */
1814 return probe_irq_off(cookie);
1818 * Function: smc_probe(unsigned long ioaddr)
1820 * Purpose:
1821 * Tests to see if a given ioaddr points to an SMC91x chip.
1822 * Returns a 0 on success
1824 * Algorithm:
1825 * (1) see if the high byte of BANK_SELECT is 0x33
1826 * (2) compare the ioaddr with the base register's address
1827 * (3) see if I recognize the chip ID in the appropriate register
1829 * Here I do typical initialization tasks.
1831 * o Initialize the structure if needed
1832 * o print out my vanity message if not done so already
1833 * o print out what type of hardware is detected
1834 * o print out the ethernet address
1835 * o find the IRQ
1836 * o set up my private data
1837 * o configure the dev structure with my subroutines
1838 * o actually GRAB the irq.
1839 * o GRAB the region
1841 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1843 struct smc_local *lp = netdev_priv(dev);
1844 static int version_printed = 0;
1845 int i, retval;
1846 unsigned int val, revision_register;
1847 const char *version_string;
1849 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1851 /* First, see if the high byte is 0x33 */
1852 val = SMC_CURRENT_BANK();
1853 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1854 if ((val & 0xFF00) != 0x3300) {
1855 if ((val & 0xFF) == 0x33) {
1856 printk(KERN_WARNING
1857 "%s: Detected possible byte-swapped interface"
1858 " at IOADDR %p\n", CARDNAME, ioaddr);
1860 retval = -ENODEV;
1861 goto err_out;
1865 * The above MIGHT indicate a device, but I need to write to
1866 * further test this.
1868 SMC_SELECT_BANK(0);
1869 val = SMC_CURRENT_BANK();
1870 if ((val & 0xFF00) != 0x3300) {
1871 retval = -ENODEV;
1872 goto err_out;
1876 * well, we've already written once, so hopefully another
1877 * time won't hurt. This time, I need to switch the bank
1878 * register to bank 1, so I can access the base address
1879 * register
1881 SMC_SELECT_BANK(1);
1882 val = SMC_GET_BASE();
1883 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1884 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1885 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1886 CARDNAME, ioaddr, val);
1890 * check if the revision register is something that I
1891 * recognize. These might need to be added to later,
1892 * as future revisions could be added.
1894 SMC_SELECT_BANK(3);
1895 revision_register = SMC_GET_REV();
1896 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1897 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1898 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1899 /* I don't recognize this chip, so... */
1900 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1901 ", Contact author.\n", CARDNAME,
1902 ioaddr, revision_register);
1904 retval = -ENODEV;
1905 goto err_out;
1908 /* At this point I'll assume that the chip is an SMC91x. */
1909 if (version_printed++ == 0)
1910 printk("%s", version);
1912 /* fill in some of the fields */
1913 dev->base_addr = (unsigned long)ioaddr;
1914 lp->base = ioaddr;
1915 lp->version = revision_register & 0xff;
1916 spin_lock_init(&lp->lock);
1918 /* Get the MAC address */
1919 SMC_SELECT_BANK(1);
1920 SMC_GET_MAC_ADDR(dev->dev_addr);
1922 /* now, reset the chip, and put it into a known state */
1923 smc_reset(dev);
1926 * If dev->irq is 0, then the device has to be banged on to see
1927 * what the IRQ is.
1929 * This banging doesn't always detect the IRQ, for unknown reasons.
1930 * a workaround is to reset the chip and try again.
1932 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1933 * be what is requested on the command line. I don't do that, mostly
1934 * because the card that I have uses a non-standard method of accessing
1935 * the IRQs, and because this _should_ work in most configurations.
1937 * Specifying an IRQ is done with the assumption that the user knows
1938 * what (s)he is doing. No checking is done!!!!
1940 if (dev->irq < 1) {
1941 int trials;
1943 trials = 3;
1944 while (trials--) {
1945 dev->irq = smc_findirq(ioaddr);
1946 if (dev->irq)
1947 break;
1948 /* kick the card and try again */
1949 smc_reset(dev);
1952 if (dev->irq == 0) {
1953 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1954 dev->name);
1955 retval = -ENODEV;
1956 goto err_out;
1958 dev->irq = irq_canonicalize(dev->irq);
1960 /* Fill in the fields of the device structure with ethernet values. */
1961 ether_setup(dev);
1963 dev->open = smc_open;
1964 dev->stop = smc_close;
1965 dev->hard_start_xmit = smc_hard_start_xmit;
1966 dev->tx_timeout = smc_timeout;
1967 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1968 dev->get_stats = smc_query_statistics;
1969 dev->set_multicast_list = smc_set_multicast_list;
1970 dev->ethtool_ops = &smc_ethtool_ops;
1971 #ifdef CONFIG_NET_POLL_CONTROLLER
1972 dev->poll_controller = smc_poll_controller;
1973 #endif
1975 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1976 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1977 lp->mii.phy_id_mask = 0x1f;
1978 lp->mii.reg_num_mask = 0x1f;
1979 lp->mii.force_media = 0;
1980 lp->mii.full_duplex = 0;
1981 lp->mii.dev = dev;
1982 lp->mii.mdio_read = smc_phy_read;
1983 lp->mii.mdio_write = smc_phy_write;
1986 * Locate the phy, if any.
1988 if (lp->version >= (CHIP_91100 << 4))
1989 smc_phy_detect(dev);
1991 /* then shut everything down to save power */
1992 smc_shutdown(dev);
1993 smc_phy_powerdown(dev);
1995 /* Set default parameters */
1996 lp->msg_enable = NETIF_MSG_LINK;
1997 lp->ctl_rfduplx = 0;
1998 lp->ctl_rspeed = 10;
2000 if (lp->version >= (CHIP_91100 << 4)) {
2001 lp->ctl_rfduplx = 1;
2002 lp->ctl_rspeed = 100;
2005 /* Grab the IRQ */
2006 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
2007 if (retval)
2008 goto err_out;
2010 #ifdef SMC_USE_PXA_DMA
2012 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2013 smc_pxa_dma_irq, NULL);
2014 if (dma >= 0)
2015 dev->dma = dma;
2017 #endif
2019 retval = register_netdev(dev);
2020 if (retval == 0) {
2021 /* now, print out the card info, in a short format.. */
2022 printk("%s: %s (rev %d) at %p IRQ %d",
2023 dev->name, version_string, revision_register & 0x0f,
2024 lp->base, dev->irq);
2026 if (dev->dma != (unsigned char)-1)
2027 printk(" DMA %d", dev->dma);
2029 printk("%s%s\n", nowait ? " [nowait]" : "",
2030 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2032 if (!is_valid_ether_addr(dev->dev_addr)) {
2033 printk("%s: Invalid ethernet MAC address. Please "
2034 "set using ifconfig\n", dev->name);
2035 } else {
2036 /* Print the Ethernet address */
2037 printk("%s: Ethernet addr: ", dev->name);
2038 for (i = 0; i < 5; i++)
2039 printk("%2.2x:", dev->dev_addr[i]);
2040 printk("%2.2x\n", dev->dev_addr[5]);
2043 if (lp->phy_type == 0) {
2044 PRINTK("%s: No PHY found\n", dev->name);
2045 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2046 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2047 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2048 PRINTK("%s: PHY LAN83C180\n", dev->name);
2052 err_out:
2053 #ifdef SMC_USE_PXA_DMA
2054 if (retval && dev->dma != (unsigned char)-1)
2055 pxa_free_dma(dev->dma);
2056 #endif
2057 return retval;
2060 static int smc_enable_device(struct platform_device *pdev)
2062 unsigned long flags;
2063 unsigned char ecor, ecsr;
2064 void __iomem *addr;
2065 struct resource * res;
2067 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2068 if (!res)
2069 return 0;
2072 * Map the attribute space. This is overkill, but clean.
2074 addr = ioremap(res->start, ATTRIB_SIZE);
2075 if (!addr)
2076 return -ENOMEM;
2079 * Reset the device. We must disable IRQs around this
2080 * since a reset causes the IRQ line become active.
2082 local_irq_save(flags);
2083 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2084 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2085 readb(addr + (ECOR << SMC_IO_SHIFT));
2088 * Wait 100us for the chip to reset.
2090 udelay(100);
2093 * The device will ignore all writes to the enable bit while
2094 * reset is asserted, even if the reset bit is cleared in the
2095 * same write. Must clear reset first, then enable the device.
2097 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2098 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2101 * Set the appropriate byte/word mode.
2103 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2104 if (!SMC_CAN_USE_16BIT)
2105 ecsr |= ECSR_IOIS8;
2106 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2107 local_irq_restore(flags);
2109 iounmap(addr);
2112 * Wait for the chip to wake up. We could poll the control
2113 * register in the main register space, but that isn't mapped
2114 * yet. We know this is going to take 750us.
2116 msleep(1);
2118 return 0;
2121 static int smc_request_attrib(struct platform_device *pdev)
2123 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2125 if (!res)
2126 return 0;
2128 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2129 return -EBUSY;
2131 return 0;
2134 static void smc_release_attrib(struct platform_device *pdev)
2136 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2138 if (res)
2139 release_mem_region(res->start, ATTRIB_SIZE);
2142 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2144 if (SMC_CAN_USE_DATACS) {
2145 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2146 struct smc_local *lp = netdev_priv(ndev);
2148 if (!res)
2149 return;
2151 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2152 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2153 return;
2156 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2160 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2162 if (SMC_CAN_USE_DATACS) {
2163 struct smc_local *lp = netdev_priv(ndev);
2164 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2166 if (lp->datacs)
2167 iounmap(lp->datacs);
2169 lp->datacs = NULL;
2171 if (res)
2172 release_mem_region(res->start, SMC_DATA_EXTENT);
2177 * smc_init(void)
2178 * Input parameters:
2179 * dev->base_addr == 0, try to find all possible locations
2180 * dev->base_addr > 0x1ff, this is the address to check
2181 * dev->base_addr == <anything else>, return failure code
2183 * Output:
2184 * 0 --> there is a device
2185 * anything else, error
2187 static int smc_drv_probe(struct platform_device *pdev)
2189 struct net_device *ndev;
2190 struct resource *res;
2191 unsigned int __iomem *addr;
2192 int ret;
2194 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2195 if (!res)
2196 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2197 if (!res) {
2198 ret = -ENODEV;
2199 goto out;
2203 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2204 ret = -EBUSY;
2205 goto out;
2208 ndev = alloc_etherdev(sizeof(struct smc_local));
2209 if (!ndev) {
2210 printk("%s: could not allocate device.\n", CARDNAME);
2211 ret = -ENOMEM;
2212 goto out_release_io;
2214 SET_MODULE_OWNER(ndev);
2215 SET_NETDEV_DEV(ndev, &pdev->dev);
2217 ndev->dma = (unsigned char)-1;
2218 ndev->irq = platform_get_irq(pdev, 0);
2219 if (ndev->irq < 0) {
2220 ret = -ENODEV;
2221 goto out_free_netdev;
2224 ret = smc_request_attrib(pdev);
2225 if (ret)
2226 goto out_free_netdev;
2227 #if defined(CONFIG_SA1100_ASSABET)
2228 NCR_0 |= NCR_ENET_OSC_EN;
2229 #endif
2230 ret = smc_enable_device(pdev);
2231 if (ret)
2232 goto out_release_attrib;
2234 addr = ioremap(res->start, SMC_IO_EXTENT);
2235 if (!addr) {
2236 ret = -ENOMEM;
2237 goto out_release_attrib;
2240 platform_set_drvdata(pdev, ndev);
2241 ret = smc_probe(ndev, addr);
2242 if (ret != 0)
2243 goto out_iounmap;
2244 #ifdef SMC_USE_PXA_DMA
2245 else {
2246 struct smc_local *lp = netdev_priv(ndev);
2247 lp->physaddr = res->start;
2249 #endif
2251 smc_request_datacs(pdev, ndev);
2253 return 0;
2255 out_iounmap:
2256 platform_set_drvdata(pdev, NULL);
2257 iounmap(addr);
2258 out_release_attrib:
2259 smc_release_attrib(pdev);
2260 out_free_netdev:
2261 free_netdev(ndev);
2262 out_release_io:
2263 release_mem_region(res->start, SMC_IO_EXTENT);
2264 out:
2265 printk("%s: not found (%d).\n", CARDNAME, ret);
2267 return ret;
2270 static int smc_drv_remove(struct platform_device *pdev)
2272 struct net_device *ndev = platform_get_drvdata(pdev);
2273 struct smc_local *lp = netdev_priv(ndev);
2274 struct resource *res;
2276 platform_set_drvdata(pdev, NULL);
2278 unregister_netdev(ndev);
2280 free_irq(ndev->irq, ndev);
2282 #ifdef SMC_USE_PXA_DMA
2283 if (ndev->dma != (unsigned char)-1)
2284 pxa_free_dma(ndev->dma);
2285 #endif
2286 iounmap(lp->base);
2288 smc_release_datacs(pdev,ndev);
2289 smc_release_attrib(pdev);
2291 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2292 if (!res)
2293 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2294 release_mem_region(res->start, SMC_IO_EXTENT);
2296 free_netdev(ndev);
2298 return 0;
2301 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2303 struct net_device *ndev = platform_get_drvdata(dev);
2305 if (ndev) {
2306 if (netif_running(ndev)) {
2307 netif_device_detach(ndev);
2308 smc_shutdown(ndev);
2309 smc_phy_powerdown(ndev);
2312 return 0;
2315 static int smc_drv_resume(struct platform_device *dev)
2317 struct net_device *ndev = platform_get_drvdata(dev);
2319 if (ndev) {
2320 struct smc_local *lp = netdev_priv(ndev);
2321 smc_enable_device(dev);
2322 if (netif_running(ndev)) {
2323 smc_reset(ndev);
2324 smc_enable(ndev);
2325 if (lp->phy_type != 0)
2326 smc_phy_configure(ndev);
2327 netif_device_attach(ndev);
2330 return 0;
2333 static struct platform_driver smc_driver = {
2334 .probe = smc_drv_probe,
2335 .remove = smc_drv_remove,
2336 .suspend = smc_drv_suspend,
2337 .resume = smc_drv_resume,
2338 .driver = {
2339 .name = CARDNAME,
2343 static int __init smc_init(void)
2345 #ifdef MODULE
2346 #ifdef CONFIG_ISA
2347 if (io == -1)
2348 printk(KERN_WARNING
2349 "%s: You shouldn't use auto-probing with insmod!\n",
2350 CARDNAME);
2351 #endif
2352 #endif
2354 return platform_driver_register(&smc_driver);
2357 static void __exit smc_cleanup(void)
2359 platform_driver_unregister(&smc_driver);
2362 module_init(smc_init);
2363 module_exit(smc_cleanup);