Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / net / sonic.c
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1 /*
2 * sonic.c
4 * (C) 2005 Finn Thain
6 * Converted to DMA API, added zero-copy buffer handling, and
7 * (from the mac68k project) introduced dhd's support for 16-bit cards.
9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de)
11 * This driver is based on work from Andreas Busse, but most of
12 * the code is rewritten.
14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
16 * Core code included by system sonic drivers
18 * And... partially rewritten again by David Huggins-Daines in order
19 * to cope with screwed up Macintosh NICs that may or may not use
20 * 16-bit DMA.
22 * (C) 1999 David Huggins-Daines <dhd@debian.org>
27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook,
28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet
29 * controller, and the files "8390.c" and "skeleton.c" in this directory.
31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi
32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also
33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c".
39 * Open/initialize the SONIC controller.
41 * This routine should set everything up anew at each open, even
42 * registers that "should" only need to be set once at boot, so that
43 * there is non-reboot way to recover if something goes wrong.
45 static int sonic_open(struct net_device *dev)
47 struct sonic_local *lp = netdev_priv(dev);
48 int i;
50 if (sonic_debug > 2)
51 printk("sonic_open: initializing sonic driver.\n");
54 * We don't need to deal with auto-irq stuff since we
55 * hardwire the sonic interrupt.
58 * XXX Horrible work around: We install sonic_interrupt as fast interrupt.
59 * This means that during execution of the handler interrupt are disabled
60 * covering another bug otherwise corrupting data. This doesn't mean
61 * this glue works ok under all situations.
63 * Note (dhd): this also appears to prevent lockups on the Macintrash
64 * when more than one Ethernet card is installed (knock on wood)
66 * Note (fthain): whether the above is still true is anyones guess. Certainly
67 * the buffer handling algorithms will not tolerate re-entrance without some
68 * mutual exclusion added. Anyway, the memcpy has now been eliminated from the
69 * rx code to make this a faster "fast interrupt".
71 if (request_irq(dev->irq, &sonic_interrupt, SONIC_IRQ_FLAG, "sonic", dev)) {
72 printk(KERN_ERR "\n%s: unable to get IRQ %d .\n", dev->name, dev->irq);
73 return -EAGAIN;
76 for (i = 0; i < SONIC_NUM_RRS; i++) {
77 struct sk_buff *skb = dev_alloc_skb(SONIC_RBSIZE + 2);
78 if (skb == NULL) {
79 while(i > 0) { /* free any that were allocated successfully */
80 i--;
81 dev_kfree_skb(lp->rx_skb[i]);
82 lp->rx_skb[i] = NULL;
84 printk(KERN_ERR "%s: couldn't allocate receive buffers\n",
85 dev->name);
86 return -ENOMEM;
88 skb->dev = dev;
89 /* align IP header unless DMA requires otherwise */
90 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
91 skb_reserve(skb, 2);
92 lp->rx_skb[i] = skb;
95 for (i = 0; i < SONIC_NUM_RRS; i++) {
96 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE),
97 SONIC_RBSIZE, DMA_FROM_DEVICE);
98 if (!laddr) {
99 while(i > 0) { /* free any that were mapped successfully */
100 i--;
101 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
102 lp->rx_laddr[i] = (dma_addr_t)0;
104 for (i = 0; i < SONIC_NUM_RRS; i++) {
105 dev_kfree_skb(lp->rx_skb[i]);
106 lp->rx_skb[i] = NULL;
108 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n",
109 dev->name);
110 return -ENOMEM;
112 lp->rx_laddr[i] = laddr;
116 * Initialize the SONIC
118 sonic_init(dev);
120 netif_start_queue(dev);
122 if (sonic_debug > 2)
123 printk("sonic_open: Initialization done.\n");
125 return 0;
130 * Close the SONIC device
132 static int sonic_close(struct net_device *dev)
134 struct sonic_local *lp = netdev_priv(dev);
135 int i;
137 if (sonic_debug > 2)
138 printk("sonic_close\n");
140 netif_stop_queue(dev);
143 * stop the SONIC, disable interrupts
145 SONIC_WRITE(SONIC_IMR, 0);
146 SONIC_WRITE(SONIC_ISR, 0x7fff);
147 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
149 /* unmap and free skbs that haven't been transmitted */
150 for (i = 0; i < SONIC_NUM_TDS; i++) {
151 if(lp->tx_laddr[i]) {
152 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
153 lp->tx_laddr[i] = (dma_addr_t)0;
155 if(lp->tx_skb[i]) {
156 dev_kfree_skb(lp->tx_skb[i]);
157 lp->tx_skb[i] = NULL;
161 /* unmap and free the receive buffers */
162 for (i = 0; i < SONIC_NUM_RRS; i++) {
163 if(lp->rx_laddr[i]) {
164 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
165 lp->rx_laddr[i] = (dma_addr_t)0;
167 if(lp->rx_skb[i]) {
168 dev_kfree_skb(lp->rx_skb[i]);
169 lp->rx_skb[i] = NULL;
173 free_irq(dev->irq, dev); /* release the IRQ */
175 return 0;
178 static void sonic_tx_timeout(struct net_device *dev)
180 struct sonic_local *lp = netdev_priv(dev);
181 int i;
182 /* Stop the interrupts for this */
183 SONIC_WRITE(SONIC_IMR, 0);
184 /* We could resend the original skbs. Easier to re-initialise. */
185 for (i = 0; i < SONIC_NUM_TDS; i++) {
186 if(lp->tx_laddr[i]) {
187 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
188 lp->tx_laddr[i] = (dma_addr_t)0;
190 if(lp->tx_skb[i]) {
191 dev_kfree_skb(lp->tx_skb[i]);
192 lp->tx_skb[i] = NULL;
195 /* Try to restart the adaptor. */
196 sonic_init(dev);
197 lp->stats.tx_errors++;
198 dev->trans_start = jiffies;
199 netif_wake_queue(dev);
203 * transmit packet
205 * Appends new TD during transmission thus avoiding any TX interrupts
206 * until we run out of TDs.
207 * This routine interacts closely with the ISR in that it may,
208 * set tx_skb[i]
209 * reset the status flags of the new TD
210 * set and reset EOL flags
211 * stop the tx queue
212 * The ISR interacts with this routine in various ways. It may,
213 * reset tx_skb[i]
214 * test the EOL and status flags of the TDs
215 * wake the tx queue
216 * Concurrently with all of this, the SONIC is potentially writing to
217 * the status flags of the TDs.
218 * Until some mutual exclusion is added, this code will not work with SMP. However,
219 * MIPS Jazz machines and m68k Macs were all uni-processor machines.
222 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev)
224 struct sonic_local *lp = netdev_priv(dev);
225 dma_addr_t laddr;
226 int length;
227 int entry = lp->next_tx;
229 if (sonic_debug > 2)
230 printk("sonic_send_packet: skb=%p, dev=%p\n", skb, dev);
232 length = skb->len;
233 if (length < ETH_ZLEN) {
234 skb = skb_padto(skb, ETH_ZLEN);
235 if (skb == NULL)
236 return 0;
237 length = ETH_ZLEN;
241 * Map the packet data into the logical DMA address space
244 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE);
245 if (!laddr) {
246 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name);
247 dev_kfree_skb(skb);
248 return 1;
251 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */
252 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */
253 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */
254 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff);
255 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16);
256 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length);
257 sonic_tda_put(dev, entry, SONIC_TD_LINK,
258 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL);
261 * Must set tx_skb[entry] only after clearing status, and
262 * before clearing EOL and before stopping queue
264 wmb();
265 lp->tx_len[entry] = length;
266 lp->tx_laddr[entry] = laddr;
267 lp->tx_skb[entry] = skb;
269 wmb();
270 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK,
271 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL);
272 lp->eol_tx = entry;
274 lp->next_tx = (entry + 1) & SONIC_TDS_MASK;
275 if (lp->tx_skb[lp->next_tx] != NULL) {
276 /* The ring is full, the ISR has yet to process the next TD. */
277 if (sonic_debug > 3)
278 printk("%s: stopping queue\n", dev->name);
279 netif_stop_queue(dev);
280 /* after this packet, wait for ISR to free up some TDAs */
281 } else netif_start_queue(dev);
283 if (sonic_debug > 2)
284 printk("sonic_send_packet: issuing Tx command\n");
286 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP);
288 dev->trans_start = jiffies;
290 return 0;
294 * The typical workload of the driver:
295 * Handle the network interface interrupts.
297 static irqreturn_t sonic_interrupt(int irq, void *dev_id, struct pt_regs *regs)
299 struct net_device *dev = (struct net_device *) dev_id;
300 struct sonic_local *lp = netdev_priv(dev);
301 int status;
303 if (dev == NULL) {
304 printk(KERN_ERR "sonic_interrupt: irq %d for unknown device.\n", irq);
305 return IRQ_NONE;
308 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT))
309 return IRQ_NONE;
311 do {
312 if (status & SONIC_INT_PKTRX) {
313 if (sonic_debug > 2)
314 printk("%s: packet rx\n", dev->name);
315 sonic_rx(dev); /* got packet(s) */
316 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */
319 if (status & SONIC_INT_TXDN) {
320 int entry = lp->cur_tx;
321 int td_status;
322 int freed_some = 0;
324 /* At this point, cur_tx is the index of a TD that is one of:
325 * unallocated/freed (status set & tx_skb[entry] clear)
326 * allocated and sent (status set & tx_skb[entry] set )
327 * allocated and not yet sent (status clear & tx_skb[entry] set )
328 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear)
331 if (sonic_debug > 2)
332 printk("%s: tx done\n", dev->name);
334 while (lp->tx_skb[entry] != NULL) {
335 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0)
336 break;
338 if (td_status & 0x0001) {
339 lp->stats.tx_packets++;
340 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE);
341 } else {
342 lp->stats.tx_errors++;
343 if (td_status & 0x0642)
344 lp->stats.tx_aborted_errors++;
345 if (td_status & 0x0180)
346 lp->stats.tx_carrier_errors++;
347 if (td_status & 0x0020)
348 lp->stats.tx_window_errors++;
349 if (td_status & 0x0004)
350 lp->stats.tx_fifo_errors++;
353 /* We must free the original skb */
354 dev_kfree_skb_irq(lp->tx_skb[entry]);
355 lp->tx_skb[entry] = NULL;
356 /* and unmap DMA buffer */
357 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE);
358 lp->tx_laddr[entry] = (dma_addr_t)0;
359 freed_some = 1;
361 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) {
362 entry = (entry + 1) & SONIC_TDS_MASK;
363 break;
365 entry = (entry + 1) & SONIC_TDS_MASK;
368 if (freed_some || lp->tx_skb[entry] == NULL)
369 netif_wake_queue(dev); /* The ring is no longer full */
370 lp->cur_tx = entry;
371 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */
375 * check error conditions
377 if (status & SONIC_INT_RFO) {
378 if (sonic_debug > 1)
379 printk("%s: rx fifo overrun\n", dev->name);
380 lp->stats.rx_fifo_errors++;
381 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */
383 if (status & SONIC_INT_RDE) {
384 if (sonic_debug > 1)
385 printk("%s: rx descriptors exhausted\n", dev->name);
386 lp->stats.rx_dropped++;
387 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */
389 if (status & SONIC_INT_RBAE) {
390 if (sonic_debug > 1)
391 printk("%s: rx buffer area exceeded\n", dev->name);
392 lp->stats.rx_dropped++;
393 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */
396 /* counter overruns; all counters are 16bit wide */
397 if (status & SONIC_INT_FAE) {
398 lp->stats.rx_frame_errors += 65536;
399 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */
401 if (status & SONIC_INT_CRC) {
402 lp->stats.rx_crc_errors += 65536;
403 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */
405 if (status & SONIC_INT_MP) {
406 lp->stats.rx_missed_errors += 65536;
407 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */
410 /* transmit error */
411 if (status & SONIC_INT_TXER) {
412 if ((SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) && (sonic_debug > 2))
413 printk(KERN_ERR "%s: tx fifo underrun\n", dev->name);
414 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */
417 /* bus retry */
418 if (status & SONIC_INT_BR) {
419 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n",
420 dev->name);
421 /* ... to help debug DMA problems causing endless interrupts. */
422 /* Bounce the eth interface to turn on the interrupt again. */
423 SONIC_WRITE(SONIC_IMR, 0);
424 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */
427 /* load CAM done */
428 if (status & SONIC_INT_LCD)
429 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */
430 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT));
431 return IRQ_HANDLED;
435 * We have a good packet(s), pass it/them up the network stack.
437 static void sonic_rx(struct net_device *dev)
439 struct sonic_local *lp = netdev_priv(dev);
440 int status;
441 int entry = lp->cur_rx;
443 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) {
444 struct sk_buff *used_skb;
445 struct sk_buff *new_skb;
446 dma_addr_t new_laddr;
447 u16 bufadr_l;
448 u16 bufadr_h;
449 int pkt_len;
451 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS);
452 if (status & SONIC_RCR_PRX) {
453 /* Malloc up new buffer. */
454 new_skb = dev_alloc_skb(SONIC_RBSIZE + 2);
455 if (new_skb == NULL) {
456 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
457 lp->stats.rx_dropped++;
458 break;
460 new_skb->dev = dev;
461 /* provide 16 byte IP header alignment unless DMA requires otherwise */
462 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
463 skb_reserve(new_skb, 2);
465 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE),
466 SONIC_RBSIZE, DMA_FROM_DEVICE);
467 if (!new_laddr) {
468 dev_kfree_skb(new_skb);
469 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name);
470 lp->stats.rx_dropped++;
471 break;
474 /* now we have a new skb to replace it, pass the used one up the stack */
475 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE);
476 used_skb = lp->rx_skb[entry];
477 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN);
478 skb_trim(used_skb, pkt_len);
479 used_skb->protocol = eth_type_trans(used_skb, dev);
480 netif_rx(used_skb);
481 dev->last_rx = jiffies;
482 lp->stats.rx_packets++;
483 lp->stats.rx_bytes += pkt_len;
485 /* and insert the new skb */
486 lp->rx_laddr[entry] = new_laddr;
487 lp->rx_skb[entry] = new_skb;
489 bufadr_l = (unsigned long)new_laddr & 0xffff;
490 bufadr_h = (unsigned long)new_laddr >> 16;
491 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l);
492 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h);
493 } else {
494 /* This should only happen, if we enable accepting broken packets. */
495 lp->stats.rx_errors++;
496 if (status & SONIC_RCR_FAER)
497 lp->stats.rx_frame_errors++;
498 if (status & SONIC_RCR_CRCR)
499 lp->stats.rx_crc_errors++;
501 if (status & SONIC_RCR_LPKT) {
503 * this was the last packet out of the current receive buffer
504 * give the buffer back to the SONIC
506 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
507 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff;
508 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
509 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) {
510 if (sonic_debug > 2)
511 printk("%s: rx buffer exhausted\n", dev->name);
512 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */
514 } else
515 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n",
516 dev->name);
518 * give back the descriptor
520 sonic_rda_put(dev, entry, SONIC_RD_LINK,
521 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL);
522 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1);
523 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK,
524 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL);
525 lp->eol_rx = entry;
526 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK;
529 * If any worth-while packets have been received, netif_rx()
530 * has done a mark_bh(NET_BH) for us and will work on them
531 * when we get to the bottom-half routine.
537 * Get the current statistics.
538 * This may be called with the device open or closed.
540 static struct net_device_stats *sonic_get_stats(struct net_device *dev)
542 struct sonic_local *lp = netdev_priv(dev);
544 /* read the tally counter from the SONIC and reset them */
545 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT);
546 SONIC_WRITE(SONIC_CRCT, 0xffff);
547 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET);
548 SONIC_WRITE(SONIC_FAET, 0xffff);
549 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT);
550 SONIC_WRITE(SONIC_MPT, 0xffff);
552 return &lp->stats;
557 * Set or clear the multicast filter for this adaptor.
559 static void sonic_multicast_list(struct net_device *dev)
561 struct sonic_local *lp = netdev_priv(dev);
562 unsigned int rcr;
563 struct dev_mc_list *dmi = dev->mc_list;
564 unsigned char *addr;
565 int i;
567 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC);
568 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */
570 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
571 rcr |= SONIC_RCR_PRO;
572 } else {
573 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 15)) {
574 rcr |= SONIC_RCR_AMC;
575 } else {
576 if (sonic_debug > 2)
577 printk("sonic_multicast_list: mc_count %d\n", dev->mc_count);
578 sonic_set_cam_enable(dev, 1); /* always enable our own address */
579 for (i = 1; i <= dev->mc_count; i++) {
580 addr = dmi->dmi_addr;
581 dmi = dmi->next;
582 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]);
583 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]);
584 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]);
585 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i));
587 SONIC_WRITE(SONIC_CDC, 16);
588 /* issue Load CAM command */
589 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
590 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
594 if (sonic_debug > 2)
595 printk("sonic_multicast_list: setting RCR=%x\n", rcr);
597 SONIC_WRITE(SONIC_RCR, rcr);
602 * Initialize the SONIC ethernet controller.
604 static int sonic_init(struct net_device *dev)
606 unsigned int cmd;
607 struct sonic_local *lp = netdev_priv(dev);
608 int i;
611 * put the Sonic into software-reset mode and
612 * disable all interrupts
614 SONIC_WRITE(SONIC_IMR, 0);
615 SONIC_WRITE(SONIC_ISR, 0x7fff);
616 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
619 * clear software reset flag, disable receiver, clear and
620 * enable interrupts, then completely initialize the SONIC
622 SONIC_WRITE(SONIC_CMD, 0);
623 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS);
626 * initialize the receive resource area
628 if (sonic_debug > 2)
629 printk("sonic_init: initialize receive resource area\n");
631 for (i = 0; i < SONIC_NUM_RRS; i++) {
632 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff;
633 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16;
634 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l);
635 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h);
636 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1);
637 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0);
640 /* initialize all RRA registers */
641 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR *
642 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
643 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR *
644 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
646 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff);
647 SONIC_WRITE(SONIC_REA, lp->rra_end);
648 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff);
649 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
650 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16);
651 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1));
653 /* load the resource pointers */
654 if (sonic_debug > 3)
655 printk("sonic_init: issuing RRRA command\n");
657 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA);
658 i = 0;
659 while (i++ < 100) {
660 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA)
661 break;
664 if (sonic_debug > 2)
665 printk("sonic_init: status=%x i=%d\n", SONIC_READ(SONIC_CMD), i);
668 * Initialize the receive descriptors so that they
669 * become a circular linked list, ie. let the last
670 * descriptor point to the first again.
672 if (sonic_debug > 2)
673 printk("sonic_init: initialize receive descriptors\n");
674 for (i=0; i<SONIC_NUM_RDS; i++) {
675 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0);
676 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0);
677 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0);
678 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0);
679 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0);
680 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1);
681 sonic_rda_put(dev, i, SONIC_RD_LINK,
682 lp->rda_laddr +
683 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode)));
685 /* fix last descriptor */
686 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK,
687 (lp->rda_laddr & 0xffff) | SONIC_EOL);
688 lp->eol_rx = SONIC_NUM_RDS - 1;
689 lp->cur_rx = 0;
690 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16);
691 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff);
694 * initialize transmit descriptors
696 if (sonic_debug > 2)
697 printk("sonic_init: initialize transmit descriptors\n");
698 for (i = 0; i < SONIC_NUM_TDS; i++) {
699 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0);
700 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0);
701 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0);
702 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0);
703 sonic_tda_put(dev, i, SONIC_TD_LINK,
704 (lp->tda_laddr & 0xffff) +
705 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode));
706 lp->tx_skb[i] = NULL;
708 /* fix last descriptor */
709 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK,
710 (lp->tda_laddr & 0xffff));
712 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16);
713 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff);
714 lp->cur_tx = lp->next_tx = 0;
715 lp->eol_tx = SONIC_NUM_TDS - 1;
718 * put our own address to CAM desc[0]
720 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]);
721 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]);
722 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]);
723 sonic_set_cam_enable(dev, 1);
725 for (i = 0; i < 16; i++)
726 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i);
729 * initialize CAM registers
731 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
732 SONIC_WRITE(SONIC_CDC, 16);
735 * load the CAM
737 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
739 i = 0;
740 while (i++ < 100) {
741 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD)
742 break;
744 if (sonic_debug > 2) {
745 printk("sonic_init: CMD=%x, ISR=%x\n, i=%d",
746 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i);
750 * enable receiver, disable loopback
751 * and enable all interrupts
753 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP);
754 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT);
755 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT);
756 SONIC_WRITE(SONIC_ISR, 0x7fff);
757 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT);
759 cmd = SONIC_READ(SONIC_CMD);
760 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0)
761 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd);
763 if (sonic_debug > 2)
764 printk("sonic_init: new status=%x\n",
765 SONIC_READ(SONIC_CMD));
767 return 0;
770 MODULE_LICENSE("GPL");