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Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / net / tokenring / 3c359.c
blob41e0cd8f478670215bfa71792cecc00625500ee8
1 /*
2 * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved
3 *
4 * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC
5 *
6 * Base Driver Olympic:
7 * Written 1999 Peter De Schrijver & Mike Phillips
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.
13 *
14 * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.
15 * 3/05/01 - Last clean up stuff before submission.
16 * 2/15/01 - Finally, update to new pci api.
17 *
18 * To Do:
19 */
20
21 /*
22 * Technical Card Details
23 *
24 * All access to data is done with 16/8 bit transfers. The transfer
25 * method really sucks. You can only read or write one location at a time.
26 *
27 * Also, the microcode for the card must be uploaded if the card does not have
28 * the flashrom on board. This is a 28K bloat in the driver when compiled
29 * as a module.
30 *
31 * Rx is very simple, status into a ring of descriptors, dma data transfer,
32 * interrupts to tell us when a packet is received.
33 *
34 * Tx is a little more interesting. Similar scenario, descriptor and dma data
35 * transfers, but we don't have to interrupt the card to tell it another packet
36 * is ready for transmission, we are just doing simple memory writes, not io or mmio
37 * writes. The card can be set up to simply poll on the next
38 * descriptor pointer and when this value is non-zero will automatically download
39 * the next packet. The card then interrupts us when the packet is done.
40 *
41 */
42
43 #define XL_DEBUG 0
44
45 #include <linux/config.h>
46 #include <linux/module.h>
47 #include <linux/kernel.h>
48 #include <linux/errno.h>
49 #include <linux/timer.h>
50 #include <linux/in.h>
51 #include <linux/ioport.h>
52 #include <linux/string.h>
53 #include <linux/proc_fs.h>
54 #include <linux/ptrace.h>
55 #include <linux/skbuff.h>
56 #include <linux/interrupt.h>
57 #include <linux/delay.h>
58 #include <linux/netdevice.h>
59 #include <linux/trdevice.h>
60 #include <linux/stddef.h>
61 #include <linux/init.h>
62 #include <linux/pci.h>
63 #include <linux/spinlock.h>
64 #include <linux/bitops.h>
65
66 #include <net/checksum.h>
67
68 #include <asm/io.h>
69 #include <asm/system.h>
70
71 #include "3c359.h"
72
73 static char version[] __devinitdata =
74 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ;
75
76 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
77 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ;
78
79 /* Module paramters */
80
81 /* Ring Speed 0,4,16
82 * 0 = Autosense
83 * 4,16 = Selected speed only, no autosense
84 * This allows the card to be the first on the ring
85 * and become the active monitor.
86 *
87 * WARNING: Some hubs will allow you to insert
88 * at the wrong speed.
89 *
90 * The adapter will _not_ fail to open if there are no
91 * active monitors on the ring, it will simply open up in
92 * its last known ringspeed if no ringspeed is specified.
93 */
94
95 static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;
96
97 module_param_array(ringspeed, int, NULL, 0);
98 MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;
99
100 /* Packet buffer size */
101
102 static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;
103
104 module_param_array(pkt_buf_sz, int, NULL, 0) ;
105 MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;
106 /* Message Level */
107
108 static int message_level[XL_MAX_ADAPTERS] = {0,} ;
109
110 module_param_array(message_level, int, NULL, 0) ;
111 MODULE_PARM_DESC(message_level, "3c359: Level of reported messages \n") ;
112 /*
113 * This is a real nasty way of doing this, but otherwise you
114 * will be stuck with 1555 lines of hex #'s in the code.
115 */
116
117 #include "3c359_microcode.h"
118
119 static struct pci_device_id xl_pci_tbl[] =
120 {
121 {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
122 { } /* terminate list */
123 };
124 MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ;
125
126 static int xl_init(struct net_device *dev);
127 static int xl_open(struct net_device *dev);
128 static int xl_open_hw(struct net_device *dev) ;
129 static int xl_hw_reset(struct net_device *dev);
130 static int xl_xmit(struct sk_buff *skb, struct net_device *dev);
131 static void xl_dn_comp(struct net_device *dev);
132 static int xl_close(struct net_device *dev);
133 static void xl_set_rx_mode(struct net_device *dev);
134 static irqreturn_t xl_interrupt(int irq, void *dev_id, struct pt_regs *regs);
135 static struct net_device_stats * xl_get_stats(struct net_device *dev);
136 static int xl_set_mac_address(struct net_device *dev, void *addr) ;
137 static void xl_arb_cmd(struct net_device *dev);
138 static void xl_asb_cmd(struct net_device *dev) ;
139 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ;
140 static void xl_wait_misr_flags(struct net_device *dev) ;
141 static int xl_change_mtu(struct net_device *dev, int mtu);
142 static void xl_srb_bh(struct net_device *dev) ;
143 static void xl_asb_bh(struct net_device *dev) ;
144 static void xl_reset(struct net_device *dev) ;
145 static void xl_freemem(struct net_device *dev) ;
146
147
148 /* EEProm Access Functions */
149 static u16 xl_ee_read(struct net_device *dev, int ee_addr) ;
150 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ;
151
152 /* Debugging functions */
153 #if XL_DEBUG
154 static void print_tx_state(struct net_device *dev) ;
155 static void print_rx_state(struct net_device *dev) ;
156
157 static void print_tx_state(struct net_device *dev)
158 {
159
160 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
161 struct xl_tx_desc *txd ;
162 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
163 int i ;
164
165 printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d \n",xl_priv->tx_ring_head,
166 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ;
167 printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len \n");
168 for (i = 0; i < 16; i++) {
169 txd = &(xl_priv->xl_tx_ring[i]) ;
170 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(txd),
171 txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ;
172 }
173
174 printk("DNLISTPTR = %04x \n", readl(xl_mmio + MMIO_DNLISTPTR) );
175
176 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
177 printk("Queue status = %0x \n",netif_running(dev) ) ;
178 }
179
180 static void print_rx_state(struct net_device *dev)
181 {
182
183 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
184 struct xl_rx_desc *rxd ;
185 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
186 int i ;
187
188 printk("rx_ring_tail: %d \n", xl_priv->rx_ring_tail) ;
189 printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len \n");
190 for (i = 0; i < 16; i++) {
191 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */
192 rxd = &(xl_priv->xl_rx_ring[i]) ;
193 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(rxd),
194 rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ;
195 }
196
197 printk("UPLISTPTR = %04x \n", readl(xl_mmio + MMIO_UPLISTPTR) );
198
199 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
200 printk("Queue status = %0x \n",netif_running(dev) ) ;
201 }
202 #endif
203
204 /*
205 * Read values from the on-board EEProm. This looks very strange
206 * but you have to wait for the EEProm to get/set the value before
207 * passing/getting the next value from the nic. As with all requests
208 * on this nic it has to be done in two stages, a) tell the nic which
209 * memory address you want to access and b) pass/get the value from the nic.
210 * With the EEProm, you have to wait before and inbetween access a) and b).
211 * As this is only read at initialization time and the wait period is very
212 * small we shouldn't have to worry about scheduling issues.
213 */
214
215 static u16 xl_ee_read(struct net_device *dev, int ee_addr)
216 {
217 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
218 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
219
220 /* Wait for EEProm to not be busy */
221 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
222 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
223
224 /* Tell EEProm what we want to do and where */
225 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
226 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
227
228 /* Wait for EEProm to not be busy */
229 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
230 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
231
232 /* Tell EEProm what we want to do and where */
233 writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
234 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
235
236 /* Finally read the value from the EEProm */
237 writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
238 return readw(xl_mmio + MMIO_MACDATA) ;
239 }
240
241 /*
242 * Write values to the onboard eeprom. As with eeprom read you need to
243 * set which location to write, wait, value to write, wait, with the
244 * added twist of having to enable eeprom writes as well.
245 */
246
247 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value)
248 {
249 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
250 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
251
252 /* Wait for EEProm to not be busy */
253 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
254 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
255
256 /* Enable write/erase */
257 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
258 writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ;
259
260 /* Wait for EEProm to not be busy */
261 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
262 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
263
264 /* Put the value we want to write into EEDATA */
265 writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
266 writew(ee_value, xl_mmio + MMIO_MACDATA) ;
267
268 /* Tell EEProm to write eevalue into ee_addr */
269 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
270 writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ;
271
272 /* Wait for EEProm to not be busy, to ensure write gets done */
273 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
274 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
275
276 return ;
277 }
278
279 static int __devinit xl_probe(struct pci_dev *pdev,
280 const struct pci_device_id *ent)
281 {
282 struct net_device *dev ;
283 struct xl_private *xl_priv ;
284 static int card_no = -1 ;
285 int i ;
286
287 card_no++ ;
288
289 if (pci_enable_device(pdev)) {
290 return -ENODEV ;
291 }
292
293 pci_set_master(pdev);
294
295 if ((i = pci_request_regions(pdev,"3c359"))) {
296 return i ;
297 } ;
298
299 /*
300 * Allowing init_trdev to allocate the dev->priv structure will align xl_private
301 * on a 32 bytes boundary which we need for the rx/tx descriptors
302 */
303
304 dev = alloc_trdev(sizeof(struct xl_private)) ;
305 if (!dev) {
306 pci_release_regions(pdev) ;
307 return -ENOMEM ;
308 }
309 xl_priv = dev->priv ;
310
311 #if XL_DEBUG
312 printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n",
313 pdev, dev, dev->priv, (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start) ;
314 #endif
315
316 dev->irq=pdev->irq;
317 dev->base_addr=pci_resource_start(pdev,0) ;
318 xl_priv->xl_card_name = pci_name(pdev);
319 xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);
320 xl_priv->pdev = pdev ;
321
322 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
323 xl_priv->pkt_buf_sz = PKT_BUF_SZ ;
324 else
325 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ;
326
327 dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ;
328 xl_priv->xl_ring_speed = ringspeed[card_no] ;
329 xl_priv->xl_message_level = message_level[card_no] ;
330 xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ;
331 xl_priv->xl_copy_all_options = 0 ;
332
333 if((i = xl_init(dev))) {
334 iounmap(xl_priv->xl_mmio) ;
335 free_netdev(dev) ;
336 pci_release_regions(pdev) ;
337 return i ;
338 }
339
340 dev->open=&xl_open;
341 dev->hard_start_xmit=&xl_xmit;
342 dev->change_mtu=&xl_change_mtu;
343 dev->stop=&xl_close;
344 dev->do_ioctl=NULL;
345 dev->set_multicast_list=&xl_set_rx_mode;
346 dev->get_stats=&xl_get_stats ;
347 dev->set_mac_address=&xl_set_mac_address ;
348 SET_MODULE_OWNER(dev);
349 SET_NETDEV_DEV(dev, &pdev->dev);
350
351 pci_set_drvdata(pdev,dev) ;
352 if ((i = register_netdev(dev))) {
353 printk(KERN_ERR "3C359, register netdev failed\n") ;
354 pci_set_drvdata(pdev,NULL) ;
355 iounmap(xl_priv->xl_mmio) ;
356 free_netdev(dev) ;
357 pci_release_regions(pdev) ;
358 return i ;
359 }
360
361 printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ;
362
363 return 0;
364 }
365
366
367 static int __init xl_init(struct net_device *dev)
368 {
369 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
370
371 printk(KERN_INFO "%s \n", version);
372 printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
373 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq);
374
375 spin_lock_init(&xl_priv->xl_lock) ;
376
377 return xl_hw_reset(dev) ;
378
379 }
380
381
382 /*
383 * Hardware reset. This needs to be a separate entity as we need to reset the card
384 * when we change the EEProm settings.
385 */
386
387 static int xl_hw_reset(struct net_device *dev)
388 {
389 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
390 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
391 unsigned long t ;
392 u16 i ;
393 u16 result_16 ;
394 u8 result_8 ;
395 u16 start ;
396 int j ;
397
398 /*
399 * Reset the card. If the card has got the microcode on board, we have
400 * missed the initialization interrupt, so we must always do this.
401 */
402
403 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
404
405 /*
406 * Must wait for cmdInProgress bit (12) to clear before continuing with
407 * card configuration.
408 */
409
410 t=jiffies;
411 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
412 schedule();
413 if(jiffies-t > 40*HZ) {
414 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name);
415 return -ENODEV;
416 }
417 }
418
419 /*
420 * Enable pmbar by setting bit in CPAttention
421 */
422
423 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
424 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
425 result_8 = result_8 | CPA_PMBARVIS ;
426 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
427 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
428
429 /*
430 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.
431 * If not, we need to upload the microcode to the card
432 */
433
434 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
435
436 #if XL_DEBUG
437 printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ;
438 #endif
439
440 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) {
441
442 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */
443
444 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
445 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
446 result_16 = result_16 & ~((0x7F) << 2) ;
447 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
448 writew(result_16,xl_mmio + MMIO_MACDATA) ;
449
450 /* Set CPAttention, memWrEn bit */
451
452 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
453 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
454 result_8 = result_8 | CPA_MEMWREN ;
455 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
456 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
457
458 /*
459 * Now to write the microcode into the shared ram
460 * The microcode must finish at position 0xFFFF, so we must subtract
461 * to get the start position for the code
462 */
463
464 start = (0xFFFF - (mc_size) + 1 ) ; /* Looks strange but ensures compiler only uses 16 bit unsigned int for this */
465
466 printk(KERN_INFO "3C359: Uploading Microcode: ");
467
468 for (i = start, j = 0; j < mc_size; i++, j++) {
469 writel(MEM_BYTE_WRITE | 0XD0000 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
470 writeb(microcode[j],xl_mmio + MMIO_MACDATA) ;
471 if (j % 1024 == 0)
472 printk(".");
473 }
474 printk("\n") ;
475
476 for (i=0;i < 16; i++) {
477 writel( (MEM_BYTE_WRITE | 0xDFFF0) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
478 writeb(microcode[mc_size - 16 + i], xl_mmio + MMIO_MACDATA) ;
479 }
480
481 /*
482 * Have to write the start address of the upload to FFF4, but
483 * the address must be >> 4. You do not want to know how long
484 * it took me to discover this.
485 */
486
487 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
488 writew(start >> 4, xl_mmio + MMIO_MACDATA);
489
490 /* Clear the CPAttention, memWrEn Bit */
491
492 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
493 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
494 result_8 = result_8 & ~CPA_MEMWREN ;
495 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
496 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
497
498 /* Clear the cpHold bit in pmbar */
499
500 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
501 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
502 result_16 = result_16 & ~PMB_CPHOLD ;
503 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
504 writew(result_16,xl_mmio + MMIO_MACDATA) ;
505
506
507 } /* If microcode upload required */
508
509 /*
510 * The card should now go though a self test procedure and get itself ready
511 * to be opened, we must wait for an srb response with the initialization
512 * information.
513 */
514
515 #if XL_DEBUG
516 printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name);
517 #endif
518
519 writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ;
520
521 t=jiffies;
522 while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) {
523 schedule();
524 if(jiffies-t > 15*HZ) {
525 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
526 return -ENODEV;
527 }
528 }
529
530 /*
531 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh,
532 * DnPriReqThresh, read the tech docs if you want to know what
533 * values they need to be.
534 */
535
536 writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
537 writew(0xD000, xl_mmio + MMIO_MACDATA) ;
538
539 writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
540 writew(0X0020, xl_mmio + MMIO_MACDATA) ;
541
542 writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ;
543
544 writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ;
545 writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;
546
547 /*
548 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads.
549 * Tech docs have this wrong !!!!
550 */
551
552 writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
553 xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ;
554 writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
555 xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ;
556
557 #if XL_DEBUG
558 writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
559 if ( readw(xl_mmio + MMIO_MACDATA) & 2) {
560 printk(KERN_INFO "Default ring speed 4 mbps \n") ;
561 } else {
562 printk(KERN_INFO "Default ring speed 16 mbps \n") ;
563 }
564 printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb);
565 #endif
566
567 return 0;
568 }
569
570 static int xl_open(struct net_device *dev)
571 {
572 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
573 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
574 u8 i ;
575 u16 hwaddr[3] ; /* Should be u8[6] but we get word return values */
576 int open_err ;
577
578 u16 switchsettings, switchsettings_eeprom ;
579
580 if(request_irq(dev->irq, &xl_interrupt, SA_SHIRQ , "3c359", dev)) {
581 return -EAGAIN;
582 }
583
584 /*
585 * Read the information from the EEPROM that we need. I know we
586 * should use ntohs, but the word gets stored reversed in the 16
587 * bit field anyway and it all works its self out when we memcpy
588 * it into dev->dev_addr.
589 */
590
591 hwaddr[0] = xl_ee_read(dev,0x10) ;
592 hwaddr[1] = xl_ee_read(dev,0x11) ;
593 hwaddr[2] = xl_ee_read(dev,0x12) ;
594
595 /* Ring speed */
596
597 switchsettings_eeprom = xl_ee_read(dev,0x08) ;
598 switchsettings = switchsettings_eeprom ;
599
600 if (xl_priv->xl_ring_speed != 0) {
601 if (xl_priv->xl_ring_speed == 4)
602 switchsettings = switchsettings | 0x02 ;
603 else
604 switchsettings = switchsettings & ~0x02 ;
605 }
606
607 /* Only write EEProm if there has been a change */
608 if (switchsettings != switchsettings_eeprom) {
609 xl_ee_write(dev,0x08,switchsettings) ;
610 /* Hardware reset after changing EEProm */
611 xl_hw_reset(dev) ;
612 }
613
614 memcpy(dev->dev_addr,hwaddr,dev->addr_len) ;
615
616 open_err = xl_open_hw(dev) ;
617
618 /*
619 * This really needs to be cleaned up with better error reporting.
620 */
621
622 if (open_err != 0) { /* Something went wrong with the open command */
623 if (open_err & 0x07) { /* Wrong speed, retry at different speed */
624 printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed \n", dev->name) ;
625 switchsettings = switchsettings ^ 2 ;
626 xl_ee_write(dev,0x08,switchsettings) ;
627 xl_hw_reset(dev) ;
628 open_err = xl_open_hw(dev) ;
629 if (open_err != 0) {
630 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name);
631 free_irq(dev->irq,dev) ;
632 return -ENODEV ;
633 }
634 } else {
635 printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ;
636 free_irq(dev->irq,dev) ;
637 return -ENODEV ;
638 }
639 }
640
641 /*
642 * Now to set up the Rx and Tx buffer structures
643 */
644 /* These MUST be on 8 byte boundaries */
645 xl_priv->xl_tx_ring = kmalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL) ;
646 if (xl_priv->xl_tx_ring == NULL) {
647 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n",
648 dev->name);
649 free_irq(dev->irq,dev);
650 return -ENOMEM;
651 }
652 xl_priv->xl_rx_ring = kmalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL) ;
653 if (xl_priv->xl_tx_ring == NULL) {
654 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n",
655 dev->name);
656 free_irq(dev->irq,dev);
657 kfree(xl_priv->xl_tx_ring);
658 return -ENOMEM;
659 }
660 memset(xl_priv->xl_tx_ring,0,sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) ;
661 memset(xl_priv->xl_rx_ring,0,sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) ;
662
663 /* Setup Rx Ring */
664 for (i=0 ; i < XL_RX_RING_SIZE ; i++) {
665 struct sk_buff *skb ;
666
667 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
668 if (skb==NULL)
669 break ;
670
671 skb->dev = dev ;
672 xl_priv->xl_rx_ring[i].upfragaddr = pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
673 xl_priv->xl_rx_ring[i].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG;
674 xl_priv->rx_ring_skb[i] = skb ;
675 }
676
677 if (i==0) {
678 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled \n",dev->name) ;
679 free_irq(dev->irq,dev) ;
680 return -EIO ;
681 }
682
683 xl_priv->rx_ring_no = i ;
684 xl_priv->rx_ring_tail = 0 ;
685 xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ;
686 for (i=0;i<(xl_priv->rx_ring_no-1);i++) {
687 xl_priv->xl_rx_ring[i].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)) ;
688 }
689 xl_priv->xl_rx_ring[i].upnextptr = 0 ;
690
691 writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ;
692
693 /* Setup Tx Ring */
694
695 xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ;
696
697 xl_priv->tx_ring_head = 1 ;
698 xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */
699 xl_priv->free_ring_entries = XL_TX_RING_SIZE ;
700
701 /*
702 * Setup the first dummy DPD entry for polling to start working.
703 */
704
705 xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY ;
706 xl_priv->xl_tx_ring[0].buffer = 0 ;
707 xl_priv->xl_tx_ring[0].buffer_length = 0 ;
708 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
709
710 writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ;
711 writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ;
712 writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ;
713 writel(DNENABLE, xl_mmio + MMIO_COMMAND) ;
714 writeb(0x40, xl_mmio + MMIO_DNPOLL) ;
715
716 /*
717 * Enable interrupts on the card
718 */
719
720 writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
721 writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
722
723 netif_start_queue(dev) ;
724 return 0;
725
726 }
727
728 static int xl_open_hw(struct net_device *dev)
729 {
730 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
731 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
732 u16 vsoff ;
733 char ver_str[33];
734 int open_err ;
735 int i ;
736 unsigned long t ;
737
738 /*
739 * Okay, let's build up the Open.NIC srb command
740 *
741 */
742
743 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
744 writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ;
745
746 /*
747 * Use this as a test byte, if it comes back with the same value, the command didn't work
748 */
749
750 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
751 writeb(0xff,xl_mmio + MMIO_MACDATA) ;
752
753 /* Open options */
754 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
755 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
756 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
757 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
758
759 /*
760 * Node address, be careful here, the docs say you can just put zeros here and it will use
761 * the hardware address, it doesn't, you must include the node address in the open command.
762 */
763
764 if (xl_priv->xl_laa[0]) { /* If using a LAA address */
765 for (i=10;i<16;i++) {
766 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
767 writeb(xl_priv->xl_laa[i],xl_mmio + MMIO_MACDATA) ;
768 }
769 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ;
770 } else { /* Regular hardware address */
771 for (i=10;i<16;i++) {
772 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
773 writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ;
774 }
775 }
776
777 /* Default everything else to 0 */
778 for (i = 16; i < 34; i++) {
779 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
780 writeb(0x00,xl_mmio + MMIO_MACDATA) ;
781 }
782
783 /*
784 * Set the csrb bit in the MISR register
785 */
786
787 xl_wait_misr_flags(dev) ;
788 writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
789 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
790 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
791 writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ;
792
793 /*
794 * Now wait for the command to run
795 */
796
797 t=jiffies;
798 while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
799 schedule();
800 if(jiffies-t > 40*HZ) {
801 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
802 break ;
803 }
804 }
805
806 /*
807 * Let's interpret the open response
808 */
809
810 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
811 if (readb(xl_mmio + MMIO_MACDATA)!=0) {
812 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ;
813 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
814 open_err |= readb(xl_mmio + MMIO_MACDATA) ;
815 return open_err ;
816 } else {
817 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
818 xl_priv->asb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
819 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ;
820 printk("ASB: %04x",xl_priv->asb ) ;
821 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
822 printk(", SRB: %04x",ntohs(readw(xl_mmio + MMIO_MACDATA)) ) ;
823
824 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
825 xl_priv->arb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
826 printk(", ARB: %04x \n",xl_priv->arb ) ;
827 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
828 vsoff = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
829
830 /*
831 * Interesting, sending the individual characters directly to printk was causing klogd to use
832 * use 100% of processor time, so we build up the string and print that instead.
833 */
834
835 for (i=0;i<0x20;i++) {
836 writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
837 ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ;
838 }
839 ver_str[i] = '\0' ;
840 printk(KERN_INFO "%s: Microcode version String: %s \n",dev->name,ver_str);
841 }
842
843 /*
844 * Issue the AckInterrupt
845 */
846 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
847
848 return 0 ;
849 }
850
851 /*
852 * There are two ways of implementing rx on the 359 NIC, either
853 * interrupt driven or polling. We are going to uses interrupts,
854 * it is the easier way of doing things.
855 *
856 * The Rx works with a ring of Rx descriptors. At initialise time the ring
857 * entries point to the next entry except for the last entry in the ring
858 * which points to 0. The card is programmed with the location of the first
859 * available descriptor and keeps reading the next_ptr until next_ptr is set
860 * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr
861 * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers
862 * and then point the end of the ring to our current position and point our current
863 * position to 0, therefore making the current position the last position on the ring.
864 * The last position on the ring therefore loops continually loops around the rx ring.
865 *
866 * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head
867 * expands as the card adds new packets and we go around eating the tail processing the
868 * packets.)
869 *
870 * Undoubtably it could be streamlined and improved upon, but at the moment it works
871 * and the fast path through the routine is fine.
872 *
873 * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times
874 * in xl_rx so would increase the size of the function significantly.
875 */
876
877 static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */
878 {
879 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
880 int prev_ring_loc ;
881
882 prev_ring_loc = (xl_priv->rx_ring_tail + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1);
883 xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * xl_priv->rx_ring_tail) ;
884 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus = 0 ;
885 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upnextptr = 0 ;
886 xl_priv->rx_ring_tail++ ;
887 xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1) ;
888
889 return ;
890 }
891
892 static void xl_rx(struct net_device *dev)
893 {
894 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
895 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
896 struct sk_buff *skb, *skb2 ;
897 int frame_length = 0, copy_len = 0 ;
898 int temp_ring_loc ;
899
900 /*
901 * Receive the next frame, loop around the ring until all frames
902 * have been received.
903 */
904
905 while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */
906
907 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */
908
909 /*
910 * This is a pain, you need to go through all the descriptors until the last one
911 * for this frame to find the framelength
912 */
913
914 temp_ring_loc = xl_priv->rx_ring_tail ;
915
916 while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) {
917 temp_ring_loc++ ;
918 temp_ring_loc &= (XL_RX_RING_SIZE-1) ;
919 }
920
921 frame_length = xl_priv->xl_rx_ring[temp_ring_loc].framestatus & 0x7FFF ;
922
923 skb = dev_alloc_skb(frame_length) ;
924
925 if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */
926 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ;
927 while (xl_priv->rx_ring_tail != temp_ring_loc)
928 adv_rx_ring(dev) ;
929
930 adv_rx_ring(dev) ; /* One more time just for luck :) */
931 xl_priv->xl_stats.rx_dropped++ ;
932
933 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
934 return ;
935 }
936
937 skb->dev = dev ;
938
939 while (xl_priv->rx_ring_tail != temp_ring_loc) {
940 copy_len = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen & 0x7FFF ;
941 frame_length -= copy_len ;
942 pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
943 memcpy(skb_put(skb,copy_len), xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]->data, copy_len) ;
944 pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
945 adv_rx_ring(dev) ;
946 }
947
948 /* Now we have found the last fragment */
949 pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
950 memcpy(skb_put(skb,copy_len), xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]->data, frame_length) ;
951 /* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */
952 pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
953 adv_rx_ring(dev) ;
954 skb->protocol = tr_type_trans(skb,dev) ;
955 netif_rx(skb) ;
956
957 } else { /* Single Descriptor Used, simply swap buffers over, fast path */
958
959 frame_length = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & 0x7FFF ;
960
961 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
962
963 if (skb==NULL) { /* Still need to fix the rx ring */
964 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer \n",dev->name) ;
965 adv_rx_ring(dev) ;
966 xl_priv->xl_stats.rx_dropped++ ;
967 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
968 return ;
969 }
970
971 skb->dev = dev ;
972
973 skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ;
974 pci_unmap_single(xl_priv->pdev, xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr, xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
975 skb_put(skb2, frame_length) ;
976 skb2->protocol = tr_type_trans(skb2,dev) ;
977
978 xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ;
979 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
980 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG ;
981 adv_rx_ring(dev) ;
982 xl_priv->xl_stats.rx_packets++ ;
983 xl_priv->xl_stats.rx_bytes += frame_length ;
984
985 netif_rx(skb2) ;
986 } /* if multiple buffers */
987 dev->last_rx = jiffies ;
988 } /* while packet to do */
989
990 /* Clear the updComplete interrupt */
991 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
992 return ;
993 }
994
995 /*
996 * This is ruthless, it doesn't care what state the card is in it will
997 * completely reset the adapter.
998 */
999
1000 static void xl_reset(struct net_device *dev)
1001 {
1002 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1003 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1004 unsigned long t;
1005
1006 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1007
1008 /*
1009 * Must wait for cmdInProgress bit (12) to clear before continuing with
1010 * card configuration.
1011 */
1012
1013 t=jiffies;
1014 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1015 if(jiffies-t > 40*HZ) {
1016 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
1017 break ;
1018 }
1019 }
1020
1021 }
1022
1023 static void xl_freemem(struct net_device *dev)
1024 {
1025 struct xl_private *xl_priv=(struct xl_private *)dev->priv ;
1026 int i ;
1027
1028 for (i=0;i<XL_RX_RING_SIZE;i++) {
1029 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ;
1030 pci_unmap_single(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
1031 xl_priv->rx_ring_tail++ ;
1032 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1;
1033 }
1034
1035 /* unmap ring */
1036 pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ;
1037
1038 pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ;
1039
1040 kfree(xl_priv->xl_rx_ring) ;
1041 kfree(xl_priv->xl_tx_ring) ;
1042
1043 return ;
1044 }
1045
1046 static irqreturn_t xl_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1047 {
1048 struct net_device *dev = (struct net_device *)dev_id;
1049 struct xl_private *xl_priv =(struct xl_private *)dev->priv;
1050 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1051 u16 intstatus, macstatus ;
1052
1053 if (!dev) {
1054 printk(KERN_WARNING "Device structure dead, aaahhhh !\n") ;
1055 return IRQ_NONE;
1056 }
1057
1058 intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;
1059
1060 if (!(intstatus & 1)) /* We didn't generate the interrupt */
1061 return IRQ_NONE;
1062
1063 spin_lock(&xl_priv->xl_lock) ;
1064
1065 /*
1066 * Process the interrupt
1067 */
1068 /*
1069 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.
1070 */
1071 if (intstatus == 0x0001) {
1072 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1073 printk(KERN_INFO "%s: 00001 int received \n",dev->name) ;
1074 } else {
1075 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) {
1076
1077 /*
1078 * Host Error.
1079 * It may be possible to recover from this, but usually it means something
1080 * is seriously fubar, so we just close the adapter.
1081 */
1082
1083 if (intstatus & HOSTERRINT) {
1084 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x \n",dev->name,intstatus) ;
1085 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1086 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1087 netif_stop_queue(dev) ;
1088 xl_freemem(dev) ;
1089 free_irq(dev->irq,dev);
1090 xl_reset(dev) ;
1091 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1092 spin_unlock(&xl_priv->xl_lock) ;
1093 return IRQ_HANDLED;
1094 } /* Host Error */
1095
1096 if (intstatus & SRBRINT ) { /* Srbc interrupt */
1097 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1098 if (xl_priv->srb_queued)
1099 xl_srb_bh(dev) ;
1100 } /* SRBR Interrupt */
1101
1102 if (intstatus & TXUNDERRUN) { /* Issue DnReset command */
1103 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1104 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */
1105 /* !!! FIX-ME !!!!
1106 Must put a timeout check here ! */
1107 /* Empty Loop */
1108 }
1109 printk(KERN_WARNING "%s: TX Underrun received \n",dev->name) ;
1110 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1111 } /* TxUnderRun */
1112
1113 if (intstatus & ARBCINT ) { /* Arbc interrupt */
1114 xl_arb_cmd(dev) ;
1115 } /* Arbc */
1116
1117 if (intstatus & ASBFINT) {
1118 if (xl_priv->asb_queued == 1) {
1119 xl_asb_cmd(dev) ;
1120 } else if (xl_priv->asb_queued == 2) {
1121 xl_asb_bh(dev) ;
1122 } else {
1123 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1124 }
1125 } /* Asbf */
1126
1127 if (intstatus & UPCOMPINT ) /* UpComplete */
1128 xl_rx(dev) ;
1129
1130 if (intstatus & DNCOMPINT ) /* DnComplete */
1131 xl_dn_comp(dev) ;
1132
1133 if (intstatus & HARDERRINT ) { /* Hardware error */
1134 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1135 macstatus = readw(xl_mmio + MMIO_MACDATA) ;
1136 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name);
1137 if (macstatus & (1<<14))
1138 printk(KERN_WARNING "tchk error: Unrecoverable error \n") ;
1139 if (macstatus & (1<<3))
1140 printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ;
1141 if (macstatus & (1<<2))
1142 printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ;
1143 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ;
1144 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1145 netif_stop_queue(dev) ;
1146 xl_freemem(dev) ;
1147 free_irq(dev->irq,dev);
1148 unregister_netdev(dev) ;
1149 free_netdev(dev) ;
1150 xl_reset(dev) ;
1151 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1152 spin_unlock(&xl_priv->xl_lock) ;
1153 return IRQ_HANDLED;
1154 }
1155 } else {
1156 printk(KERN_WARNING "%s: Received Unknown interrupt : %04x \n", dev->name, intstatus) ;
1157 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1158 }
1159 }
1160
1161 /* Turn interrupts back on */
1162
1163 writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1164 writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1165
1166 spin_unlock(&xl_priv->xl_lock) ;
1167 return IRQ_HANDLED;
1168 }
1169
1170 /*
1171 * Tx - Polling configuration
1172 */
1173
1174 static int xl_xmit(struct sk_buff *skb, struct net_device *dev)
1175 {
1176 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1177 struct xl_tx_desc *txd ;
1178 int tx_head, tx_tail, tx_prev ;
1179 unsigned long flags ;
1180
1181 spin_lock_irqsave(&xl_priv->xl_lock,flags) ;
1182
1183 netif_stop_queue(dev) ;
1184
1185 if (xl_priv->free_ring_entries > 1 ) {
1186 /*
1187 * Set up the descriptor for the packet
1188 */
1189 tx_head = xl_priv->tx_ring_head ;
1190 tx_tail = xl_priv->tx_ring_tail ;
1191
1192 txd = &(xl_priv->xl_tx_ring[tx_head]) ;
1193 txd->dnnextptr = 0 ;
1194 txd->framestartheader = skb->len | TXDNINDICATE ;
1195 txd->buffer = pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE) ;
1196 txd->buffer_length = skb->len | TXDNFRAGLAST ;
1197 xl_priv->tx_ring_skb[tx_head] = skb ;
1198 xl_priv->xl_stats.tx_packets++ ;
1199 xl_priv->xl_stats.tx_bytes += skb->len ;
1200
1201 /*
1202 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1
1203 * to ensure no negative numbers in unsigned locations.
1204 */
1205
1206 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ;
1207
1208 xl_priv->tx_ring_head++ ;
1209 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ;
1210 xl_priv->free_ring_entries-- ;
1211
1212 xl_priv->xl_tx_ring[tx_prev].dnnextptr = xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head) ;
1213
1214 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */
1215 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */
1216
1217 netif_wake_queue(dev) ;
1218
1219 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1220
1221 return 0;
1222 } else {
1223 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1224 return 1;
1225 }
1226
1227 }
1228
1229 /*
1230 * The NIC has told us that a packet has been downloaded onto the card, we must
1231 * find out which packet it has done, clear the skb and information for the packet
1232 * then advance around the ring for all tranmitted packets
1233 */
1234
1235 static void xl_dn_comp(struct net_device *dev)
1236 {
1237 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1238 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1239 struct xl_tx_desc *txd ;
1240
1241
1242 if (xl_priv->tx_ring_tail == 255) {/* First time */
1243 xl_priv->xl_tx_ring[0].framestartheader = 0 ;
1244 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
1245 xl_priv->tx_ring_tail = 1 ;
1246 }
1247
1248 while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) {
1249 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ;
1250 pci_unmap_single(xl_priv->pdev,txd->buffer, xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE) ;
1251 txd->framestartheader = 0 ;
1252 txd->buffer = 0xdeadbeef ;
1253 txd->buffer_length = 0 ;
1254 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ;
1255 xl_priv->tx_ring_tail++ ;
1256 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ;
1257 xl_priv->free_ring_entries++ ;
1258 }
1259
1260 netif_wake_queue(dev) ;
1261
1262 writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1263 }
1264
1265 /*
1266 * Close the adapter properly.
1267 * This srb reply cannot be handled from interrupt context as we have
1268 * to free the interrupt from the driver.
1269 */
1270
1271 static int xl_close(struct net_device *dev)
1272 {
1273 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1274 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1275 unsigned long t ;
1276
1277 netif_stop_queue(dev) ;
1278
1279 /*
1280 * Close the adapter, need to stall the rx and tx queues.
1281 */
1282
1283 writew(DNSTALL, xl_mmio + MMIO_COMMAND) ;
1284 t=jiffies;
1285 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1286 schedule();
1287 if(jiffies-t > 10*HZ) {
1288 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name);
1289 break ;
1290 }
1291 }
1292 writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ;
1293 t=jiffies;
1294 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1295 schedule();
1296 if(jiffies-t > 10*HZ) {
1297 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name);
1298 break ;
1299 }
1300 }
1301 writew(UPSTALL, xl_mmio + MMIO_COMMAND) ;
1302 t=jiffies;
1303 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1304 schedule();
1305 if(jiffies-t > 10*HZ) {
1306 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name);
1307 break ;
1308 }
1309 }
1310
1311 /* Turn off interrupts, we will still get the indication though
1312 * so we can trap it
1313 */
1314
1315 writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ;
1316
1317 xl_srb_cmd(dev,CLOSE_NIC) ;
1318
1319 t=jiffies;
1320 while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
1321 schedule();
1322 if(jiffies-t > 10*HZ) {
1323 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name);
1324 break ;
1325 }
1326 }
1327 /* Read the srb response from the adapter */
1328
1329 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD);
1330 if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) {
1331 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response \n",dev->name) ;
1332 } else {
1333 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1334 if (readb(xl_mmio + MMIO_MACDATA)==0) {
1335 printk(KERN_INFO "%s: Adapter has been closed \n",dev->name) ;
1336 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1337
1338 xl_freemem(dev) ;
1339 free_irq(dev->irq,dev) ;
1340 } else {
1341 printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ;
1342 }
1343 }
1344
1345 /* Reset the upload and download logic */
1346
1347 writew(UPRESET, xl_mmio + MMIO_COMMAND) ;
1348 t=jiffies;
1349 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1350 schedule();
1351 if(jiffies-t > 10*HZ) {
1352 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name);
1353 break ;
1354 }
1355 }
1356 writew(DNRESET, xl_mmio + MMIO_COMMAND) ;
1357 t=jiffies;
1358 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1359 schedule();
1360 if(jiffies-t > 10*HZ) {
1361 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name);
1362 break ;
1363 }
1364 }
1365 xl_hw_reset(dev) ;
1366 return 0 ;
1367 }
1368
1369 static void xl_set_rx_mode(struct net_device *dev)
1370 {
1371 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1372 struct dev_mc_list *dmi ;
1373 unsigned char dev_mc_address[4] ;
1374 u16 options ;
1375 int i ;
1376
1377 if (dev->flags & IFF_PROMISC)
1378 options = 0x0004 ;
1379 else
1380 options = 0x0000 ;
1381
1382 if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */
1383 xl_priv->xl_copy_all_options = options ;
1384 xl_srb_cmd(dev, SET_RECEIVE_MODE) ;
1385 return ;
1386 }
1387
1388 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1389
1390 for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) {
1391 dev_mc_address[0] |= dmi->dmi_addr[2] ;
1392 dev_mc_address[1] |= dmi->dmi_addr[3] ;
1393 dev_mc_address[2] |= dmi->dmi_addr[4] ;
1394 dev_mc_address[3] |= dmi->dmi_addr[5] ;
1395 }
1396
1397 if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */
1398 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ;
1399 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ;
1400 }
1401 return ;
1402 }
1403
1404
1405 /*
1406 * We issued an srb command and now we must read
1407 * the response from the completed command.
1408 */
1409
1410 static void xl_srb_bh(struct net_device *dev)
1411 {
1412 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1413 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1414 u8 srb_cmd, ret_code ;
1415 int i ;
1416
1417 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1418 srb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1419 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1420 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1421
1422 /* Ret_code is standard across all commands */
1423
1424 switch (ret_code) {
1425 case 1:
1426 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ;
1427 break ;
1428 case 4:
1429 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command \n",dev->name,srb_cmd) ;
1430 break ;
1431
1432 case 6:
1433 printk(KERN_INFO "%s: Command: %d - Options Invalid for command \n",dev->name,srb_cmd) ;
1434 break ;
1435
1436 case 0: /* Successful command execution */
1437 switch (srb_cmd) {
1438 case READ_LOG: /* Returns 14 bytes of data from the NIC */
1439 if(xl_priv->xl_message_level)
1440 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ;
1441 /*
1442 * We still have to read the log even if message_level = 0 and we don't want
1443 * to see it
1444 */
1445 for (i=0;i<14;i++) {
1446 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1447 if(xl_priv->xl_message_level)
1448 printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ;
1449 }
1450 printk("\n") ;
1451 break ;
1452 case SET_FUNC_ADDRESS:
1453 if(xl_priv->xl_message_level)
1454 printk(KERN_INFO "%s: Functional Address Set \n",dev->name) ;
1455 break ;
1456 case CLOSE_NIC:
1457 if(xl_priv->xl_message_level)
1458 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler \n",dev->name) ;
1459 break ;
1460 case SET_MULTICAST_MODE:
1461 if(xl_priv->xl_message_level)
1462 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ;
1463 break ;
1464 case SET_RECEIVE_MODE:
1465 if(xl_priv->xl_message_level) {
1466 if (xl_priv->xl_copy_all_options == 0x0004)
1467 printk(KERN_INFO "%s: Entering promiscuous mode \n", dev->name) ;
1468 else
1469 printk(KERN_INFO "%s: Entering normal receive mode \n",dev->name) ;
1470 }
1471 break ;
1472
1473 } /* switch */
1474 break ;
1475 } /* switch */
1476 return ;
1477 }
1478
1479 static struct net_device_stats * xl_get_stats(struct net_device *dev)
1480 {
1481 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1482 return (struct net_device_stats *) &xl_priv->xl_stats;
1483 }
1484
1485 static int xl_set_mac_address (struct net_device *dev, void *addr)
1486 {
1487 struct sockaddr *saddr = addr ;
1488 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
1489
1490 if (netif_running(dev)) {
1491 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ;
1492 return -EIO ;
1493 }
1494
1495 memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ;
1496
1497 if (xl_priv->xl_message_level) {
1498 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0],
1499 xl_priv->xl_laa[1], xl_priv->xl_laa[2],
1500 xl_priv->xl_laa[3], xl_priv->xl_laa[4],
1501 xl_priv->xl_laa[5]);
1502 }
1503
1504 return 0 ;
1505 }
1506
1507 static void xl_arb_cmd(struct net_device *dev)
1508 {
1509 struct xl_private *xl_priv = (struct xl_private *) dev->priv;
1510 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1511 u8 arb_cmd ;
1512 u16 lan_status, lan_status_diff ;
1513
1514 writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1515 arb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1516
1517 if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */
1518 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1519
1520 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, ntohs(readw(xl_mmio + MMIO_MACDATA) )) ;
1521
1522 lan_status = ntohs(readw(xl_mmio + MMIO_MACDATA));
1523
1524 /* Acknowledge interrupt, this tells nic we are done with the arb */
1525 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1526
1527 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ;
1528
1529 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) {
1530 if (lan_status_diff & LSC_LWF)
1531 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1532 if (lan_status_diff & LSC_ARW)
1533 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1534 if (lan_status_diff & LSC_FPE)
1535 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1536 if (lan_status_diff & LSC_RR)
1537 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1538
1539 /* Adapter has been closed by the hardware */
1540
1541 netif_stop_queue(dev);
1542 xl_freemem(dev) ;
1543 free_irq(dev->irq,dev);
1544
1545 printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ;
1546 } /* If serious error */
1547
1548 if (xl_priv->xl_message_level) {
1549 if (lan_status_diff & LSC_SIG_LOSS)
1550 printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ;
1551 if (lan_status_diff & LSC_HARD_ERR)
1552 printk(KERN_INFO "%s: Beaconing \n",dev->name);
1553 if (lan_status_diff & LSC_SOFT_ERR)
1554 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name);
1555 if (lan_status_diff & LSC_TRAN_BCN)
1556 printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name);
1557 if (lan_status_diff & LSC_SS)
1558 printk(KERN_INFO "%s: Single Station on the ring \n", dev->name);
1559 if (lan_status_diff & LSC_RING_REC)
1560 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1561 if (lan_status_diff & LSC_FDX_MODE)
1562 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1563 }
1564
1565 if (lan_status_diff & LSC_CO) {
1566 if (xl_priv->xl_message_level)
1567 printk(KERN_INFO "%s: Counter Overflow \n", dev->name);
1568 /* Issue READ.LOG command */
1569 xl_srb_cmd(dev, READ_LOG) ;
1570 }
1571
1572 /* There is no command in the tech docs to issue the read_sr_counters */
1573 if (lan_status_diff & LSC_SR_CO) {
1574 if (xl_priv->xl_message_level)
1575 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1576 }
1577
1578 xl_priv->xl_lan_status = lan_status ;
1579
1580 } /* Lan.change.status */
1581 else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */
1582 #if XL_DEBUG
1583 printk(KERN_INFO "Received.Data \n") ;
1584 #endif
1585 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1586 xl_priv->mac_buffer = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
1587
1588 /* Now we are going to be really basic here and not do anything
1589 * with the data at all. The tech docs do not give me enough
1590 * information to calculate the buffers properly so we're
1591 * just going to tell the nic that we've dealt with the frame
1592 * anyway.
1593 */
1594
1595 dev->last_rx = jiffies ;
1596 /* Acknowledge interrupt, this tells nic we are done with the arb */
1597 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1598
1599 /* Is the ASB free ? */
1600
1601 xl_priv->asb_queued = 0 ;
1602 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1603 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) {
1604 xl_priv->asb_queued = 1 ;
1605
1606 xl_wait_misr_flags(dev) ;
1607
1608 writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD);
1609 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1610 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1611 writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ;
1612 return ;
1613 /* Drop out and wait for the bottom half to be run */
1614 }
1615
1616 xl_asb_cmd(dev) ;
1617
1618 } else {
1619 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x \n",dev->name,arb_cmd) ;
1620 }
1621
1622 /* Acknowledge the arb interrupt */
1623
1624 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1625
1626 return ;
1627 }
1628
1629
1630 /*
1631 * There is only one asb command, but we can get called from different
1632 * places.
1633 */
1634
1635 static void xl_asb_cmd(struct net_device *dev)
1636 {
1637 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1638 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1639
1640 if (xl_priv->asb_queued == 1)
1641 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1642
1643 writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1644 writeb(0x81, xl_mmio + MMIO_MACDATA) ;
1645
1646 writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1647 writew(ntohs(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ;
1648
1649 xl_wait_misr_flags(dev) ;
1650
1651 writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD);
1652 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1653
1654 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1655 writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ;
1656
1657 xl_priv->asb_queued = 2 ;
1658
1659 return ;
1660 }
1661
1662 /*
1663 * This will only get called if there was an error
1664 * from the asb cmd.
1665 */
1666 static void xl_asb_bh(struct net_device *dev)
1667 {
1668 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1669 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1670 u8 ret_code ;
1671
1672 writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1673 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1674 switch (ret_code) {
1675 case 0x01:
1676 printk(KERN_INFO "%s: ASB Command, unrecognized command code \n",dev->name) ;
1677 break ;
1678 case 0x26:
1679 printk(KERN_INFO "%s: ASB Command, unexpected receive buffer \n", dev->name) ;
1680 break ;
1681 case 0x40:
1682 printk(KERN_INFO "%s: ASB Command, Invalid Station ID \n", dev->name) ;
1683 break ;
1684 }
1685 xl_priv->asb_queued = 0 ;
1686 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1687 return ;
1688 }
1689
1690 /*
1691 * Issue srb commands to the nic
1692 */
1693
1694 static void xl_srb_cmd(struct net_device *dev, int srb_cmd)
1695 {
1696 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1697 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1698
1699 switch (srb_cmd) {
1700 case READ_LOG:
1701 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1702 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ;
1703 break;
1704
1705 case CLOSE_NIC:
1706 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1707 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ;
1708 break ;
1709
1710 case SET_RECEIVE_MODE:
1711 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1712 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ;
1713 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1714 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ;
1715 break ;
1716
1717 case SET_FUNC_ADDRESS:
1718 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1719 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ;
1720 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1721 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ;
1722 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1723 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ;
1724 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1725 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ;
1726 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1727 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;
1728 break ;
1729 } /* switch */
1730
1731
1732 xl_wait_misr_flags(dev) ;
1733
1734 /* Write 0xff to the CSRB flag */
1735 writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1736 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
1737 /* Set csrb bit in MISR register to process command */
1738 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1739 writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ;
1740 xl_priv->srb_queued = 1 ;
1741
1742 return ;
1743 }
1744
1745 /*
1746 * This is nasty, to use the MISR command you have to wait for 6 memory locations
1747 * to be zero. This is the way the driver does on other OS'es so we should be ok with
1748 * the empty loop.
1749 */
1750
1751 static void xl_wait_misr_flags(struct net_device *dev)
1752 {
1753 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1754 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1755
1756 int i ;
1757
1758 writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1759 if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */
1760 for (i=0; i<6; i++) {
1761 writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1762 while (readb(xl_mmio + MMIO_MACDATA) != 0 ) {} ; /* Empty Loop */
1763 }
1764 }
1765
1766 writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1767 writeb(0x80, xl_mmio + MMIO_MACDATA) ;
1768
1769 return ;
1770 }
1771
1772 /*
1773 * Change mtu size, this should work the same as olympic
1774 */
1775
1776 static int xl_change_mtu(struct net_device *dev, int mtu)
1777 {
1778 struct xl_private *xl_priv = (struct xl_private *) dev->priv;
1779 u16 max_mtu ;
1780
1781 if (xl_priv->xl_ring_speed == 4)
1782 max_mtu = 4500 ;
1783 else
1784 max_mtu = 18000 ;
1785
1786 if (mtu > max_mtu)
1787 return -EINVAL ;
1788 if (mtu < 100)
1789 return -EINVAL ;
1790
1791 dev->mtu = mtu ;
1792 xl_priv->pkt_buf_sz = mtu + TR_HLEN ;
1793
1794 return 0 ;
1795 }
1796
1797 static void __devexit xl_remove_one (struct pci_dev *pdev)
1798 {
1799 struct net_device *dev = pci_get_drvdata(pdev);
1800 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1801
1802 unregister_netdev(dev);
1803 iounmap(xl_priv->xl_mmio) ;
1804 pci_release_regions(pdev) ;
1805 pci_set_drvdata(pdev,NULL) ;
1806 free_netdev(dev);
1807 return ;
1808 }
1809
1810 static struct pci_driver xl_3c359_driver = {
1811 .name = "3c359",
1812 .id_table = xl_pci_tbl,
1813 .probe = xl_probe,
1814 .remove = __devexit_p(xl_remove_one),
1815 };
1816
1817 static int __init xl_pci_init (void)
1818 {
1819 return pci_module_init (&xl_3c359_driver);
1820 }
1821
1822
1823 static void __exit xl_pci_cleanup (void)
1824 {
1825 pci_unregister_driver (&xl_3c359_driver);
1826 }
1827
1828 module_init(xl_pci_init);
1829 module_exit(xl_pci_cleanup);
1830
1831 MODULE_LICENSE("GPL") ;
Linux with added FPC-III support