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Linux 2.6.17.7
[linux/fpc-iii.git] / drivers / pcmcia / au1000_pb1x00.c
blobfd5522ede867c6ea18421493e213aa6eaad7851a
1 /*
2 *
3 * Alchemy Semi Pb1x00 boards specific pcmcia routines.
4 *
5 * Copyright 2002 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 */
24 #include <linux/config.h>
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/kernel.h>
30 #include <linux/tqueue.h>
31 #include <linux/timer.h>
32 #include <linux/mm.h>
33 #include <linux/proc_fs.h>
34 #include <linux/types.h>
35
36 #include <pcmcia/cs_types.h>
37 #include <pcmcia/cs.h>
38 #include <pcmcia/ss.h>
39 #include <pcmcia/bulkmem.h>
40 #include <pcmcia/cistpl.h>
41 #include <pcmcia/bus_ops.h>
42 #include "cs_internal.h"
43
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/system.h>
47
48 #include <asm/au1000.h>
49 #include <asm/au1000_pcmcia.h>
50
51 #define debug(fmt, arg...) do { } while (0)
52
53 #ifdef CONFIG_MIPS_PB1000
54 #include <asm/pb1000.h>
55 #define PCMCIA_IRQ AU1000_GPIO_15
56 #elif defined (CONFIG_MIPS_PB1500)
57 #include <asm/pb1500.h>
58 #define PCMCIA_IRQ AU1500_GPIO_203
59 #elif defined (CONFIG_MIPS_PB1100)
60 #include <asm/pb1100.h>
61 #define PCMCIA_IRQ AU1000_GPIO_11
62 #endif
63
64 static int pb1x00_pcmcia_init(struct pcmcia_init *init)
65 {
66 #ifdef CONFIG_MIPS_PB1000
67 u16 pcr;
68 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
69
70 au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
71 au_sync_delay(100);
72 au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
73 au_sync();
74
75 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
76 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
77 au_writel(pcr, PB1000_PCR);
78 au_sync_delay(20);
79
80 return PCMCIA_NUM_SOCKS;
81
82 #else /* fixme -- take care of the Pb1500 at some point */
83
84 u16 pcr;
85 pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
86 pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
87 au_writew(pcr, PCMCIA_BOARD_REG);
88 au_sync_delay(500);
89 return PCMCIA_NUM_SOCKS;
90 #endif
91 }
92
93 static int pb1x00_pcmcia_shutdown(void)
94 {
95 #ifdef CONFIG_MIPS_PB1000
96 u16 pcr;
97 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
98 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
99 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
100 au_writel(pcr, PB1000_PCR);
101 au_sync_delay(20);
102 return 0;
103 #else
104 u16 pcr;
105 pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
106 pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
107 au_writew(pcr, PCMCIA_BOARD_REG);
108 au_sync_delay(2);
109 return 0;
110 #endif
111 }
112
113 static int
114 pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
115 {
116 u32 inserted0, inserted1;
117 u16 vs0, vs1;
118
119 #ifdef CONFIG_MIPS_PB1000
120 vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
121 inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
122 inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
123 vs0 = (vs0 >> 4) & 0x3;
124 vs1 = (vs1 >> 12) & 0x3;
125 #else
126 vs0 = (au_readw(BOARD_STATUS_REG) >> 4) & 0x3;
127 #ifdef CONFIG_MIPS_PB1500
128 inserted0 = !((au_readl(GPIO2_PINSTATE) >> 1) & 0x1); /* gpio 201 */
129 #else /* Pb1100 */
130 inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
131 #endif
132 inserted1 = 0;
133 #endif
134
135 state->ready = 0;
136 state->vs_Xv = 0;
137 state->vs_3v = 0;
138 state->detect = 0;
139
140 if (sock == 0) {
141 if (inserted0) {
142 switch (vs0) {
143 case 0:
144 case 2:
145 state->vs_3v=1;
146 break;
147 case 3: /* 5V */
148 break;
149 default:
150 /* return without setting 'detect' */
151 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
152 vs0);
153 return 0;
154 }
155 state->detect = 1;
156 }
157 }
158 else {
159 if (inserted1) {
160 switch (vs1) {
161 case 0:
162 case 2:
163 state->vs_3v=1;
164 break;
165 case 3: /* 5V */
166 break;
167 default:
168 /* return without setting 'detect' */
169 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
170 vs1);
171 return 0;
172 }
173 state->detect = 1;
174 }
175 }
176
177 if (state->detect) {
178 state->ready = 1;
179 }
180
181 state->bvd1=1;
182 state->bvd2=1;
183 state->wrprot=0;
184 return 1;
185 }
186
187
188 static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
189 {
190
191 if(info->sock > PCMCIA_MAX_SOCK) return -1;
192
193 /*
194 * Even in the case of the Pb1000, both sockets are connected
195 * to the same irq line.
196 */
197 info->irq = PCMCIA_IRQ;
198
199 return 0;
200 }
201
202
203 static int
204 pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
205 {
206 u16 pcr;
207
208 if(configure->sock > PCMCIA_MAX_SOCK) return -1;
209
210 #ifdef CONFIG_MIPS_PB1000
211 pcr = au_readl(PB1000_PCR);
212
213 if (configure->sock == 0) {
214 pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
215 PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
216 }
217 else {
218 pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
219 PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
220 }
221
222 pcr &= ~PCR_SLOT_0_RST;
223 debug("Vcc %dV Vpp %dV, pcr %x\n",
224 configure->vcc, configure->vpp, pcr);
225 switch(configure->vcc){
226 case 0: /* Vcc 0 */
227 switch(configure->vpp) {
228 case 0:
229 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
230 configure->sock);
231 break;
232 case 12:
233 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
234 configure->sock);
235 break;
236 case 50:
237 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
238 configure->sock);
239 break;
240 case 33:
241 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
242 configure->sock);
243 break;
244 default:
245 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
246 configure->sock);
247 printk("%s: bad Vcc/Vpp (%d:%d)\n",
248 __FUNCTION__,
249 configure->vcc,
250 configure->vpp);
251 break;
252 }
253 break;
254 case 50: /* Vcc 5V */
255 switch(configure->vpp) {
256 case 0:
257 pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
258 configure->sock);
259 break;
260 case 50:
261 pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
262 configure->sock);
263 break;
264 case 12:
265 pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
266 configure->sock);
267 break;
268 case 33:
269 pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
270 configure->sock);
271 break;
272 default:
273 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
274 configure->sock);
275 printk("%s: bad Vcc/Vpp (%d:%d)\n",
276 __FUNCTION__,
277 configure->vcc,
278 configure->vpp);
279 break;
280 }
281 break;
282 case 33: /* Vcc 3.3V */
283 switch(configure->vpp) {
284 case 0:
285 pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
286 configure->sock);
287 break;
288 case 50:
289 pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
290 configure->sock);
291 break;
292 case 12:
293 pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
294 configure->sock);
295 break;
296 case 33:
297 pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
298 configure->sock);
299 break;
300 default:
301 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
302 configure->sock);
303 printk("%s: bad Vcc/Vpp (%d:%d)\n",
304 __FUNCTION__,
305 configure->vcc,
306 configure->vpp);
307 break;
308 }
309 break;
310 default: /* what's this ? */
311 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
312 printk(KERN_ERR "%s: bad Vcc %d\n",
313 __FUNCTION__, configure->vcc);
314 break;
315 }
316
317 if (configure->sock == 0) {
318 pcr &= ~(PCR_SLOT_0_RST);
319 if (configure->reset)
320 pcr |= PCR_SLOT_0_RST;
321 }
322 else {
323 pcr &= ~(PCR_SLOT_1_RST);
324 if (configure->reset)
325 pcr |= PCR_SLOT_1_RST;
326 }
327 au_writel(pcr, PB1000_PCR);
328 au_sync_delay(300);
329
330 #else
331
332 pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf;
333
334 debug("Vcc %dV Vpp %dV, pcr %x, reset %d\n",
335 configure->vcc, configure->vpp, pcr, configure->reset);
336
337
338 switch(configure->vcc){
339 case 0: /* Vcc 0 */
340 pcr |= SET_VCC_VPP(0,0);
341 break;
342 case 50: /* Vcc 5V */
343 switch(configure->vpp) {
344 case 0:
345 pcr |= SET_VCC_VPP(2,0);
346 break;
347 case 50:
348 pcr |= SET_VCC_VPP(2,1);
349 break;
350 case 12:
351 pcr |= SET_VCC_VPP(2,2);
352 break;
353 case 33:
354 default:
355 pcr |= SET_VCC_VPP(0,0);
356 printk("%s: bad Vcc/Vpp (%d:%d)\n",
357 __FUNCTION__,
358 configure->vcc,
359 configure->vpp);
360 break;
361 }
362 break;
363 case 33: /* Vcc 3.3V */
364 switch(configure->vpp) {
365 case 0:
366 pcr |= SET_VCC_VPP(1,0);
367 break;
368 case 12:
369 pcr |= SET_VCC_VPP(1,2);
370 break;
371 case 33:
372 pcr |= SET_VCC_VPP(1,1);
373 break;
374 case 50:
375 default:
376 pcr |= SET_VCC_VPP(0,0);
377 printk("%s: bad Vcc/Vpp (%d:%d)\n",
378 __FUNCTION__,
379 configure->vcc,
380 configure->vpp);
381 break;
382 }
383 break;
384 default: /* what's this ? */
385 pcr |= SET_VCC_VPP(0,0);
386 printk(KERN_ERR "%s: bad Vcc %d\n",
387 __FUNCTION__, configure->vcc);
388 break;
389 }
390
391 au_writew(pcr, PCMCIA_BOARD_REG);
392 au_sync_delay(300);
393
394 if (!configure->reset) {
395 pcr |= PC_DRV_EN;
396 au_writew(pcr, PCMCIA_BOARD_REG);
397 au_sync_delay(100);
398 pcr |= PC_DEASSERT_RST;
399 au_writew(pcr, PCMCIA_BOARD_REG);
400 au_sync_delay(100);
401 }
402 else {
403 pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
404 au_writew(pcr, PCMCIA_BOARD_REG);
405 au_sync_delay(100);
406 }
407 #endif
408 return 0;
409 }
410
411
412 struct pcmcia_low_level pb1x00_pcmcia_ops = {
413 pb1x00_pcmcia_init,
414 pb1x00_pcmcia_shutdown,
415 pb1x00_pcmcia_socket_state,
416 pb1x00_pcmcia_get_irq_info,
417 pb1x00_pcmcia_configure_socket
418 };
Linux with added FPC-III support