1 menu "IRQ chip support"
10 select IRQ_DOMAIN_HIERARCHY
11 select MULTI_IRQ_HANDLER
12 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
22 default 2 if ARCH_REALVIEW
37 select MULTI_IRQ_HANDLER
38 select IRQ_DOMAIN_HIERARCHY
39 select PARTITION_PERCPU
40 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
44 select GENERIC_MSI_IRQ_DOMAIN
47 config ARM_GIC_V3_ITS_PCI
49 depends on ARM_GIC_V3_ITS
52 default ARM_GIC_V3_ITS
54 config ARM_GIC_V3_ITS_FSL_MC
56 depends on ARM_GIC_V3_ITS
58 default ARM_GIC_V3_ITS
63 select IRQ_DOMAIN_HIERARCHY
64 select GENERIC_IRQ_CHIP
69 select MULTI_IRQ_HANDLER
73 default 4 if ARCH_S5PV210
77 The maximum number of VICs available in the system, for
80 config ARMADA_370_XP_IRQ
82 select GENERIC_IRQ_CHIP
84 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
90 select GENERIC_IRQ_CHIP
94 select GENERIC_IRQ_CHIP
96 select MULTI_IRQ_HANDLER
101 select GENERIC_IRQ_CHIP
103 select MULTI_IRQ_HANDLER
110 config BCM6345_L1_IRQ
112 select GENERIC_IRQ_CHIP
114 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
116 config BCM7038_L1_IRQ
118 select GENERIC_IRQ_CHIP
120 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
122 config BCM7120_L2_IRQ
124 select GENERIC_IRQ_CHIP
127 config BRCMSTB_L2_IRQ
129 select GENERIC_IRQ_CHIP
134 select GENERIC_IRQ_CHIP
137 config FARADAY_FTINTC010
140 select MULTI_IRQ_HANDLER
143 config HISILICON_IRQ_MBIGEN
146 select ARM_GIC_V3_ITS
150 select GENERIC_IRQ_CHIP
155 select GENERIC_IRQ_CHIP
156 select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
158 select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
159 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
161 config CLPS711X_IRQCHIP
163 depends on ARCH_CLPS711X
165 select MULTI_IRQ_HANDLER
178 select GENERIC_IRQ_CHIP
184 select MULTI_IRQ_HANDLER
188 select GENERIC_IRQ_CHIP
192 bool "J-Core integrated AIC" if COMPILE_TEST
196 Support for the J-Core integrated AIC.
198 config RENESAS_INTC_IRQPIN
204 select GENERIC_IRQ_CHIP
212 Enables SysCfg Controlled IRQs on STi based platforms.
217 select GENERIC_IRQ_CHIP
222 select GENERIC_IRQ_CHIP
225 tristate "TS-4800 IRQ controller"
228 depends on SOC_IMX51 || COMPILE_TEST
230 Support for the TS-4800 FPGA IRQ controller
232 config VERSATILE_FPGA_IRQ
236 config VERSATILE_FPGA_IRQ_NR
239 depends on VERSATILE_FPGA_IRQ
244 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
253 Support for a CROSSBAR ip that precedes the main interrupt controller.
254 The primary irqchip invokes the crossbar's callback which inturn allocates
255 a free irq and configures the IP. Thus the peripheral interrupts are
256 routed to one of the free irqchip interrupt lines.
259 tristate "Keystone 2 IRQ controller IP"
260 depends on ARCH_KEYSTONE
262 Support for Texas Instruments Keystone 2 IRQ controller IP which
263 is part of the Keystone 2 IPC mechanism
267 select GENERIC_IRQ_IPI
268 select IRQ_DOMAIN_HIERARCHY
273 depends on MACH_INGENIC
276 config RENESAS_H8300H_INTC
280 config RENESAS_H8S_INTC
288 Enables the wakeup IRQs for IMX platforms with GPCv2 block
291 def_bool y if MACH_ASM9260 || ARCH_MXS
295 config MSCC_OCELOT_IRQ
298 select GENERIC_IRQ_CHIP
308 select GENERIC_MSI_IRQ_DOMAIN
314 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
315 depends on PCI && PCI_MSI
317 config PARTITION_PERCPU
321 bool "NPS400 Global Interrupt Manager (GIM)"
322 depends on ARC || (COMPILE_TEST && !64BIT)
325 Support the EZchip NPS400 global interrupt controller
330 select GENERIC_IRQ_CHIP
332 config QCOM_IRQ_COMBINER
333 bool "QCOM IRQ combiner support"
334 depends on ARCH_QCOM && ACPI
336 select IRQ_DOMAIN_HIERARCHY
338 Say yes here to add support for the IRQ combiner devices embedded
339 in Qualcomm Technologies chips.
341 config IRQ_UNIPHIER_AIDET
342 bool "UniPhier AIDET support" if COMPILE_TEST
343 depends on ARCH_UNIPHIER || COMPILE_TEST
344 default ARCH_UNIPHIER
345 select IRQ_DOMAIN_HIERARCHY
347 Support for the UniPhier AIDET (ARM Interrupt Detector).
349 config MESON_IRQ_GPIO
350 bool "Meson GPIO Interrupt Multiplexer"
351 depends on ARCH_MESON
353 select IRQ_DOMAIN_HIERARCHY
355 Support Meson SoC Family GPIO Interrupt Multiplexer
358 bool "Goldfish programmable interrupt controller"
359 depends on MIPS && (GOLDFISH || COMPILE_TEST)
362 Say yes here to enable Goldfish interrupt controller driver used
363 for Goldfish based virtual platforms.
369 select IRQ_DOMAIN_HIERARCHY
371 Power Domain Controller driver to manage and configure wakeup
372 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.