sound/soc/samsung/smdk_wm8580pcm.c

   1 /*
   2  *  sound/soc/samsung/smdk_wm8580pcm.c
   3  *
   4  *  Copyright (c) 2011 Samsung Electronics Co. Ltd
   5  *
   6  *  This program is free software; you can redistribute  it and/or  modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  */
  11 #include <linux/module.h>
  12 #include <sound/soc.h>
  13 #include <sound/pcm_params.h>
  14 #include <sound/pcm.h>
  15
  16 #include <asm/mach-types.h>
  17
  18 #include "../codecs/wm8580.h"
  19 #include "dma.h"
  20 #include "pcm.h"
  21
  22 /*
  23  * Board Settings:
  24  *  o '1' means 'ON'
  25  *  o '0' means 'OFF'
  26  *  o 'X' means 'Don't care'
  27  *
  28  * SMDK6410 Base B/D: CFG1-0000, CFG2-1111
  29  * SMDKC110, SMDKV210: CFGB11-100100, CFGB12-0000
  30  */
  31
  32 #define SMDK_WM8580_EXT_OSC 12000000
  33 #define SMDK_WM8580_EXT_MCLK 4096000
  34 #define SMDK_WM8580_EXT_VOICE 2048000
  35
  36 static unsigned long mclk_freq;
  37 static unsigned long xtal_freq;
  38
  39 /*
  40  * If MCLK clock directly gets from XTAL, we don't have to use PLL
  41  * to make MCLK, but if XTAL clock source connects with other codec
  42  * pin (like XTI), we should have to set codec's PLL to make MCLK.
  43  * Because Samsung SoC does not support pcmcdclk output like I2S.
  44  */
  45
  46 static int smdk_wm8580_pcm_hw_params(struct snd_pcm_substream *substream,
  47                               struct snd_pcm_hw_params *params)
  48 {
  49         struct snd_soc_pcm_runtime *rtd = substream->private_data;
  50         struct snd_soc_dai *codec_dai = rtd->codec_dai;
  51         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  52         int rfs, ret;
  53
  54         switch (params_rate(params)) {
  55         case 8000:
  56                 break;
  57         default:
  58                 printk(KERN_ERR "%s:%d Sampling Rate %u not supported!\n",
  59                 __func__, __LINE__, params_rate(params));
  60                 return -EINVAL;
  61         }
  62
  63         rfs = mclk_freq / params_rate(params) / 2;
  64
  65         /* Set the codec DAI configuration */
  66         ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
  67                                 | SND_SOC_DAIFMT_IB_NF
  68                                 | SND_SOC_DAIFMT_CBS_CFS);
  69         if (ret < 0)
  70                 return ret;
  71
  72         /* Set the cpu DAI configuration */
  73         ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
  74                                 | SND_SOC_DAIFMT_IB_NF
  75                                 | SND_SOC_DAIFMT_CBS_CFS);
  76         if (ret < 0)
  77                 return ret;
  78
  79         if (mclk_freq == xtal_freq) {
  80                 ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_MCLK,
  81                                                 mclk_freq, SND_SOC_CLOCK_IN);
  82                 if (ret < 0)
  83                         return ret;
  84
  85                 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
  86                                                 WM8580_CLKSRC_MCLK);
  87                 if (ret < 0)
  88                         return ret;
  89         } else {
  90                 ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_PLLA,
  91                                                 mclk_freq, SND_SOC_CLOCK_IN);
  92                 if (ret < 0)
  93                         return ret;
  94
  95                 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
  96                                                 WM8580_CLKSRC_PLLA);
  97                 if (ret < 0)
  98                         return ret;
  99
 100                 ret = snd_soc_dai_set_pll(codec_dai, WM8580_PLLA, 0,
 101                                                 xtal_freq, mclk_freq);
 102                 if (ret < 0)
 103                         return ret;
 104         }
 105
 106         /* Set PCM source clock on CPU */
 107         ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
 108                                         mclk_freq, SND_SOC_CLOCK_IN);
 109         if (ret < 0)
 110                 return ret;
 111
 112         /* Set SCLK_DIV for making bclk */
 113         ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
 114         if (ret < 0)
 115                 return ret;
 116
 117         return 0;
 118 }
 119
 120 static struct snd_soc_ops smdk_wm8580_pcm_ops = {
 121         .hw_params = smdk_wm8580_pcm_hw_params,
 122 };
 123
 124 static struct snd_soc_dai_link smdk_dai[] = {
 125         {
 126                 .name = "WM8580 PAIF PCM RX",
 127                 .stream_name = "Playback",
 128                 .cpu_dai_name = "samsung-pcm.0",
 129                 .codec_dai_name = "wm8580-hifi-playback",
 130                 .platform_name = "samsung-audio",
 131                 .codec_name = "wm8580.0-001b",
 132                 .ops = &smdk_wm8580_pcm_ops,
 133         }, {
 134                 .name = "WM8580 PAIF PCM TX",
 135                 .stream_name = "Capture",
 136                 .cpu_dai_name = "samsung-pcm.0",
 137                 .codec_dai_name = "wm8580-hifi-capture",
 138                 .platform_name = "samsung-pcm.0",
 139                 .codec_name = "wm8580.0-001b",
 140                 .ops = &smdk_wm8580_pcm_ops,
 141         },
 142 };
 143
 144 static struct snd_soc_card smdk_pcm = {
 145         .name = "SMDK-PCM",
 146         .owner = THIS_MODULE,
 147         .dai_link = smdk_dai,
 148         .num_links = 2,
 149 };
 150
 151 /*
 152  * After SMDKC110 Base Board's Rev is '0.1', 12MHz External OSC(X1)
 153  * is absent (or not connected), so we connect EXT_VOICE_CLK(OSC4),
 154  * 2.0484Mhz, directly with MCLK both Codec and SoC.
 155  */
 156 static int snd_smdk_probe(struct platform_device *pdev)
 157 {
 158         int ret = 0;
 159
 160         xtal_freq = SMDK_WM8580_EXT_OSC;
 161         mclk_freq = SMDK_WM8580_EXT_MCLK;
 162
 163         if (machine_is_smdkc110() || machine_is_smdkv210())
 164                 xtal_freq = mclk_freq = SMDK_WM8580_EXT_VOICE;
 165
 166         smdk_pcm.dev = &pdev->dev;
 167         ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm);
 168         if (ret)
 169                 dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
 170
 171         return ret;
 172 }
 173
 174 static struct platform_driver snd_smdk_driver = {
 175         .driver = {
 176                 .owner = THIS_MODULE,
 177                 .name = "samsung-smdk-pcm",
 178         },
 179         .probe = snd_smdk_probe,
 180 };
 181
 182 module_platform_driver(snd_smdk_driver);
 183
 184 MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
 185 MODULE_DESCRIPTION("ALSA SoC SMDK WM8580 for PCM");
 186 MODULE_LICENSE("GPL");