ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / drm_dp_helper.c
blobf1283878ff6df3000608773de43ee22e77cd7b59
1 /*
2 * Copyright © 2009 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/i2c.h>
30 #include <drm/drm_dp_helper.h>
31 #include <drm/drmP.h>
33 /**
34 * DOC: dp helpers
36 * These functions contain some common logic and helpers at various abstraction
37 * levels to deal with Display Port sink devices and related things like DP aux
38 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
39 * blocks, ...
42 /* Helpers for DP link training */
43 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
45 return link_status[r - DP_LANE0_1_STATUS];
48 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
49 int lane)
51 int i = DP_LANE0_1_STATUS + (lane >> 1);
52 int s = (lane & 1) * 4;
53 u8 l = dp_link_status(link_status, i);
54 return (l >> s) & 0xf;
57 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
58 int lane_count)
60 u8 lane_align;
61 u8 lane_status;
62 int lane;
64 lane_align = dp_link_status(link_status,
65 DP_LANE_ALIGN_STATUS_UPDATED);
66 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
67 return false;
68 for (lane = 0; lane < lane_count; lane++) {
69 lane_status = dp_get_lane_status(link_status, lane);
70 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
71 return false;
73 return true;
75 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
77 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
78 int lane_count)
80 int lane;
81 u8 lane_status;
83 for (lane = 0; lane < lane_count; lane++) {
84 lane_status = dp_get_lane_status(link_status, lane);
85 if ((lane_status & DP_LANE_CR_DONE) == 0)
86 return false;
88 return true;
90 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
92 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
93 int lane)
95 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
96 int s = ((lane & 1) ?
97 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
98 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
99 u8 l = dp_link_status(link_status, i);
101 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
103 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
105 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
106 int lane)
108 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
109 int s = ((lane & 1) ?
110 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
111 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
112 u8 l = dp_link_status(link_status, i);
114 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
116 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
118 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
119 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
120 udelay(100);
121 else
122 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
124 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
126 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
127 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
128 udelay(400);
129 else
130 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
132 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
134 u8 drm_dp_link_rate_to_bw_code(int link_rate)
136 switch (link_rate) {
137 case 162000:
138 default:
139 return DP_LINK_BW_1_62;
140 case 270000:
141 return DP_LINK_BW_2_7;
142 case 540000:
143 return DP_LINK_BW_5_4;
146 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
148 int drm_dp_bw_code_to_link_rate(u8 link_bw)
150 switch (link_bw) {
151 case DP_LINK_BW_1_62:
152 default:
153 return 162000;
154 case DP_LINK_BW_2_7:
155 return 270000;
156 case DP_LINK_BW_5_4:
157 return 540000;
160 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
163 * DOC: dp helpers
165 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
166 * independent access to AUX functionality. Drivers can take advantage of
167 * this by filling in the fields of the drm_dp_aux structure.
169 * Transactions are described using a hardware-independent drm_dp_aux_msg
170 * structure, which is passed into a driver's .transfer() implementation.
171 * Both native and I2C-over-AUX transactions are supported.
174 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
175 unsigned int offset, void *buffer, size_t size)
177 struct drm_dp_aux_msg msg;
178 unsigned int retry;
179 int err;
181 memset(&msg, 0, sizeof(msg));
182 msg.address = offset;
183 msg.request = request;
184 msg.buffer = buffer;
185 msg.size = size;
188 * The specification doesn't give any recommendation on how often to
189 * retry native transactions. We used to retry 7 times like for
190 * aux i2c transactions but real world devices this wasn't
191 * sufficient, bump to 32 which makes Dell 4k monitors happier.
193 for (retry = 0; retry < 32; retry++) {
195 mutex_lock(&aux->hw_mutex);
196 err = aux->transfer(aux, &msg);
197 mutex_unlock(&aux->hw_mutex);
198 if (err < 0) {
199 if (err == -EBUSY)
200 continue;
202 return err;
206 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
207 case DP_AUX_NATIVE_REPLY_ACK:
208 if (err < size)
209 return -EPROTO;
210 return err;
212 case DP_AUX_NATIVE_REPLY_NACK:
213 return -EIO;
215 case DP_AUX_NATIVE_REPLY_DEFER:
216 usleep_range(400, 500);
217 break;
221 DRM_DEBUG_KMS("too many retries, giving up\n");
222 return -EIO;
226 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
227 * @aux: DisplayPort AUX channel
228 * @offset: address of the (first) register to read
229 * @buffer: buffer to store the register values
230 * @size: number of bytes in @buffer
232 * Returns the number of bytes transferred on success, or a negative error
233 * code on failure. -EIO is returned if the request was NAKed by the sink or
234 * if the retry count was exceeded. If not all bytes were transferred, this
235 * function returns -EPROTO. Errors from the underlying AUX channel transfer
236 * function, with the exception of -EBUSY (which causes the transaction to
237 * be retried), are propagated to the caller.
239 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
240 void *buffer, size_t size)
242 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
243 size);
245 EXPORT_SYMBOL(drm_dp_dpcd_read);
248 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
249 * @aux: DisplayPort AUX channel
250 * @offset: address of the (first) register to write
251 * @buffer: buffer containing the values to write
252 * @size: number of bytes in @buffer
254 * Returns the number of bytes transferred on success, or a negative error
255 * code on failure. -EIO is returned if the request was NAKed by the sink or
256 * if the retry count was exceeded. If not all bytes were transferred, this
257 * function returns -EPROTO. Errors from the underlying AUX channel transfer
258 * function, with the exception of -EBUSY (which causes the transaction to
259 * be retried), are propagated to the caller.
261 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
262 void *buffer, size_t size)
264 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
265 size);
267 EXPORT_SYMBOL(drm_dp_dpcd_write);
270 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
271 * @aux: DisplayPort AUX channel
272 * @status: buffer to store the link status in (must be at least 6 bytes)
274 * Returns the number of bytes transferred on success or a negative error
275 * code on failure.
277 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
278 u8 status[DP_LINK_STATUS_SIZE])
280 return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
281 DP_LINK_STATUS_SIZE);
283 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
286 * drm_dp_link_probe() - probe a DisplayPort link for capabilities
287 * @aux: DisplayPort AUX channel
288 * @link: pointer to structure in which to return link capabilities
290 * The structure filled in by this function can usually be passed directly
291 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
292 * configure the link based on the link's capabilities.
294 * Returns 0 on success or a negative error code on failure.
296 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
298 u8 values[3];
299 int err;
301 memset(link, 0, sizeof(*link));
303 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
304 if (err < 0)
305 return err;
307 link->revision = values[0];
308 link->rate = drm_dp_bw_code_to_link_rate(values[1]);
309 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
311 if (values[2] & DP_ENHANCED_FRAME_CAP)
312 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
314 return 0;
316 EXPORT_SYMBOL(drm_dp_link_probe);
319 * drm_dp_link_power_up() - power up a DisplayPort link
320 * @aux: DisplayPort AUX channel
321 * @link: pointer to a structure containing the link configuration
323 * Returns 0 on success or a negative error code on failure.
325 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
327 u8 value;
328 int err;
330 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
331 if (link->revision < 0x11)
332 return 0;
334 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
335 if (err < 0)
336 return err;
338 value &= ~DP_SET_POWER_MASK;
339 value |= DP_SET_POWER_D0;
341 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
342 if (err < 0)
343 return err;
346 * According to the DP 1.1 specification, a "Sink Device must exit the
347 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
348 * Control Field" (register 0x600).
350 usleep_range(1000, 2000);
352 return 0;
354 EXPORT_SYMBOL(drm_dp_link_power_up);
357 * drm_dp_link_power_down() - power down a DisplayPort link
358 * @aux: DisplayPort AUX channel
359 * @link: pointer to a structure containing the link configuration
361 * Returns 0 on success or a negative error code on failure.
363 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
365 u8 value;
366 int err;
368 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
369 if (link->revision < 0x11)
370 return 0;
372 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
373 if (err < 0)
374 return err;
376 value &= ~DP_SET_POWER_MASK;
377 value |= DP_SET_POWER_D3;
379 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
380 if (err < 0)
381 return err;
383 return 0;
385 EXPORT_SYMBOL(drm_dp_link_power_down);
388 * drm_dp_link_configure() - configure a DisplayPort link
389 * @aux: DisplayPort AUX channel
390 * @link: pointer to a structure containing the link configuration
392 * Returns 0 on success or a negative error code on failure.
394 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
396 u8 values[2];
397 int err;
399 values[0] = drm_dp_link_rate_to_bw_code(link->rate);
400 values[1] = link->num_lanes;
402 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
403 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
405 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
406 if (err < 0)
407 return err;
409 return 0;
411 EXPORT_SYMBOL(drm_dp_link_configure);
414 * I2C-over-AUX implementation
417 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
419 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
420 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
421 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
422 I2C_FUNC_10BIT_ADDR;
426 * Transfer a single I2C-over-AUX message and handle various error conditions,
427 * retrying the transaction as appropriate. It is assumed that the
428 * aux->transfer function does not modify anything in the msg other than the
429 * reply field.
431 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
433 unsigned int retry;
434 int err;
437 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
438 * is required to retry at least seven times upon receiving AUX_DEFER
439 * before giving up the AUX transaction.
441 for (retry = 0; retry < 7; retry++) {
442 mutex_lock(&aux->hw_mutex);
443 err = aux->transfer(aux, msg);
444 mutex_unlock(&aux->hw_mutex);
445 if (err < 0) {
446 if (err == -EBUSY)
447 continue;
449 DRM_DEBUG_KMS("transaction failed: %d\n", err);
450 return err;
454 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
455 case DP_AUX_NATIVE_REPLY_ACK:
457 * For I2C-over-AUX transactions this isn't enough, we
458 * need to check for the I2C ACK reply.
460 break;
462 case DP_AUX_NATIVE_REPLY_NACK:
463 DRM_DEBUG_KMS("native nack\n");
464 return -EREMOTEIO;
466 case DP_AUX_NATIVE_REPLY_DEFER:
467 DRM_DEBUG_KMS("native defer");
469 * We could check for I2C bit rate capabilities and if
470 * available adjust this interval. We could also be
471 * more careful with DP-to-legacy adapters where a
472 * long legacy cable may force very low I2C bit rates.
474 * For now just defer for long enough to hopefully be
475 * safe for all use-cases.
477 usleep_range(500, 600);
478 continue;
480 default:
481 DRM_ERROR("invalid native reply %#04x\n", msg->reply);
482 return -EREMOTEIO;
485 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
486 case DP_AUX_I2C_REPLY_ACK:
488 * Both native ACK and I2C ACK replies received. We
489 * can assume the transfer was successful.
491 if (err < msg->size)
492 return -EPROTO;
493 return 0;
495 case DP_AUX_I2C_REPLY_NACK:
496 DRM_DEBUG_KMS("I2C nack\n");
497 aux->i2c_nack_count++;
498 return -EREMOTEIO;
500 case DP_AUX_I2C_REPLY_DEFER:
501 DRM_DEBUG_KMS("I2C defer\n");
502 aux->i2c_defer_count++;
503 usleep_range(400, 500);
504 continue;
506 default:
507 DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
508 return -EREMOTEIO;
512 DRM_DEBUG_KMS("too many retries, giving up\n");
513 return -EREMOTEIO;
516 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
517 int num)
519 struct drm_dp_aux *aux = adapter->algo_data;
520 unsigned int i, j;
521 struct drm_dp_aux_msg msg;
522 int err = 0;
524 memset(&msg, 0, sizeof(msg));
526 for (i = 0; i < num; i++) {
527 msg.address = msgs[i].addr;
528 msg.request = (msgs[i].flags & I2C_M_RD) ?
529 DP_AUX_I2C_READ :
530 DP_AUX_I2C_WRITE;
531 msg.request |= DP_AUX_I2C_MOT;
532 /* Send a bare address packet to start the transaction.
533 * Zero sized messages specify an address only (bare
534 * address) transaction.
536 msg.buffer = NULL;
537 msg.size = 0;
538 err = drm_dp_i2c_do_msg(aux, &msg);
539 if (err < 0)
540 break;
542 * Many hardware implementations support FIFOs larger than a
543 * single byte, but it has been empirically determined that
544 * transferring data in larger chunks can actually lead to
545 * decreased performance. Therefore each message is simply
546 * transferred byte-by-byte.
548 for (j = 0; j < msgs[i].len; j++) {
549 msg.buffer = msgs[i].buf + j;
550 msg.size = 1;
552 err = drm_dp_i2c_do_msg(aux, &msg);
553 if (err < 0)
554 break;
556 if (err < 0)
557 break;
559 if (err >= 0)
560 err = num;
561 /* Send a bare address packet to close out the transaction.
562 * Zero sized messages specify an address only (bare
563 * address) transaction.
565 msg.request &= ~DP_AUX_I2C_MOT;
566 msg.buffer = NULL;
567 msg.size = 0;
568 (void)drm_dp_i2c_do_msg(aux, &msg);
570 return err;
573 static const struct i2c_algorithm drm_dp_i2c_algo = {
574 .functionality = drm_dp_i2c_functionality,
575 .master_xfer = drm_dp_i2c_xfer,
579 * drm_dp_aux_register() - initialise and register aux channel
580 * @aux: DisplayPort AUX channel
582 * Returns 0 on success or a negative error code on failure.
584 int drm_dp_aux_register(struct drm_dp_aux *aux)
586 mutex_init(&aux->hw_mutex);
588 aux->ddc.algo = &drm_dp_i2c_algo;
589 aux->ddc.algo_data = aux;
590 aux->ddc.retries = 3;
592 aux->ddc.class = I2C_CLASS_DDC;
593 aux->ddc.owner = THIS_MODULE;
594 aux->ddc.dev.parent = aux->dev;
595 aux->ddc.dev.of_node = aux->dev->of_node;
597 strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
598 sizeof(aux->ddc.name));
600 return i2c_add_adapter(&aux->ddc);
602 EXPORT_SYMBOL(drm_dp_aux_register);
605 * drm_dp_aux_unregister() - unregister an AUX adapter
606 * @aux: DisplayPort AUX channel
608 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
610 i2c_del_adapter(&aux->ddc);
612 EXPORT_SYMBOL(drm_dp_aux_unregister);