ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_bo.h
blobe42360983229960162d057f1e03422616f75a55f
1 #ifndef __NOUVEAU_BO_H__
2 #define __NOUVEAU_BO_H__
4 #include <drm/drm_gem.h>
6 struct nouveau_channel;
7 struct nouveau_fence;
8 struct nvkm_vma;
10 struct nouveau_bo {
11 struct ttm_buffer_object bo;
12 struct ttm_placement placement;
13 u32 valid_domains;
14 struct ttm_place placements[3];
15 struct ttm_place busy_placements[3];
16 bool force_coherent;
17 struct ttm_bo_kmap_obj kmap;
18 struct list_head head;
20 /* protected by ttm_bo_reserve() */
21 struct drm_file *reserved_by;
22 struct list_head entry;
23 int pbbo_index;
24 bool validate_mapped;
26 struct list_head vma_list;
27 unsigned page_shift;
29 u32 tile_mode;
30 u32 tile_flags;
31 struct nouveau_drm_tile *tile;
33 /* Only valid if allocated via nouveau_gem_new() and iff you hold a
34 * gem reference to it! For debugging, use gem.filp != NULL to test
35 * whether it is valid. */
36 struct drm_gem_object gem;
38 /* protect by the ttm reservation lock */
39 int pin_refcnt;
41 struct ttm_bo_kmap_obj dma_buf_vmap;
44 static inline struct nouveau_bo *
45 nouveau_bo(struct ttm_buffer_object *bo)
47 return container_of(bo, struct nouveau_bo, bo);
50 static inline int
51 nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
53 struct nouveau_bo *prev;
55 if (!pnvbo)
56 return -EINVAL;
57 prev = *pnvbo;
59 *pnvbo = ref ? nouveau_bo(ttm_bo_reference(&ref->bo)) : NULL;
60 if (prev) {
61 struct ttm_buffer_object *bo = &prev->bo;
63 ttm_bo_unref(&bo);
66 return 0;
69 extern struct ttm_bo_driver nouveau_bo_driver;
71 void nouveau_bo_move_init(struct nouveau_drm *);
72 int nouveau_bo_new(struct drm_device *, int size, int align, u32 flags,
73 u32 tile_mode, u32 tile_flags, struct sg_table *sg,
74 struct reservation_object *robj,
75 struct nouveau_bo **);
76 int nouveau_bo_pin(struct nouveau_bo *, u32 flags, bool contig);
77 int nouveau_bo_unpin(struct nouveau_bo *);
78 int nouveau_bo_map(struct nouveau_bo *);
79 void nouveau_bo_unmap(struct nouveau_bo *);
80 void nouveau_bo_placement_set(struct nouveau_bo *, u32 type, u32 busy);
81 void nouveau_bo_wr16(struct nouveau_bo *, unsigned index, u16 val);
82 u32 nouveau_bo_rd32(struct nouveau_bo *, unsigned index);
83 void nouveau_bo_wr32(struct nouveau_bo *, unsigned index, u32 val);
84 void nouveau_bo_fence(struct nouveau_bo *, struct nouveau_fence *, bool exclusive);
85 int nouveau_bo_validate(struct nouveau_bo *, bool interruptible,
86 bool no_wait_gpu);
87 void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo);
88 void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo);
90 struct nvkm_vma *
91 nouveau_bo_vma_find(struct nouveau_bo *, struct nvkm_vm *);
93 int nouveau_bo_vma_add(struct nouveau_bo *, struct nvkm_vm *,
94 struct nvkm_vma *);
95 void nouveau_bo_vma_del(struct nouveau_bo *, struct nvkm_vma *);
97 /* TODO: submit equivalent to TTM generic API upstream? */
98 static inline void __iomem *
99 nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
101 bool is_iomem;
102 void __iomem *ioptr = (void __force __iomem *)ttm_kmap_obj_virtual(
103 &nvbo->kmap, &is_iomem);
104 WARN_ON_ONCE(ioptr && !is_iomem);
105 return ioptr;
108 #endif