ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_drm.h
blobfc68f0973f9e70f3d21fd057740379415e93c7f9
1 #ifndef __NOUVEAU_DRMCLI_H__
2 #define __NOUVEAU_DRMCLI_H__
4 #define DRIVER_AUTHOR "Nouveau Project"
5 #define DRIVER_EMAIL "nouveau@lists.freedesktop.org"
7 #define DRIVER_NAME "nouveau"
8 #define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla"
9 #define DRIVER_DATE "20120801"
11 #define DRIVER_MAJOR 1
12 #define DRIVER_MINOR 2
13 #define DRIVER_PATCHLEVEL 1
16 * 1.1.1:
17 * - added support for tiled system memory buffer objects
18 * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
19 * - added support for compressed memory storage types on [nvc0,nve0].
20 * - added support for software methods 0x600,0x644,0x6ac on nvc0
21 * to control registers on the MPs to enable performance counters,
22 * and to control the warp error enable mask (OpenGL requires out of
23 * bounds access to local memory to be silently ignored / return 0).
24 * 1.1.2:
25 * - fixes multiple bugs in flip completion events and timestamping
26 * 1.2.0:
27 * - object api exposed to userspace
28 * - fermi,kepler,maxwell zbc
29 * 1.2.1:
30 * - allow concurrent access to bo's mapped read/write.
33 #include <nvif/client.h>
34 #include <nvif/device.h>
36 #include <drmP.h>
38 #include <drm/ttm/ttm_bo_api.h>
39 #include <drm/ttm/ttm_bo_driver.h>
40 #include <drm/ttm/ttm_placement.h>
41 #include <drm/ttm/ttm_memory.h>
42 #include <drm/ttm/ttm_module.h>
43 #include <drm/ttm/ttm_page_alloc.h>
45 #include "uapi/drm/nouveau_drm.h"
47 struct nouveau_channel;
48 struct platform_device;
50 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
52 #include "nouveau_fence.h"
53 #include "nouveau_bios.h"
55 struct nouveau_drm_tile {
56 struct nouveau_fence *fence;
57 bool used;
60 enum nouveau_drm_object_route {
61 NVDRM_OBJECT_NVIF = 0,
62 NVDRM_OBJECT_USIF,
63 NVDRM_OBJECT_ABI16,
66 enum nouveau_drm_notify_route {
67 NVDRM_NOTIFY_NVIF = 0,
68 NVDRM_NOTIFY_USIF
71 enum nouveau_drm_handle {
72 NVDRM_CLIENT = 0xffffffff,
73 NVDRM_DEVICE = 0xdddddddd,
74 NVDRM_CONTROL = 0xdddddddc,
75 NVDRM_DISPLAY = 0xd1500000,
76 NVDRM_PUSH = 0xbbbb0000, /* |= client chid */
77 NVDRM_CHAN = 0xcccc0000, /* |= client chid */
78 NVDRM_NVSW = 0x55550000,
81 struct nouveau_cli {
82 struct nvif_client base;
83 struct nvkm_vm *vm; /*XXX*/
84 struct list_head head;
85 struct mutex mutex;
86 void *abi16;
87 struct list_head objects;
88 struct list_head notifys;
91 static inline struct nouveau_cli *
92 nouveau_cli(struct drm_file *fpriv)
94 return fpriv ? fpriv->driver_priv : NULL;
97 #include <nvif/object.h>
98 #include <nvif/device.h>
100 extern int nouveau_runtime_pm;
102 struct nouveau_drm {
103 struct nouveau_cli client;
104 struct drm_device *dev;
106 struct nvif_device device;
107 struct list_head clients;
109 struct {
110 enum {
111 UNKNOWN = 0,
112 DISABLE = 1,
113 ENABLED = 2
114 } stat;
115 u32 base;
116 u32 size;
117 } agp;
119 /* TTM interface support */
120 struct {
121 struct drm_global_reference mem_global_ref;
122 struct ttm_bo_global_ref bo_global_ref;
123 struct ttm_bo_device bdev;
124 atomic_t validate_sequence;
125 int (*move)(struct nouveau_channel *,
126 struct ttm_buffer_object *,
127 struct ttm_mem_reg *, struct ttm_mem_reg *);
128 struct nouveau_channel *chan;
129 struct nvif_object copy;
130 int mtrr;
131 } ttm;
133 /* GEM interface support */
134 struct {
135 u64 vram_available;
136 u64 gart_available;
137 } gem;
139 /* synchronisation */
140 void *fence;
142 /* context for accelerated drm-internal operations */
143 struct nouveau_channel *cechan;
144 struct nouveau_channel *channel;
145 struct nvkm_gpuobj *notify;
146 struct nouveau_fbdev *fbcon;
147 struct nvif_object nvsw;
148 struct nvif_object ntfy;
150 /* nv10-nv40 tiling regions */
151 struct {
152 struct nouveau_drm_tile reg[15];
153 spinlock_t lock;
154 } tile;
156 /* modesetting */
157 struct nvbios vbios;
158 struct nouveau_display *display;
159 struct backlight_device *backlight;
161 /* power management */
162 struct nouveau_hwmon *hwmon;
163 struct nouveau_sysfs *sysfs;
165 /* display power reference */
166 bool have_disp_power_ref;
168 struct dev_pm_domain vga_pm_domain;
169 struct pci_dev *hdmi_device;
172 static inline struct nouveau_drm *
173 nouveau_drm(struct drm_device *dev)
175 return dev->dev_private;
178 int nouveau_pmops_suspend(struct device *);
179 int nouveau_pmops_resume(struct device *);
181 #define nouveau_platform_device_create(p, u) \
182 nouveau_platform_device_create_(p, sizeof(**u), (void **)u)
183 struct drm_device *
184 nouveau_platform_device_create_(struct platform_device *pdev,
185 int size, void **pobject);
186 void nouveau_drm_device_remove(struct drm_device *dev);
188 #define NV_PRINTK(l,c,f,a...) do { \
189 struct nouveau_cli *_cli = (c); \
190 nv_##l(_cli->base.base.priv, f, ##a); \
191 } while(0)
192 #define NV_FATAL(drm,f,a...) NV_PRINTK(fatal, &(drm)->client, f, ##a)
193 #define NV_ERROR(drm,f,a...) NV_PRINTK(error, &(drm)->client, f, ##a)
194 #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
195 #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
196 #define NV_DEBUG(drm,f,a...) NV_PRINTK(debug, &(drm)->client, f, ##a)
198 extern int nouveau_modeset;
200 #endif