ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / engine / disp / dacnv50.c
blob0f7d1ec4d37edcf17d35701e35184e04049fe1ca
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include "nv50.h"
25 #include "outp.h"
27 #include <core/client.h>
28 #include <subdev/timer.h>
30 #include <nvif/class.h>
31 #include <nvif/unpack.h>
33 int
34 nv50_dac_power(NV50_DISP_MTHD_V1)
36 const u32 doff = outp->or * 0x800;
37 union {
38 struct nv50_disp_dac_pwr_v0 v0;
39 } *args = data;
40 u32 stat;
41 int ret;
43 nv_ioctl(object, "disp dac pwr size %d\n", size);
44 if (nvif_unpack(args->v0, 0, 0, false)) {
45 nv_ioctl(object, "disp dac pwr vers %d state %d data %d "
46 "vsync %d hsync %d\n",
47 args->v0.version, args->v0.state, args->v0.data,
48 args->v0.vsync, args->v0.hsync);
49 stat = 0x00000040 * !args->v0.state;
50 stat |= 0x00000010 * !args->v0.data;
51 stat |= 0x00000004 * !args->v0.vsync;
52 stat |= 0x00000001 * !args->v0.hsync;
53 } else
54 return ret;
56 nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
57 nv_mask(priv, 0x61a004 + doff, 0xc000007f, 0x80000000 | stat);
58 nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
59 return 0;
62 int
63 nv50_dac_sense(NV50_DISP_MTHD_V1)
65 union {
66 struct nv50_disp_dac_load_v0 v0;
67 } *args = data;
68 const u32 doff = outp->or * 0x800;
69 u32 loadval;
70 int ret;
72 nv_ioctl(object, "disp dac load size %d\n", size);
73 if (nvif_unpack(args->v0, 0, 0, false)) {
74 nv_ioctl(object, "disp dac load vers %d data %08x\n",
75 args->v0.version, args->v0.data);
76 if (args->v0.data & 0xfff00000)
77 return -EINVAL;
78 loadval = args->v0.data;
79 } else
80 return ret;
82 nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);
83 nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
85 nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
86 mdelay(9);
87 udelay(500);
88 loadval = nv_mask(priv, 0x61a00c + doff, 0xffffffff, 0x00000000);
90 nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);
91 nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
93 nv_debug(priv, "DAC%d sense: 0x%08x\n", outp->or, loadval);
94 if (!(loadval & 0x80000000))
95 return -ETIMEDOUT;
97 args->v0.load = (loadval & 0x38000000) >> 27;
98 return 0;