ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / subdev / bios / conn.c
blob706a1650a4f272e8de4b5bf52a41def3cf43c16f
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
26 #include <subdev/bios/conn.h>
28 u32
29 nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
31 u32 dcb = dcb_table(bios, ver, hdr, cnt, len);
32 if (dcb && *ver >= 0x30 && *hdr >= 0x16) {
33 u32 data = nv_ro16(bios, dcb + 0x14);
34 if (data) {
35 *ver = nv_ro08(bios, data + 0);
36 *hdr = nv_ro08(bios, data + 1);
37 *cnt = nv_ro08(bios, data + 2);
38 *len = nv_ro08(bios, data + 3);
39 return data;
42 return 0x00000000;
45 u32
46 nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
47 struct nvbios_connT *info)
49 u32 data = nvbios_connTe(bios, ver, hdr, cnt, len);
50 memset(info, 0x00, sizeof(*info));
51 switch (!!data * *ver) {
52 case 0x30:
53 case 0x40:
54 return data;
55 default:
56 break;
58 return 0x00000000;
61 u32
62 nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
64 u8 hdr, cnt;
65 u32 data = nvbios_connTe(bios, ver, &hdr, &cnt, len);
66 if (data && idx < cnt)
67 return data + hdr + (idx * *len);
68 return 0x00000000;
71 u32
72 nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len,
73 struct nvbios_connE *info)
75 u32 data = nvbios_connEe(bios, idx, ver, len);
76 memset(info, 0x00, sizeof(*info));
77 switch (!!data * *ver) {
78 case 0x30:
79 case 0x40:
80 info->type = nv_ro08(bios, data + 0x00);
81 info->location = nv_ro08(bios, data + 0x01) & 0x0f;
82 info->hpd = (nv_ro08(bios, data + 0x01) & 0x30) >> 4;
83 info->dp = (nv_ro08(bios, data + 0x01) & 0xc0) >> 6;
84 if (*len < 4)
85 return data;
86 info->hpd |= (nv_ro08(bios, data + 0x02) & 0x03) << 2;
87 info->dp |= nv_ro08(bios, data + 0x02) & 0x0c;
88 info->di = (nv_ro08(bios, data + 0x02) & 0xf0) >> 4;
89 info->hpd |= (nv_ro08(bios, data + 0x03) & 0x07) << 4;
90 info->sr = (nv_ro08(bios, data + 0x03) & 0x08) >> 3;
91 info->lcdid = (nv_ro08(bios, data + 0x03) & 0x70) >> 4;
92 return data;
93 default:
94 break;
96 return 0x00000000;