ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / subdev / fb / gf100.c
blobd51aa0237baf00191bc71eeef84dcb73d339d25f
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include "gf100.h"
26 #include <core/device.h>
28 extern const u8 gf100_pte_storage_type_map[256];
30 bool
31 gf100_fb_memtype_valid(struct nvkm_fb *pfb, u32 tile_flags)
33 u8 memtype = (tile_flags & 0x0000ff00) >> 8;
34 return likely((gf100_pte_storage_type_map[memtype] != 0xff));
37 static void
38 gf100_fb_intr(struct nvkm_subdev *subdev)
40 struct gf100_fb_priv *priv = (void *)subdev;
41 u32 intr = nv_rd32(priv, 0x000100);
42 if (intr & 0x08000000) {
43 nv_debug(priv, "PFFB intr\n");
44 intr &= ~0x08000000;
46 if (intr & 0x00002000) {
47 nv_debug(priv, "PBFB intr\n");
48 intr &= ~0x00002000;
52 int
53 gf100_fb_init(struct nvkm_object *object)
55 struct gf100_fb_priv *priv = (void *)object;
56 int ret;
58 ret = nvkm_fb_init(&priv->base);
59 if (ret)
60 return ret;
62 if (priv->r100c10_page)
63 nv_wr32(priv, 0x100c10, priv->r100c10 >> 8);
65 nv_mask(priv, 0x100c80, 0x00000001, 0x00000000); /* 128KiB lpg */
66 return 0;
69 void
70 gf100_fb_dtor(struct nvkm_object *object)
72 struct nvkm_device *device = nv_device(object);
73 struct gf100_fb_priv *priv = (void *)object;
75 if (priv->r100c10_page) {
76 dma_unmap_page(nv_device_base(device), priv->r100c10, PAGE_SIZE,
77 DMA_BIDIRECTIONAL);
78 __free_page(priv->r100c10_page);
81 nvkm_fb_destroy(&priv->base);
84 int
85 gf100_fb_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
86 struct nvkm_oclass *oclass, void *data, u32 size,
87 struct nvkm_object **pobject)
89 struct nvkm_device *device = nv_device(parent);
90 struct gf100_fb_priv *priv;
91 int ret;
93 ret = nvkm_fb_create(parent, engine, oclass, &priv);
94 *pobject = nv_object(priv);
95 if (ret)
96 return ret;
98 priv->r100c10_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
99 if (priv->r100c10_page) {
100 priv->r100c10 = dma_map_page(nv_device_base(device),
101 priv->r100c10_page, 0, PAGE_SIZE,
102 DMA_BIDIRECTIONAL);
103 if (dma_mapping_error(nv_device_base(device), priv->r100c10))
104 return -EFAULT;
107 nv_subdev(priv)->intr = gf100_fb_intr;
108 return 0;
111 struct nvkm_oclass *
112 gf100_fb_oclass = &(struct nvkm_fb_impl) {
113 .base.handle = NV_SUBDEV(FB, 0xc0),
114 .base.ofuncs = &(struct nvkm_ofuncs) {
115 .ctor = gf100_fb_ctor,
116 .dtor = gf100_fb_dtor,
117 .init = gf100_fb_init,
118 .fini = _nvkm_fb_fini,
120 .memtype = gf100_fb_memtype_valid,
121 .ram = &gf100_ram_oclass,
122 }.base;