drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv04.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "nv04.h"
  25 #include "regsnv04.h"
  26
  27 bool
  28 nv04_fb_memtype_valid(struct nvkm_fb *pfb, u32 tile_flags)
  29 {
  30         if (!(tile_flags & 0xff00))
  31                 return true;
  32
  33         return false;
  34 }
  35
  36 static int
  37 nv04_fb_init(struct nvkm_object *object)
  38 {
  39         struct nv04_fb_priv *priv = (void *)object;
  40         int ret;
  41
  42         ret = nvkm_fb_init(&priv->base);
  43         if (ret)
  44                 return ret;
  45
  46         /* This is what the DDX did for NV_ARCH_04, but a mmio-trace shows
  47          * nvidia reading PFB_CFG_0, then writing back its original value.
  48          * (which was 0x701114 in this case)
  49          */
  50         nv_wr32(priv, NV04_PFB_CFG0, 0x1114);
  51         return 0;
  52 }
  53
  54 int
  55 nv04_fb_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  56              struct nvkm_oclass *oclass, void *data, u32 size,
  57              struct nvkm_object **pobject)
  58 {
  59         struct nv04_fb_impl *impl = (void *)oclass;
  60         struct nv04_fb_priv *priv;
  61         int ret;
  62
  63         ret = nvkm_fb_create(parent, engine, oclass, &priv);
  64         *pobject = nv_object(priv);
  65         if (ret)
  66                 return ret;
  67
  68         priv->base.tile.regions = impl->tile.regions;
  69         priv->base.tile.init = impl->tile.init;
  70         priv->base.tile.comp = impl->tile.comp;
  71         priv->base.tile.fini = impl->tile.fini;
  72         priv->base.tile.prog = impl->tile.prog;
  73         return 0;
  74 }
  75
  76 struct nvkm_oclass *
  77 nv04_fb_oclass = &(struct nv04_fb_impl) {
  78         .base.base.handle = NV_SUBDEV(FB, 0x04),
  79         .base.base.ofuncs = &(struct nvkm_ofuncs) {
  80                 .ctor = nv04_fb_ctor,
  81                 .dtor = _nvkm_fb_dtor,
  82                 .init = nv04_fb_init,
  83                 .fini = _nvkm_fb_fini,
  84         },
  85         .base.memtype = nv04_fb_memtype_valid,
  86         .base.ram = &nv04_ram_oclass,
  87 }.base.base;