drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c

   1 /*
   2  * Copyright (C) 2009 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26 #include "priv.h"
  27
  28 static int
  29 nv10_gpio_sense(struct nvkm_gpio *gpio, int line)
  30 {
  31         if (line < 2) {
  32                 line = line * 16;
  33                 line = nv_rd32(gpio, 0x600818) >> line;
  34                 return !!(line & 0x0100);
  35         } else
  36         if (line < 10) {
  37                 line = (line - 2) * 4;
  38                 line = nv_rd32(gpio, 0x60081c) >> line;
  39                 return !!(line & 0x04);
  40         } else
  41         if (line < 14) {
  42                 line = (line - 10) * 4;
  43                 line = nv_rd32(gpio, 0x600850) >> line;
  44                 return !!(line & 0x04);
  45         }
  46
  47         return -EINVAL;
  48 }
  49
  50 static int
  51 nv10_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
  52 {
  53         u32 reg, mask, data;
  54
  55         if (line < 2) {
  56                 line = line * 16;
  57                 reg  = 0x600818;
  58                 mask = 0x00000011;
  59                 data = (dir << 4) | out;
  60         } else
  61         if (line < 10) {
  62                 line = (line - 2) * 4;
  63                 reg  = 0x60081c;
  64                 mask = 0x00000003;
  65                 data = (dir << 1) | out;
  66         } else
  67         if (line < 14) {
  68                 line = (line - 10) * 4;
  69                 reg  = 0x600850;
  70                 mask = 0x00000003;
  71                 data = (dir << 1) | out;
  72         } else {
  73                 return -EINVAL;
  74         }
  75
  76         nv_mask(gpio, reg, mask << line, data << line);
  77         return 0;
  78 }
  79
  80 static void
  81 nv10_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
  82 {
  83         u32 intr = nv_rd32(gpio, 0x001104);
  84         u32 stat = nv_rd32(gpio, 0x001144) & intr;
  85         *lo = (stat & 0xffff0000) >> 16;
  86         *hi = (stat & 0x0000ffff);
  87         nv_wr32(gpio, 0x001104, intr);
  88 }
  89
  90 static void
  91 nv10_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
  92 {
  93         u32 inte = nv_rd32(gpio, 0x001144);
  94         if (type & NVKM_GPIO_LO)
  95                 inte = (inte & ~(mask << 16)) | (data << 16);
  96         if (type & NVKM_GPIO_HI)
  97                 inte = (inte & ~mask) | data;
  98         nv_wr32(gpio, 0x001144, inte);
  99 }
 100
 101 struct nvkm_oclass *
 102 nv10_gpio_oclass = &(struct nvkm_gpio_impl) {
 103         .base.handle = NV_SUBDEV(GPIO, 0x10),
 104         .base.ofuncs = &(struct nvkm_ofuncs) {
 105                 .ctor = _nvkm_gpio_ctor,
 106                 .dtor = _nvkm_gpio_dtor,
 107                 .init = _nvkm_gpio_init,
 108                 .fini = _nvkm_gpio_fini,
 109         },
 110         .lines = 16,
 111         .intr_stat = nv10_gpio_intr_stat,
 112         .intr_mask = nv10_gpio_intr_mask,
 113         .drive = nv10_gpio_drive,
 114         .sense = nv10_gpio_sense,
 115 }.base;