drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgm204.c

   1 /*
   2  * Copyright 2014 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "pad.h"
  25
  26 struct gm204_i2c_pad {
  27         struct nvkm_i2c_pad base;
  28         int addr;
  29 };
  30
  31 static int
  32 gm204_i2c_pad_fini(struct nvkm_object *object, bool suspend)
  33 {
  34         struct nvkm_i2c *i2c = (void *)nvkm_i2c(object);
  35         struct gm204_i2c_pad *pad = (void *)object;
  36         nv_mask(i2c, 0x00d97c + pad->addr, 0x00000001, 0x00000001);
  37         return nvkm_i2c_pad_fini(&pad->base, suspend);
  38 }
  39
  40 static int
  41 gm204_i2c_pad_init(struct nvkm_object *object)
  42 {
  43         struct nvkm_i2c *i2c = (void *)nvkm_i2c(object);
  44         struct gm204_i2c_pad *pad = (void *)object;
  45
  46         switch (nv_oclass(pad->base.next)->handle) {
  47         case NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_AUX):
  48                 nv_mask(i2c, 0x00d970 + pad->addr, 0x0000c003, 0x00000002);
  49                 break;
  50         case NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_BIT):
  51         default:
  52                 nv_mask(i2c, 0x00d970 + pad->addr, 0x0000c003, 0x0000c001);
  53                 break;
  54         }
  55
  56         nv_mask(i2c, 0x00d97c + pad->addr, 0x00000001, 0x00000000);
  57         return nvkm_i2c_pad_init(&pad->base);
  58 }
  59
  60 static int
  61 gm204_i2c_pad_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  62                    struct nvkm_oclass *oclass, void *data, u32 index,
  63                    struct nvkm_object **pobject)
  64 {
  65         struct gm204_i2c_pad *pad;
  66         int ret;
  67
  68         ret = nvkm_i2c_pad_create(parent, engine, oclass, index, &pad);
  69         *pobject = nv_object(pad);
  70         if (ret)
  71                 return ret;
  72
  73         pad->addr = index * 0x50;;
  74         return 0;
  75 }
  76
  77 struct nvkm_oclass
  78 gm204_i2c_pad_oclass = {
  79         .ofuncs = &(struct nvkm_ofuncs) {
  80                 .ctor = gm204_i2c_pad_ctor,
  81                 .dtor = _nvkm_i2c_pad_dtor,
  82                 .init = gm204_i2c_pad_init,
  83                 .fini = gm204_i2c_pad_fini,
  84         },
  85 };