drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include <subdev/ibus.h>
  25
  26 struct gk104_ibus_priv {
  27         struct nvkm_ibus base;
  28 };
  29
  30 static void
  31 gk104_ibus_intr_hub(struct gk104_ibus_priv *priv, int i)
  32 {
  33         u32 addr = nv_rd32(priv, 0x122120 + (i * 0x0800));
  34         u32 data = nv_rd32(priv, 0x122124 + (i * 0x0800));
  35         u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0800));
  36         nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
  37         nv_mask(priv, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
  38 }
  39
  40 static void
  41 gk104_ibus_intr_rop(struct gk104_ibus_priv *priv, int i)
  42 {
  43         u32 addr = nv_rd32(priv, 0x124120 + (i * 0x0800));
  44         u32 data = nv_rd32(priv, 0x124124 + (i * 0x0800));
  45         u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0800));
  46         nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
  47         nv_mask(priv, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
  48 }
  49
  50 static void
  51 gk104_ibus_intr_gpc(struct gk104_ibus_priv *priv, int i)
  52 {
  53         u32 addr = nv_rd32(priv, 0x128120 + (i * 0x0800));
  54         u32 data = nv_rd32(priv, 0x128124 + (i * 0x0800));
  55         u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0800));
  56         nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
  57         nv_mask(priv, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
  58 }
  59
  60 static void
  61 gk104_ibus_intr(struct nvkm_subdev *subdev)
  62 {
  63         struct gk104_ibus_priv *priv = (void *)subdev;
  64         u32 intr0 = nv_rd32(priv, 0x120058);
  65         u32 intr1 = nv_rd32(priv, 0x12005c);
  66         u32 hubnr = nv_rd32(priv, 0x120070);
  67         u32 ropnr = nv_rd32(priv, 0x120074);
  68         u32 gpcnr = nv_rd32(priv, 0x120078);
  69         u32 i;
  70
  71         for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
  72                 u32 stat = 0x00000100 << i;
  73                 if (intr0 & stat) {
  74                         gk104_ibus_intr_hub(priv, i);
  75                         intr0 &= ~stat;
  76                 }
  77         }
  78
  79         for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) {
  80                 u32 stat = 0x00010000 << i;
  81                 if (intr0 & stat) {
  82                         gk104_ibus_intr_rop(priv, i);
  83                         intr0 &= ~stat;
  84                 }
  85         }
  86
  87         for (i = 0; intr1 && i < gpcnr; i++) {
  88                 u32 stat = 0x00000001 << i;
  89                 if (intr1 & stat) {
  90                         gk104_ibus_intr_gpc(priv, i);
  91                         intr1 &= ~stat;
  92                 }
  93         }
  94 }
  95
  96 static int
  97 gk104_ibus_init(struct nvkm_object *object)
  98 {
  99         struct gk104_ibus_priv *priv = (void *)object;
 100         int ret = nvkm_ibus_init(&priv->base);
 101         if (ret == 0) {
 102                 nv_mask(priv, 0x122318, 0x0003ffff, 0x00001000);
 103                 nv_mask(priv, 0x12231c, 0x0003ffff, 0x00000200);
 104                 nv_mask(priv, 0x122310, 0x0003ffff, 0x00000800);
 105                 nv_mask(priv, 0x122348, 0x0003ffff, 0x00000100);
 106                 nv_mask(priv, 0x1223b0, 0x0003ffff, 0x00000fff);
 107                 nv_mask(priv, 0x122348, 0x0003ffff, 0x00000200);
 108                 nv_mask(priv, 0x122358, 0x0003ffff, 0x00002880);
 109         }
 110         return ret;
 111 }
 112
 113 static int
 114 gk104_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 115                 struct nvkm_oclass *oclass, void *data, u32 size,
 116                 struct nvkm_object **pobject)
 117 {
 118         struct gk104_ibus_priv *priv;
 119         int ret;
 120
 121         ret = nvkm_ibus_create(parent, engine, oclass, &priv);
 122         *pobject = nv_object(priv);
 123         if (ret)
 124                 return ret;
 125
 126         nv_subdev(priv)->intr = gk104_ibus_intr;
 127         return 0;
 128 }
 129
 130 struct nvkm_oclass
 131 gk104_ibus_oclass = {
 132         .handle = NV_SUBDEV(IBUS, 0xe0),
 133         .ofuncs = &(struct nvkm_ofuncs) {
 134                 .ctor = gk104_ibus_ctor,
 135                 .dtor = _nvkm_ibus_dtor,
 136                 .init = gk104_ibus_init,
 137                 .fini = _nvkm_ibus_fini,
 138         },
 139 };