Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523

   1 What:           /sys/bus/iio/devices/iio:deviceX/pll2_feedback_clk_present
   2 What:           /sys/bus/iio/devices/iio:deviceX/pll2_reference_clk_present
   3 What:           /sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_a_present
   4 What:           /sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_b_present
   5 What:           /sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_test_present
   6 What:           /sys/bus/iio/devices/iio:deviceX/vcxo_clk_present
   7 KernelVersion:  3.4.0
   8 Contact:        linux-iio@vger.kernel.org
   9 Description:
  10                 Reading returns either '1' or '0'.
  11
  12                 '1' means that the clock in question is present.
  13
  14                 '0' means that the clock is missing.
  15
  16 What:           /sys/bus/iio/devices/iio:deviceX/pllY_locked
  17 KernelVersion:  3.4.0
  18 Contact:        linux-iio@vger.kernel.org
  19 Description:
  20                 Reading returns either '1' or '0'. '1' means that the
  21                 pllY is locked.
  22
  23 What:           /sys/bus/iio/devices/iio:deviceX/sync_dividers
  24 KernelVersion:  3.4.0
  25 Contact:        linux-iio@vger.kernel.org
  26 Description:
  27                 Writing '1' triggers the clock distribution synchronization
  28                 functionality. All dividers are reset and the channels start
  29                 with their predefined phase offsets (out_altvoltageY_phase).
  30                 Writing this file has the effect as driving the external
  31                 /SYNC pin low.