WIP FPC-III support
[linux/fpc-iii.git] / Documentation / ABI / testing / sysfs-bus-iio-timer-stm32
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1 What:           /sys/bus/iio/devices/triggerX/master_mode_available
2 KernelVersion:  4.11
3 Contact:        benjamin.gaignard@st.com
4 Description:
5                 Reading returns the list possible master modes which are:
8                 - "reset"
9                                 The UG bit from the TIMx_EGR register is
10                                 used as trigger output (TRGO).
11                 - "enable"
12                                 The Counter Enable signal CNT_EN is used
13                                 as trigger output.
14                 - "update"
15                                 The update event is selected as trigger output.
16                                 For instance a master timer can then be used
17                                 as a prescaler for a slave timer.
18                 - "compare_pulse"
19                                 The trigger output send a positive pulse
20                                 when the CC1IF flag is to be set.
21                 - "OC1REF"
22                                 OC1REF signal is used as trigger output.
23                 - "OC2REF"
24                                 OC2REF signal is used as trigger output.
25                 - "OC3REF"
26                                 OC3REF signal is used as trigger output.
27                 - "OC4REF"
28                                 OC4REF signal is used as trigger output.
30                 Additional modes (on TRGO2 only):
32                 - "OC5REF"
33                                 OC5REF signal is used as trigger output.
34                 - "OC6REF"
35                                 OC6REF signal is used as trigger output.
36                 - "compare_pulse_OC4REF":
37                                 OC4REF rising or falling edges generate pulses.
38                 - "compare_pulse_OC6REF":
39                                 OC6REF rising or falling edges generate pulses.
40                 - "compare_pulse_OC4REF_r_or_OC6REF_r":
41                                 OC4REF or OC6REF rising edges generate pulses.
42                 - "compare_pulse_OC4REF_r_or_OC6REF_f":
43                                 OC4REF rising or OC6REF falling edges generate
44                                 pulses.
45                 - "compare_pulse_OC5REF_r_or_OC6REF_r":
46                                 OC5REF or OC6REF rising edges generate pulses.
47                 - "compare_pulse_OC5REF_r_or_OC6REF_f":
48                                 OC5REF rising or OC6REF falling edges generate
49                                 pulses.
51                 ::
53                   +-----------+   +-------------+            +---------+
54                   | Prescaler +-> | Counter     |        +-> | Master  | TRGO(2)
55                   +-----------+   +--+--------+-+        |-> | Control +-->
56                                      |        |          ||  +---------+
57                                   +--v--------+-+ OCxREF ||  +---------+
58                                   | Chx compare +----------> | Output  | ChX
59                                   +-----------+-+         |  | Control +-->
60                                         .     |           |  +---------+
61                                         .     |           |    .
62                                   +-----------v-+ OC6REF  |    .
63                                   | Ch6 compare +---------+>
64                                   +-------------+
66                 Example with: "compare_pulse_OC4REF_r_or_OC6REF_r"::
68                                   X
69                                 X   X
70                               X .   . X
71                             X   .   .   X
72                           X     .   .     X
73                   count X .     .   .     . X
74                           .     .   .     .
75                           .     .   .     .
76                           +---------------+
77                   OC4REF  |     .   .     |
78                         +-+     .   .     +-+
79                           .     +---+     .
80                   OC6REF  .     |   |     .
81                         +-------+   +-------+
82                           +-+   +-+
83                   TRGO2   | |   | |
84                         +-+ +---+ +---------+
86 What:           /sys/bus/iio/devices/triggerX/master_mode
87 KernelVersion:  4.11
88 Contact:        benjamin.gaignard@st.com
89 Description:
90                 Reading returns the current master modes.
91                 Writing set the master mode
93 What:           /sys/bus/iio/devices/triggerX/sampling_frequency
94 KernelVersion:  4.11
95 Contact:        benjamin.gaignard@st.com
96 Description:
97                 Reading returns the current sampling frequency.
98                 Writing an value different of 0 set and start sampling.
99                 Writing 0 stop sampling.
101 What:           /sys/bus/iio/devices/iio:deviceX/in_count0_preset
102 KernelVersion:  4.12
103 Contact:        benjamin.gaignard@st.com
104 Description:
105                 Reading returns the current preset value.
106                 Writing sets the preset value.
107                 When counting up the counter starts from 0 and fires an
108                 event when reach preset value.
109                 When counting down the counter start from preset value
110                 and fire event when reach 0.
112 What:           /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available
113 KernelVersion:  4.12
114 Contact:        benjamin.gaignard@st.com
115 Description:
116                 Reading returns the list possible enable modes.
118 What:           /sys/bus/iio/devices/iio:deviceX/in_count0_enable_mode
119 KernelVersion:  4.12
120 Contact:        benjamin.gaignard@st.com
121 Description:
122                 Configure the device counter enable modes, in all case
123                 counting direction is set by in_count0_count_direction
124                 attribute and the counter is clocked by the internal clock.
126                 always:
127                         Counter is always ON.
129                 gated:
130                         Counting is enabled when connected trigger signal
131                         level is high else counting is disabled.
133                 triggered:
134                         Counting is enabled on rising edge of the connected
135                         trigger, and remains enabled for the duration of this
136                         selected mode.
138 What:           /sys/bus/iio/devices/iio:deviceX/in_count_trigger_mode_available
139 KernelVersion:  4.13
140 Contact:        benjamin.gaignard@st.com
141 Description:
142                 Reading returns the list possible trigger modes.
144 What:           /sys/bus/iio/devices/iio:deviceX/in_count0_trigger_mode
145 KernelVersion:  4.13
146 Contact:        benjamin.gaignard@st.com
147 Description:
148                 Configure the device counter trigger mode
149                 counting direction is set by in_count0_count_direction
150                 attribute and the counter is clocked by the connected trigger
151                 rising edges.