Documentation/devicetree/bindings/clock/marvell,mmp2-audio-clock.yaml

   1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-audio-clock.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Marvell MMP2 Audio Clock Controller
   8
   9 maintainers:
  10   - Lubomir Rintel <lkundrak@v3.sk>
  11
  12 description: |
  13   The audio clock controller generates and supplies the clocks to the audio
  14   codec.
  15
  16   Each clock is assigned an identifier and client nodes use this identifier
  17   to specify the clock which they consume.
  18
  19   All these identifiers could be found in
  20   <dt-bindings/clock/marvell,mmp2-audio.h>.
  21
  22 properties:
  23   compatible:
  24     enum:
  25       - marvell,mmp2-audio-clock
  26
  27   reg:
  28     maxItems: 1
  29
  30   clocks:
  31     items:
  32       - description: Audio subsystem clock
  33       - description: The crystal oscillator clock
  34       - description: First I2S clock
  35       - description: Second I2S clock
  36
  37   clock-names:
  38     items:
  39       - const: audio
  40       - const: vctcxo
  41       - const: i2s0
  42       - const: i2s1
  43
  44   '#clock-cells':
  45     const: 1
  46
  47   power-domains:
  48     maxItems: 1
  49
  50 required:
  51   - compatible
  52   - reg
  53   - clocks
  54   - clock-names
  55   - '#clock-cells'
  56
  57 additionalProperties: false
  58
  59 examples:
  60   - |
  61     #include <dt-bindings/clock/marvell,mmp2-audio.h>
  62     #include <dt-bindings/clock/marvell,mmp2.h>
  63     #include <dt-bindings/power/marvell,mmp2.h>
  64
  65     clock-controller@d42a0c30 {
  66       compatible = "marvell,mmp2-audio-clock";
  67       reg = <0xd42a0c30 0x10>;
  68       clock-names = "audio", "vctcxo", "i2s0", "i2s1";
  69       clocks = <&soc_clocks MMP2_CLK_AUDIO>,
  70                <&soc_clocks MMP2_CLK_VCTCXO>,
  71                <&soc_clocks MMP2_CLK_I2S0>,
  72                <&soc_clocks MMP2_CLK_I2S1>;
  73       power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
  74       #clock-cells = <1>;
  75     };