1 Binding for Texas Instruments ADPLL clock.
3 Binding status: Unstable - ABI compatibility may be broken in the future
5 This binding uses the common clock binding[1]. It assumes a
6 register-mapped ADPLL with two to three selectable input clocks
7 and three to four children.
9 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - compatible : shall be one of "ti,dm814-adpll-s-clock" or
13 "ti,dm814-adpll-lj-clock" depending on the type of the ADPLL
14 - #clock-cells : from common clock binding; shall be set to 1.
15 - clocks : link phandles of parent clocks clkinp and clkinpulow, note
16 that the adpll-s-clock also has an optional clkinphif
17 - reg : address and length of the register set for controlling the ADPLL.
20 adpll_mpu_ck: adpll@40 {
22 compatible = "ti,dm814-adpll-s-clock";
24 clocks = <&devosc_ck &devosc_ck &devosc_ck>;
25 clock-names = "clkinp", "clkinpulow", "clkinphif";
26 clock-output-names = "481c5040.adpll.dcoclkldo",
27 "481c5040.adpll.clkout",
28 "481c5040.adpll.clkoutx2",
29 "481c5040.adpll.clkouthif";
32 adpll_dsp_ck: adpll@80 {
34 compatible = "ti,dm814-adpll-lj-clock";
36 clocks = <&devosc_ck &devosc_ck>;
37 clock-names = "clkinp", "clkinpulow";
38 clock-output-names = "481c5080.adpll.dcoclkldo",
39 "481c5080.adpll.clkout",
40 "481c5080.adpll.clkoutldo";