2 * Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
4 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
5 each IP. PPMU provides the primitive values to get performance data. These
6 PPMU events provide information of the SoC's behaviors so that you may
7 use to analyze system performance, to make behaviors visible and to count
8 usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
9 The Exynos PPMU driver uses the devfreq-event class to provide event data
10 to various devfreq devices. The devfreq devices would use the event data when
11 derterming the current state of each IP.
13 Required properties for PPMU device:
14 - compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2.
15 - reg: physical base address of each PPMU and length of memory mapped region.
17 Optional properties for PPMU device:
18 - clock-names : the name of clock used by the PPMU, "ppmu"
19 - clocks : phandles for clock specified in "clock-names" property
21 Required properties for 'events' child node of PPMU device:
22 - event-name : the unique event name among PPMU device
23 Optional properties for 'events' child node of PPMU device:
24 - event-data-type : Define the type of data which shell be counted
25 by the counter. You can check include/dt-bindings/pmu/exynos_ppmu.h for
26 all possible type, i.e. count read requests, count write data in bytes,
27 etc. This field is optional and when it is missing, the driver code
28 will use default data type.
30 Example1 : PPMUv1 nodes in exynos3250.dtsi are listed below.
32 ppmu_dmc0: ppmu_dmc0@106a0000 {
33 compatible = "samsung,exynos-ppmu";
34 reg = <0x106a0000 0x2000>;
38 ppmu_dmc1: ppmu_dmc1@106b0000 {
39 compatible = "samsung,exynos-ppmu";
40 reg = <0x106b0000 0x2000>;
44 ppmu_cpu: ppmu_cpu@106c0000 {
45 compatible = "samsung,exynos-ppmu";
46 reg = <0x106c0000 0x2000>;
50 ppmu_rightbus: ppmu_rightbus@112a0000 {
51 compatible = "samsung,exynos-ppmu";
52 reg = <0x112a0000 0x2000>;
53 clocks = <&cmu CLK_PPMURIGHT>;
58 ppmu_leftbus: ppmu_leftbus0@116a0000 {
59 compatible = "samsung,exynos-ppmu";
60 reg = <0x116a0000 0x2000>;
61 clocks = <&cmu CLK_PPMULEFT>;
66 Example2 : Events of each PPMU node in exynos3250-rinato.dts are listed below.
72 ppmu_dmc0_3: ppmu-event3-dmc0 {
73 event-name = "ppmu-event3-dmc0";
76 ppmu_dmc0_2: ppmu-event2-dmc0 {
77 event-name = "ppmu-event2-dmc0";
80 ppmu_dmc0_1: ppmu-event1-dmc0 {
81 event-name = "ppmu-event1-dmc0";
84 ppmu_dmc0_0: ppmu-event0-dmc0 {
85 event-name = "ppmu-event0-dmc0";
94 ppmu_dmc1_3: ppmu-event3-dmc1 {
95 event-name = "ppmu-event3-dmc1";
104 ppmu_leftbus_3: ppmu-event3-leftbus {
105 event-name = "ppmu-event3-leftbus";
114 ppmu_rightbus_3: ppmu-event3-rightbus {
115 event-name = "ppmu-event3-rightbus";
120 Example3 : PPMUv2 nodes in exynos5433.dtsi are listed below.
122 ppmu_d0_cpu: ppmu_d0_cpu@10480000 {
123 compatible = "samsung,exynos-ppmu-v2";
124 reg = <0x10480000 0x2000>;
128 ppmu_d0_general: ppmu_d0_general@10490000 {
129 compatible = "samsung,exynos-ppmu-v2";
130 reg = <0x10490000 0x2000>;
134 ppmu_d0_rt: ppmu_d0_rt@104a0000 {
135 compatible = "samsung,exynos-ppmu-v2";
136 reg = <0x104a0000 0x2000>;
140 ppmu_d1_cpu: ppmu_d1_cpu@104b0000 {
141 compatible = "samsung,exynos-ppmu-v2";
142 reg = <0x104b0000 0x2000>;
146 ppmu_d1_general: ppmu_d1_general@104c0000 {
147 compatible = "samsung,exynos-ppmu-v2";
148 reg = <0x104c0000 0x2000>;
152 ppmu_d1_rt: ppmu_d1_rt@104d0000 {
153 compatible = "samsung,exynos-ppmu-v2";
154 reg = <0x104d0000 0x2000>;
158 Example4 : 'event-data-type' in exynos4412-ppmu-common.dtsi are listed below.
163 ppmu_dmc0_3: ppmu-event3-dmc0 {
164 event-name = "ppmu-event3-dmc0";
165 event-data-type = <(PPMU_RO_DATA_CNT |