1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Display Engine Backend Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The display engine backend exposes layers and sprites to the system.
19 - allwinner,sun4i-a10-display-backend
20 - allwinner,sun5i-a13-display-backend
21 - allwinner,sun6i-a31-display-backend
22 - allwinner,sun7i-a20-display-backend
23 - allwinner,sun8i-a23-display-backend
24 - allwinner,sun8i-a33-display-backend
25 - allwinner,sun9i-a80-display-backend
31 - description: Display Backend registers
32 - description: SAT registers
48 - description: The backend interface clock
49 - description: The backend module clock
50 - description: The backend DRAM clock
51 - description: The SAT clock
66 - description: The Backend reset line
67 - description: The SAT reset line
76 # FIXME: This should be made required eventually once every SoC will
77 # have the MBUS declared.
81 # FIXME: This should be made required eventually once every SoC will
82 # have the MBUS declared.
89 A ports node with endpoint definitions as defined in
90 Documentation/devicetree/bindings/media/video-interfaces.txt.
102 Input endpoints of the controller.
107 Output endpoints of the controller.
115 additionalProperties: false
126 additionalProperties: false
132 const: allwinner,sun8i-a33-display-backend
181 * This comes from the clock/sun4i-a10-ccu.h and
182 * reset/sun4i-a10-ccu.h headers, but we can't include them since
183 * it would trigger a bunch of warnings for redefinitions of
184 * symbols with the other example.
187 #define CLK_AHB_DE_BE0 42
188 #define CLK_DRAM_DE_BE0 140
189 #define CLK_DE_BE0 144
192 display-backend@1e60000 {
193 compatible = "allwinner,sun4i-a10-display-backend";
194 reg = <0x01e60000 0x10000>;
196 clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
197 <&ccu CLK_DRAM_DE_BE0>;
198 clock-names = "ahb", "mod",
200 resets = <&ccu RST_DE_BE0>;
203 #address-cells = <1>;
207 #address-cells = <1>;
213 remote-endpoint = <&fe0_out_be0>;
218 remote-endpoint = <&fe1_out_be0>;
223 #address-cells = <1>;
229 remote-endpoint = <&tcon0_in_be0>;
234 remote-endpoint = <&tcon1_in_be0>;
241 #include <dt-bindings/interrupt-controller/arm-gic.h>
244 * This comes from the clock/sun8i-a23-a33-ccu.h and
245 * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
246 * since it would trigger a bunch of warnings for redefinitions of
247 * symbols with the other example.
250 #define CLK_BUS_DE_BE 40
251 #define CLK_BUS_SAT 46
252 #define CLK_DRAM_DE_BE 84
254 #define RST_BUS_DE_BE 21
255 #define RST_BUS_SAT 27
257 display-backend@1e60000 {
258 compatible = "allwinner,sun8i-a33-display-backend";
259 reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
260 reg-names = "be", "sat";
261 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
262 clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
263 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
264 clock-names = "ahb", "mod",
266 resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
267 reset-names = "be", "sat";
270 #address-cells = <1>;
277 remote-endpoint = <&fe0_out_be0>;
285 remote-endpoint = <&drc0_in_be0>;