Documentation/devicetree/bindings/display/arm,komeda.txt

   1 Device Tree bindings for Arm Komeda display driver
   2
   3 Required properties:
   4 - compatible: Should be "arm,mali-d71"
   5 - reg: Physical base address and length of the registers in the system
   6 - interrupts: the interrupt line number of the device in the system
   7 - clocks: A list of phandle + clock-specifier pairs, one for each entry
   8     in 'clock-names'
   9 - clock-names: A list of clock names. It should contain:
  10       - "aclk": for the main processor clock
  11 - #address-cells: Must be 1
  12 - #size-cells: Must be 0
  13 - iommus: configure the stream id to IOMMU, Must be configured if want to
  14     enable iommu in display. for how to configure this node please reference
  15         devicetree/bindings/iommu/arm,smmu-v3.txt,
  16         devicetree/bindings/iommu/iommu.txt
  17
  18 Required properties for sub-node: pipeline@nq
  19 Each device contains one or two pipeline sub-nodes (at least one), each
  20 pipeline node should provide properties:
  21 - reg: Zero-indexed identifier for the pipeline
  22 - clocks: A list of phandle + clock-specifier pairs, one for each entry
  23     in 'clock-names'
  24 - clock-names: should contain:
  25       - "pxclk": pixel clock
  26
  27 - port: each pipeline connect to an encoder input port. The connection is
  28     modeled using the OF graph bindings specified in
  29     Documentation/devicetree/bindings/graph.txt
  30
  31 Optional properties:
  32   - memory-region: phandle to a node describing memory (see
  33     Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
  34     to be used for the framebuffer; if not present, the framebuffer may
  35     be located anywhere in memory.
  36
  37 Example:
  38 / {
  39         ...
  40
  41         dp0: display@c00000 {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 compatible = "arm,mali-d71";
  45                 reg = <0xc00000 0x20000>;
  46                 interrupts = <0 168 4>;
  47                 clocks = <&dpu_aclk>;
  48                 clock-names = "aclk";
  49                 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
  50                         <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
  51                         <&smmu 8>, <&smmu 9>;
  52
  53                 dp0_pipe0: pipeline@0 {
  54                         clocks = <&fpgaosc2>;
  55                         clock-names = "pxclk";
  56                         reg = <0>;
  57
  58                         port {
  59                                 dp0_pipe0_out: endpoint {
  60                                         remote-endpoint = <&db_dvi0_in>;
  61                                 };
  62                         };
  63                 };
  64
  65                 dp0_pipe1: pipeline@1 {
  66                         clocks = <&fpgaosc2>;
  67                         clock-names = "pxclk";
  68                         reg = <1>;
  69
  70                         port {
  71                                 dp0_pipe1_out: endpoint {
  72                                         remote-endpoint = <&db_dvi1_in>;
  73                                 };
  74                         };
  75                 };
  76         };
  77         ...
  78 };