Documentation/devicetree/bindings/display/imx/hdmi.txt

   1 Freescale i.MX6 DWC HDMI TX Encoder
   2 ===================================
   3
   4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
   5 with a companion PHY IP.
   6
   7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
   8 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
   9 following device-specific properties.
  10
  11
  12 Required properties:
  13
  14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
  15 - reg: See dw_hdmi.txt.
  16 - interrupts: HDMI interrupt number
  17 - clocks: See dw_hdmi.txt.
  18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
  19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
  20   numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer.
  21   Each port shall have a single endpoint.
  22 - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
  23   multiplexer control register.
  24
  25 Optional properties
  26
  27 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
  28   or the functionally-reduced I2C master contained in the DWC HDMI. When
  29   connected to a system I2C master this property contains a phandle to that
  30   I2C master controller.
  31
  32
  33 Example:
  34
  35         gpr: iomuxc-gpr@20e0000 {
  36                 /* ... */
  37         };
  38
  39         hdmi: hdmi@120000 {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42                 compatible = "fsl,imx6q-hdmi";
  43                 reg = <0x00120000 0x9000>;
  44                 interrupts = <0 115 0x04>;
  45                 gpr = <&gpr>;
  46                 clocks = <&clks 123>, <&clks 124>;
  47                 clock-names = "iahb", "isfr";
  48                 ddc-i2c-bus = <&i2c2>;
  49
  50                 port@0 {
  51                         reg = <0>;
  52
  53                         hdmi_mux_0: endpoint {
  54                                 remote-endpoint = <&ipu1_di0_hdmi>;
  55                         };
  56                 };
  57
  58                 port@1 {
  59                         reg = <1>;
  60
  61                         hdmi_mux_1: endpoint {
  62                                 remote-endpoint = <&ipu1_di1_hdmi>;
  63                         };
  64                 };
  65         };