Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip SoC display controller (VOP)
   8
   9 description:
  10   VOP (Video Output Processor) is the display controller for the Rockchip
  11   series of SoCs which transfers the image data from a video memory
  12   buffer to an external LCD interface.
  13
  14 maintainers:
  15   - Sandy Huang <hjc@rock-chips.com>
  16   - Heiko Stuebner <heiko@sntech.de>
  17
  18 properties:
  19   compatible:
  20     enum:
  21       - rockchip,px30-vop-big
  22       - rockchip,px30-vop-lit
  23       - rockchip,rk3036-vop
  24       - rockchip,rk3066-vop
  25       - rockchip,rk3126-vop
  26       - rockchip,rk3188-vop
  27       - rockchip,rk3228-vop
  28       - rockchip,rk3288-vop
  29       - rockchip,rk3328-vop
  30       - rockchip,rk3366-vop
  31       - rockchip,rk3368-vop
  32       - rockchip,rk3399-vop-big
  33       - rockchip,rk3399-vop-lit
  34
  35   reg:
  36     minItems: 1
  37     items:
  38       - description:
  39           Must contain one entry corresponding to the base address and length
  40           of the register space.
  41       - description:
  42           Can optionally contain a second entry corresponding to
  43           the CRTC gamma LUT address.
  44
  45   interrupts:
  46     maxItems: 1
  47     description:
  48       The VOP interrupt is shared by several interrupt sources, such as
  49       frame start (VSYNC), line flag and other status interrupts.
  50
  51   clocks:
  52     items:
  53       - description: Clock for ddr buffer transfer.
  54       - description: Pixel clock.
  55       - description: Clock for the ahb bus to R/W the phy regs.
  56
  57   clock-names:
  58     items:
  59       - const: aclk_vop
  60       - const: dclk_vop
  61       - const: hclk_vop
  62
  63   resets:
  64     maxItems: 3
  65
  66   reset-names:
  67     items:
  68       - const: axi
  69       - const: ahb
  70       - const: dclk
  71
  72   port:
  73     type: object
  74     description:
  75       A port node with endpoint definitions as defined in
  76       Documentation/devicetree/bindings/media/video-interfaces.txt.
  77
  78   assigned-clocks:
  79     maxItems: 2
  80
  81   assigned-clock-rates:
  82     maxItems: 2
  83
  84   iommus:
  85     maxItems: 1
  86
  87   power-domains:
  88     maxItems: 1
  89
  90 required:
  91   - compatible
  92   - reg
  93   - interrupts
  94   - clocks
  95   - clock-names
  96   - resets
  97   - reset-names
  98   - port
  99
 100 additionalProperties: false
 101
 102 examples:
 103   - |
 104     #include <dt-bindings/clock/rk3288-cru.h>
 105     #include <dt-bindings/interrupt-controller/arm-gic.h>
 106     #include <dt-bindings/power/rk3288-power.h>
 107     vopb: vopb@ff930000 {
 108       compatible = "rockchip,rk3288-vop";
 109       reg = <0xff930000 0x19c>,
 110             <0xff931000 0x1000>;
 111       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 112       clocks = <&cru ACLK_VOP0>,
 113                <&cru DCLK_VOP0>,
 114                <&cru HCLK_VOP0>;
 115       clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
 116       power-domains = <&power RK3288_PD_VIO>;
 117       resets = <&cru SRST_LCDC1_AXI>,
 118                <&cru SRST_LCDC1_AHB>,
 119                <&cru SRST_LCDC1_DCLK>;
 120       reset-names = "axi", "ahb", "dclk";
 121       iommus = <&vopb_mmu>;
 122       vopb_out: port {
 123         #address-cells = <1>;
 124         #size-cells = <0>;
 125         vopb_out_edp: endpoint@0 {
 126           reg = <0>;
 127           remote-endpoint=<&edp_in_vopb>;
 128         };
 129         vopb_out_hdmi: endpoint@1 {
 130           reg = <1>;
 131           remote-endpoint=<&hdmi_in_vopb>;
 132         };
 133       };
 134     };