Documentation/devicetree/bindings/dma/qcom,gpi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies Inc GPI DMA controller
   8
   9 maintainers:
  10   - Vinod Koul <vkoul@kernel.org>
  11
  12 description: |
  13   QCOM GPI DMA controller provides DMA capabilities for
  14   peripheral buses such as I2C, UART, and SPI.
  15
  16 allOf:
  17   - $ref: "dma-controller.yaml#"
  18
  19 properties:
  20   compatible:
  21     enum:
  22       - qcom,sdm845-gpi-dma
  23
  24   reg:
  25     maxItems: 1
  26
  27   interrupts:
  28     description:
  29       Interrupt lines for each GPI instance
  30     maxItems: 13
  31
  32   "#dma-cells":
  33     const: 3
  34     description: >
  35       DMA clients must use the format described in dma.txt, giving a phandle
  36       to the DMA controller plus the following 3 integer cells:
  37       - channel: if set to 0xffffffff, any available channel will be allocated
  38         for the client. Otherwise, the exact channel specified will be used.
  39       - seid: serial id of the client as defined in the SoC documentation.
  40       - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
  41
  42   iommus:
  43     maxItems: 1
  44
  45   dma-channels:
  46     maximum: 31
  47
  48   dma-channel-mask:
  49     maxItems: 1
  50
  51 required:
  52   - compatible
  53   - reg
  54   - interrupts
  55   - "#dma-cells"
  56   - iommus
  57   - dma-channels
  58   - dma-channel-mask
  59
  60 additionalProperties: false
  61
  62 examples:
  63   - |
  64     #include <dt-bindings/interrupt-controller/arm-gic.h>
  65     #include <dt-bindings/dma/qcom-gpi.h>
  66     gpi_dma0: dma-controller@800000 {
  67         compatible = "qcom,gpi-dma";
  68         #dma-cells = <3>;
  69         reg = <0x00800000 0x60000>;
  70         iommus = <&apps_smmu 0x0016 0x0>;
  71         dma-channels = <13>;
  72         dma-channel-mask = <0xfa>;
  73         interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
  74                      <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
  75                      <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
  76                      <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
  77                      <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
  78                      <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
  79                      <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
  80                      <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
  81                      <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
  82                      <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
  83                      <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
  84                      <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
  85                      <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
  86     };
  87
  88 ...