Documentation/devicetree/bindings/dsp/fsl,dsp.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NXP i.MX8 DSP core
   8
   9 maintainers:
  10   - Daniel Baluta <daniel.baluta@nxp.com>
  11
  12 description: |
  13   Some boards from i.MX8 family contain a DSP core used for
  14   advanced pre- and post- audio processing.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - fsl,imx8qxp-dsp
  20       - fsl,imx8qm-dsp
  21       - fsl,imx8mp-dsp
  22
  23   reg:
  24     description: Should contain register location and length
  25
  26   clocks:
  27     items:
  28       - description: ipg clock
  29       - description: ocram clock
  30       - description: core clock
  31
  32   clock-names:
  33     items:
  34       - const: ipg
  35       - const: ocram
  36       - const: core
  37
  38   power-domains:
  39     description:
  40       List of phandle and PM domain specifier as documented in
  41       Documentation/devicetree/bindings/power/power_domain.txt
  42     maxItems: 4
  43
  44   mboxes:
  45     description:
  46       List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
  47       (see mailbox/fsl,mu.txt)
  48     maxItems: 4
  49
  50   mbox-names:
  51     items:
  52       - const: txdb0
  53       - const: txdb1
  54       - const: rxdb0
  55       - const: rxdb1
  56
  57   memory-region:
  58     description:
  59       phandle to a node describing reserved memory (System RAM memory)
  60       used by DSP (see bindings/reserved-memory/reserved-memory.txt)
  61     maxItems: 1
  62
  63 required:
  64   - compatible
  65   - reg
  66   - clocks
  67   - clock-names
  68   - power-domains
  69   - mboxes
  70   - mbox-names
  71   - memory-region
  72
  73 additionalProperties: false
  74
  75 examples:
  76   - |
  77     #include <dt-bindings/firmware/imx/rsrc.h>
  78     #include <dt-bindings/clock/imx8-clock.h>
  79     dsp@596e8000 {
  80         compatible = "fsl,imx8qxp-dsp";
  81         reg = <0x596e8000 0x88000>;
  82         clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
  83                  <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
  84                  <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
  85         clock-names = "ipg", "ocram", "core";
  86         power-domains = <&pd IMX_SC_R_MU_13A>,
  87                         <&pd IMX_SC_R_MU_13B>,
  88                         <&pd IMX_SC_R_DSP>,
  89                         <&pd IMX_SC_R_DSP_RAM>;
  90         mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
  91         mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
  92         memory-region = <&dsp_reserved>;
  93     };