1 Xilinx Zynq GPIO controller Device Tree Bindings
2 -------------------------------------------
5 - #gpio-cells : Should be two
6 - First cell is the GPIO line number
7 - Second cell is used to specify optional
9 - compatible : Should be "xlnx,zynq-gpio-1.0" or
10 "xlnx,zynqmp-gpio-1.0" or "xlnx,versal-gpio-1.0
12 - clocks : Clock specifier (see clock bindings for details)
13 - gpio-controller : Marks the device node as a GPIO controller.
14 - interrupts : Interrupt specifier (see interrupt bindings for
16 - interrupt-controller : Marks the device node as an interrupt controller.
17 - #interrupt-cells : Should be 2. The first cell is the GPIO number.
18 The second cell bits[3:0] is used to specify trigger type and level flags:
19 1 = low-to-high edge triggered.
20 2 = high-to-low edge triggered.
21 4 = active high level-sensitive.
22 8 = active low level-sensitive.
23 - reg : Address and length of the register set for the device
28 compatible = "xlnx,zynq-gpio-1.0";
31 interrupt-parent = <&intc>;
32 interrupts = <0 20 4>;
34 #interrupt-cells = <2>;
35 reg = <0xe000a000 0x1000>;