1 Nuvoton NPCM7xx PWM and Fan Tacho controller device
3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
4 controller outputs and 16 Fan tachometer controller inputs.
6 Required properties for pwm-fan node
7 - #address-cells : should be 1.
8 - #size-cells : should be 0.
9 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
10 - reg : specifies physical base address and size of the registers.
11 - reg-names : must contain:
12 * "pwm" for the PWM registers.
13 * "fan" for the Fan registers.
14 - clocks : phandle of reference clocks.
15 - clock-names : must contain
16 * "pwm" for PWM controller operating clock.
17 * "fan" for Fan controller operating clock.
18 - interrupts : contain the Fan interrupts with flags for falling edge.
19 - pinctrl-names : a pinctrl state named "default" must be defined.
20 - pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
25 Under fan subnode can be upto 8 child nodes, each child node representing a fan.
26 Each fan subnode must have one PWM channel and atleast one Fan tach channel.
28 For PWM channel can be configured cooling-levels to create cooling device.
29 Cooling device could be bound to a thermal zone for the thermal control.
31 Required properties for each child node:
32 - reg : specify the PWM output channel.
33 integer value in the range 0 through 7, that represent
34 the PWM channel number that used.
36 - fan-tach-ch : specify the Fan tach input channel.
37 integer value in the range 0 through 15, that represent
38 the fan tach channel number that used.
40 At least one Fan tach input channel is required
42 Optional property for each child node:
43 - cooling-levels: PWM duty cycle values in a range from 0 to 255
44 which correspond to thermal cooling states.
48 pwm_fan:pwm-fan-controller@103000 {
51 compatible = "nuvoton,npcm750-pwm-fan";
52 reg = <0x103000 0x2000>,
54 reg-names = "pwm", "fan";
55 clocks = <&clk NPCM7XX_CLK_APB3>,
56 <&clk NPCM7XX_CLK_APB4>;
57 clock-names = "pwm","fan";
58 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
64 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
65 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
68 &fanin0_pins &fanin1_pins &fanin2_pins
69 &fanin3_pins &fanin4_pins>;
72 fan-tach-ch = /bits/ 8 <0x00 0x01>;
73 cooling-levels = <127 255>;
77 fan-tach-ch = /bits/ 8 <0x02 0x03>;
81 fan-tach-ch = /bits/ 8 <0x04>;