Documentation/devicetree/bindings/i2c/i2c-octeon.txt

   1 * Two Wire Serial Interface (TWSI) / I2C
   2
   3 - compatible: "cavium,octeon-3860-twsi"
   4
   5   Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
   6
   7   or
   8
   9   compatible: "cavium,octeon-7890-twsi"
  10
  11   Compatibility with cn78XX SOCs.
  12
  13 - reg: The base address of the TWSI/I2C bus controller register bank.
  14
  15 - #address-cells: Must be <1>.
  16
  17 - #size-cells: Must be <0>.  I2C addresses have no size component.
  18
  19 - interrupts: A single interrupt specifier.
  20
  21 - clock-frequency: The I2C bus clock rate in Hz.
  22
  23 Example:
  24         twsi0: i2c@1180000001000 {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27                 compatible = "cavium,octeon-3860-twsi";
  28                 reg = <0x11800 0x00001000 0x0 0x200>;
  29                 interrupts = <0 45>;
  30                 clock-frequency = <100000>;
  31
  32                 rtc@68 {
  33                         compatible = "dallas,ds1337";
  34                         reg = <0x68>;
  35                 };
  36                 tmp@4c {
  37                         compatible = "ti,tmp421";
  38                         reg = <0x4c>;
  39                 };
  40         };