1 Qualcomm Camera Control Interface (CCI) I2C controller
8 Definition: must be one of:
15 Value type: <prop-encoded-array>
16 Definition: base address CCI I2C controller and length of memory
21 Value type: <prop-encoded-array>
22 Definition: specifies the CCI I2C interrupt. The format of the
23 specifier is defined by the binding document describing
24 the node's interrupt parent.
28 Value type: <prop-encoded-array>
29 Definition: a list of phandle, should contain an entry for each
30 entries in clock-names.
35 Definition: a list of clock names, must include "cci" clock.
38 Usage: required for "qcom,msm8996-cci"
39 Value type: <prop-encoded-array>
44 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996 and
45 sdm845), described as subdevices named "i2c-bus@0" and "i2c-bus@1".
52 Definition: Index of the CCI bus/master
57 Definition: Desired I2C bus clock frequency in Hz, defaults to 100
63 compatible = "qcom,msm8996-cci";
66 reg = <0xa0c000 0x1000>;
67 interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
68 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
69 <&mmcc CAMSS_TOP_AHB_CLK>,
70 <&mmcc CAMSS_CCI_AHB_CLK>,
71 <&mmcc CAMSS_CCI_CLK>,
72 <&mmcc CAMSS_AHB_CLK>;
73 clock-names = "mmss_mmagic_ahb",
81 clock-frequency = <400000>;
88 clock-frequency = <400000>;